WORKSHOP PAPER
A 2.3e- Read Noise 1.3Mpixel CMOS Image Sensor with Per-Column Amplifier
Kwang-Bo Cho1, Chiajen Lee1, Siri Eikedal1, Hai Yan1, Taehee Cho1, Tien-Min Miao1, Jason Song1, Christopher Zeleznik1, Alexander Mokhnatyuk1, Sandor Barna1
1Micron Technology, Inc., 251 S. Lake Ave., 6-th Floor, Pasadena, California 91101

Abstract

Low-noise, low-power, area-efficient CMOS imager readout architecture is studied through four 1.3Mpixel test chips using the same pixel array and silicon area. By employing per-column amplifier in front of column sample-and-hold circuitry and utilizing the extended correlated-double-sampling principle, a low 2.3e- read noise is achieved.
Publisher: IISS (Int. Image Sensors Society)
Year: 2007
Workshop: IISW
URL: https://doi.org/10.60928/u0kx-w66v
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Keywords

CMOS Image Sensor, Low-noise Readout, Per-Column Amplifier,

References

1) Alex Krymski, Nail Khaliullin, Howard Rhodes, "A 2 e- noise 1.3Megapixel CMOS sensor", IEEE Workshop on CCDs and Advanced Image Sensors, 2003
2) Nobuhiro Kawai, Shoji Kawahito, "Noise analysis of high-gain, low-noise column readout circuits for CMOS image sensors", IEEE Trans. Electron Devices, vol. 51, no. 2, pp. 185-194, 2004. https://doi.org/10.1109/ted.2003.822224
3) Taehee Cho, Sandor Barna, Andrew Lever, Kwang-Bo Cho, Chiajen Lee, "Sharing operational amplifier between two stages of pipelined adc and/or two channels of signal processing circuitry", United States Patent (US 7148833), Dec. 2006