Electron Trapping in 4H-SiC MOS Capacitors Fabricated by Sodium-Enhanced Oxidation
p.757
p.757
Passivation and Depassivation of Interface Traps at the SiO2/4H-SiC Interface by Potassium Ions
p.761
p.761
Impact of UV Irradiation on Thermally Grown 4H-SiC MOS Devices
p.765
p.765
Study of High Temperature Microwave Annealing on the Performance of 4H-SiC MOS Capacitors
p.769
p.769
Comparison of Oxide Quality for Monolithically Fabricated SiC CMOS Structures
p.773
p.773
A Reduction of Defects in the SiO2-SiC System Using the SiC Vacuum Field-Effect Transistor (VacFET)
p.777
p.777
Controlling Characteristics of 4H-SiC(0001) p-Channel MOSFETs Fabricated on Ion-Implanted n-Well
p.781
p.781
Two-Dimensional Roughness Growth at Surface and Interface of SiO2 Films during Thermal Oxidation of 4H-SiC(0001)
p.785
p.785
Effects of Surface Morphological Defects and Crystallographic Defects on Reliability of Thermal Oxides on C-Face
p.789
p.789
Comparison of Oxide Quality for Monolithically Fabricated SiC CMOS Structures
Abstract:
The recent development of silicon carbide complimentary metal-oxide-semiconductor (CMOS) is a key enabling step in the realisation of low power circuitry for high temperature applications, such as aerospace and well logging. This paper describes investigations into the properties of the gate dielectric as part of the development of the technology to realize monolithic fabrication of both n and p channel devices. A comparison of the oxide quality of the silicon carbide CMOS transistors is performed to examine the feasibility of this technology for high temperature circuitry.
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Info:
Periodical:
Materials Science Forum (Volumes 717-720)
Pages:
773-776
Citation:
Online since:
May 2012
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