Improvement of Surface Roughness for 4H-SiC Epilayers Grown on 4° Off-Axis Substrates

Takashi Aigo; Hiroshi Tsuge; Hirokatsu Yashiro; Tatsuo Fujimoto; Masakazu Katsuno; Masashi Nakabayashi; Taizo Hoshino; Wataru Ohashi

doi:10.4028/www.scientific.net/MSF.645-648.119

Paper Titles

Epitaxial Growth of 4H-SiC with High Growth Rate Using CH₃Cl and SiCl₄ Chlorinated Growth Precursors
p.103

Chloride-Based CVD at High Growth Rates on 3” Vicinal Off-Angles SiC Wafers
p.107

Use of SiCl₄ as Silicon Precursor for Low-Temperature Halo-Carbon Epitaxial Growth of 4H-SiC
p.111

Short-Length Step Morphology on 4° Off Si-Face Epitaxial Surface Grown on 4H-SiC Substrate
p.115

Improvement of Surface Roughness for 4H-SiC Epilayers Grown on 4° Off-Axis Substrates
p.119

Doping Concentration and Surface Morphology of 4H-SiC C-Face Epitaxial Growth
p.123

Investigation of 3C-SiC(111) Homoepitaxial Growth by CVD at High Temperature
p.127

The Deposition of 3C-SiC Thin Films onto the (111) and (110) Faces of Si Using Pulsed Sputtering of a Hollow Cathode
p.131

3C-SiC Heteroepitaxial Growth on Inverted Silicon Pyramids (ISP)
p.135

HomeMaterials Science ForumMaterials Science Forum Vols. 645-648Improvement of Surface Roughness for 4H-SiC...

Improvement of Surface Roughness for 4H-SiC Epilayers Grown on 4° Off-Axis Substrates

Abstract:

The epitaxial growth process was optimized in order to obtain good surface morphology for epilayers grown on 4˚ off-axis substrates. The optimization was carried out from growth temperatures and gas chemistry including C/Si ratio. Step-bunching was significantly suppressed by the optimized process and a surface roughness Ra of 0.2 nm was achieved. Etch pit density evaluation by KOH etching indicated that the basal plane dislocations were reduced to less than 50 cm-2 by the use of 4˚ off-axis substrates. Photoluminescence evaluation showed that the epilayer grown by the optimized process had a better crystalline quality than that grown by a standard process. Schottky diodes fabricated on the epilayer by the optimized process represented the ideality factor n of 1.01 and the barrier height of 1.67eV. These results demonstrate that high quality epilayers with smooth surfaces comparable to those on 8˚off-axis substrates were obtained on 4˚off-axis substrates.

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Periodical:

Materials Science Forum (Volumes 645-648)

Pages:

119-122

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.645-648.119

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Online since:

April 2010

Authors:

Takashi Aigo, Hiroshi Tsuge, Hirokatsu Yashiro, Tatsuo Fujimoto, Masakazu Katsuno, Masashi Nakabayashi, Taizo Hoshino, Wataru Ohashi

Keywords:

Etching, Photoluminescence (PL), Schottky Barrier Diode (SBD), Step Bunching

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