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Article

An Improved Zero-Current Distortion Compensation Method for the Soft-Start of the Vienna Rectifier

School of Electronics & Electrical Engineering, Dankook University, Yongin 16890, Republic of Korea
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(10), 1806; https://doi.org/10.3390/electronics13101806
Submission received: 8 April 2024 / Revised: 1 May 2024 / Accepted: 5 May 2024 / Published: 7 May 2024

Abstract

:
This paper proposes an improved zero-current distortion compensation (IZCDC) method for the Vienna rectifier. The conventional zero-current distortion compensation (ZCDC) method modifies the reference voltages by adding an offset voltage to compensate for the zero-current distortion (ZCD). However, the reference voltages occasionally exceed the linear modulation region by the offset voltage added at the driving start-point of the Vienna rectifier, where the modulation index of phase voltage is relatively large. This causes a hard-start of the Vienna rectifier accompanied by a serious surge and distortion in the phase current. In this paper, the IZCDC method is proposed for achieving the soft-start of the Vienna rectifier. When the overmodulation occurs, the proposed method modifies the conventional offset voltage to the IZCDC component, which is involved in the adjustment of the variance of the phase current, only for a certain phase among the three phases. As the IZCDC component regulates the variance of the phase current to zero, surge and distortion in the phase current can be mitigated. As a result, the Vienna rectifier starts its operation softly while ensuring its normal operation in the transients. The effectiveness of the proposed method is verified through simulations and experimental results.

1. Introduction

In recent years, as the issue of power quality management has been globally raised, the organizations in each country strictly regulate the factors affecting power quality, such as the total harmonic distortion (THD) of the input current in grid-connected systems. In this respect, the Vienna rectifier has emerged as a power converter with excellent input/output characteristics and has been actively adopted in grid-connected systems [1,2,3,4]. In particular, the Vienna rectifier is widely used for power factor correction (PFC) circuits in various industry fields [5,6,7,8], where the power factor is generally maintained as a unity power factor. The reason is that the Vienna rectifier is a unidirectional power converter which is capable of transferring only a limited amount of reactive power [7].
The topology of the Vienna rectifier is shown in Figure 1. It can be seen that when the two switches in each leg, which operate synchronously with each other, are turned off, the Vienna rectifier operates similarly to a three-phase diode rectifier. In this state, the input voltage (the voltage between the point of the leg and the neutral-point in the DC-link) of the Vienna rectifier is determined as the P or N state, depending on the direction of the phase current. If the direction of the phase current is the same as that of the arrows in Figure 1, the input voltage is determined as the P state. On the other hand, if the direction of the phase current is opposite to that of the arrows in Figure 1, the input voltage is determined as the N state. Conversely, when those switches are turned on, the input voltage of the Vienna rectifier is determined as the O state. Due to these operation properties of the Vienna rectifier, it has an uncontrollable region (UR) where the signs of the reference voltage and the phase current are opposite to each other. As the Vienna rectifier cannot control its input/output in the UR, the input voltage error occurs, which causes a distortion in the phase current [9,10,11]. This current distortion is termed as a zero current distortion (ZCD) in that it occurs near the zero-crossing point of the phase current. The length of the UR depends on the power factor and the impedance on the input side of the Vienna rectifier: it becomes longer as the impedance increases and as the power factor decreases [11]. If the length of the UR is long, the ZCD seriously occurs, increasing THD and leading to a degradation of power quality.
Several methods of the Vienna rectifier to avoid the ZCD and to improve power quality have been previously proposed [11,12,13,14,15,16,17,18,19,20,21]. Each method is suggested with a focus on a specific purpose as well as a common purpose to mitigate the ZCD. The ZCD compensation (ZCDC) methods proposed in [12,13,14,15,16] are based on the space vector pulse width modulation (SVPWM) method which allows a flexible voltage modulation. In [13], a ZCDC method is proposed which is focused on improving the performance of ZCDC by considering and compensating for the detection error of the sign of the phase current. The ZCDC method in [14] covers both the control of the neutral point voltage and compensation of the ZCD. In [16], a ZCDC method is proposed which can maintain its performance even under an unbalanced grid by introducing separation control for positive and negative sequence components of grid voltage and current. The methods proposed in [11,17,18] stand on the basis of the carrier-based PWM (CB-PWM) method, which can be simply implemented in that it has a relatively lower amount of computation compared to the SVPWM method. In the method of [17], a voltage unbalance factor is considered in the calculation of the ZCDC components to control the phase current as a sinusoidal wave under DC-link voltage imbalance conditions. In [19,20,21], the ZCDC methods based on the discontinuous PWM (DPWM) method are proposed to reduce switching losses associated with compensation of the ZCD.
Most of these ZCDC methods [11,12,13,14,16,17,18,19,20,21] adopt a common approach of injecting an offset voltage to the reference voltages to compensate for the ZCD. However, the reference voltages occasionally exceed the linear modulation region by the offset voltage added at the driving start-point of the Vienna rectifier, where the modulation index (MI) of phase voltage is relatively large. This causes a hard-start of the Vienna rectifier accompanied by a serious surge and distortion in the phase current. Nonetheless, none of the conventional methods take into account those characteristics in the transients. In this paper, the IZCDC method is proposed which is focused on achieving the soft-start of the Vienna rectifier. The proposed IZCDC method is based on the conventional ZCDC method proposed in [11] and operates in the same way as it, under the normal condition. However, if overmodulation occurs, the proposed method modifies the conventional offset voltage to the IZCDC component, which is involved in adjusting the variance of the phase current, only for a specific phase among the three phases. The IZCDC component is derived from an equation for the variance of the phase current. The phase where the IZCDC is applied is determined depending on the sector defined according to the phase where overmodulation occurs. As the IZCDC component regulates the variance of the phase current to zero, surge and distortion in the phase current can be mitigated. As a result, the Vienna rectifier starts its operation softly, while ensuring its normal operation in the transients. The validity of the proposed method is verified through simulations and experimental results.

2. Conventional ZCDC Method

The UR for the case of leading power factor (pf) is described with several waveforms in Figure 2, where vxg (x = a, b, and c), ix (x = a, b, and c), vx* (x = a, b, and c), and θdiff denote the grid phase voltage, the phase current, the reference voltage, and the phase difference between ix and vx*, respectively. As seen in Figure 2, the interval of θdiff corresponds to the UR. The conventional ZCDC method is based on the idea that the ZCD can be compensated by modifying the reference voltage during the UR.

2.1. Basic Concept of the Conventional ZCDC Method

For the Vienna rectifier, the O state can always be formed regardless of the sign of the phase current even in the UR, by turning on the switches located in the neutral-point path. In terms of that, the voltage error which causes the current distortion in the UR can be avoided by modifying the reference voltage in the UR to zero which is the command of the O state. This means that the vx* has to be clamped to zero to compensate the ZCD in the period of θdiff, and θdiff is defined as,
θ d i f f = θ z + θ p f ( p f : l e a d i n g ) θ z ( θ z > θ p f ) θ p f ( θ z < θ p f ) ( p f : l a g g i n g ) , θ z = tan 1 I m 2 π f s L f V m I m R f .
The term θpf denotes the power factor angle. The term θz denotes the phase difference between vxg and vx*, caused by impedance on the input side of the Vienna rectifier, such as an input filter inductance (Lf) and its parasitic resistance (Rf). The terms Im and Vm denote magnitude of the phase current and the grid voltage, respectively, and fs denotes the mains frequency.

2.2. Implementation of the Conventional ZCDC Method

The reference voltages of the three phases with an offset voltage added to extend the linear region of the voltage modulation is expressed as (2).
v a , o f s t   * = v a   * + V o f s t v b , o f s t   * = v b   * + V o f s t , V o f s t = v max   * + v min   * 2 , v max   * = max ( v x   * ) , v min   * = min ( v x   * ) . v c , o f s t   * = v c   * + V o f s t
In the conventional ZCDC method, a ZCDC component which makes the reference voltage zero is introduced for each sector defined in Table 1.
The sectors referred to in Table 1 denote the division of the UR into six areas for one mains period according to the zero-crossing point of the reference voltages of each phase, as shown in Figure 3. To implement the conventional ZCDC method, the ZCDC component (Vcomp) is injected to the reference voltages of the three phases as expressed in (3).
v a , c o n v   * = v a , o f s t   * + V c o m p v b , c o n v   * = v b , o f s t   * + V c o m p v c , c o n v   * = v c , o f s t   * + V c o m p
In Figure 3, the reference voltages of three phases with and without the conventional ZCDC component are represented. The existing reference voltages and those to which the ZCDC component is injected are represented by the dotted and solid line, respectively. In the duration of the UR, the existing reference voltage of the particular phase which intersects the zero-crossing point is clamped to zero and those of the other two phases are also modified by the ZCDC components, as shown in Figure 3. The terms Vdc and θg in Figure 3 denote the DC-link voltage and the phase angle of the grid voltage, respectively.

2.3. Occurrence of Overmodulation Caused by the Conventional ZCDC Component

In the conventional ZCDC method, overmodulation can be caused by the ZCDC components added, especially when the MI is high, or the power factor is low. Therefore, the reference voltage with the ZCDC component can enter the overmodulation region at the driving start-point of the Vienna rectifier where the MI is relatively high, and the power factor does not have an exact unity value. Figure 4 depicts the examples of overmodulation occurrence in the conventional ZCDC method for two cases of different MI and power factor conditions, and a constant Lf condition.

3. Proposed IZCDC Method

The aim of the IZCDC method is to achieve the soft-start of the Vienna rectifier, reducing the current surge and distortion caused by overmodulation occurrence at the driving start-point in the conventional ZCDC method. Therefore, the IZCDC method is developed based on the analysis of the variance of the phase current.

3.1. Derivation of the IZCDC Duty Component

The variance of the phase current for one sampling period in a grid-connected system is generally defined as,
Δ i x = D * T s L f ( v x g v x s ) , ( x = a ,   b ,   and   c )
where Ts, D*, and vxs denote a sampling period, a reference duty ratio, and the phase voltage, respectively. The reference duty ratio D* can be derived by normalizing the reference voltage with Vdc/2. In expression (4), a parasitic resistance on the input side of the Vienna rectifier which has a very small value is neglected. From expression (4), it can be seen that only the terms D* and vxs are adjustable components which have an influence on the variance of the phase current (∆ix), because the values of other components are systemically determined by default. In this respect, the IZCDC duty component can be derived by determining the appropriate value of D* which adjusts vxs to control ∆ix at the desired value. Thus, the impact of D* on vxs for each sector of the UR must be investigated to obtain the IZCDC duty component.
Assuming that overmodulation due to the conventional ZCDC component must occur in a certain phase, overmodulation occurs only in the reference voltage with the maximum value (vmax*) or minimum value (vmin*). Therefore, the phenomena where overmodulation occurs can be divided into two cases: overmodulation occurs in vmax* and vmin* (called max-OVM and min-OVM, respectively, hereafter in this paper). Figure 5 shows the appearance of vxs related to D* for each case, where vxn, vsn, and Dx* denote the input voltage, the common-mode voltage, and the reference duty ratio, respectively (x = max || mid || min—the term indicated by the lower subscript of ‘max’, ‘mid’, or ‘min’ refers to the value of the phase which has maximum, mid, or minimum value among the three phases, respectively). As shown in Figure 5a, since the vmax,n and vmid,n are clamped to Vdc/2 and 0, respectively, during the interval of max-OVM, the vmin,s can be simply expressed with Dmin*. Likewise, as shown in Figure 5b, since the vmid,n and vmin,n are clamped to 0 and −Vdc/2, respectively, in the interval of min-OVM, the vmax,s can be simply expressed with Dmax*. In terms of that, it is noted that the ∆ix of the phase where the reference voltage is neither overmodulated nor clamped to zero can be simply defined as (5) and (6) for each case, by assuming that the grid phase voltage vxg is constant for one sampling period.
Δ i x , min = D min   * T s L ( v min , g + V d c 2 ) + ( 1 D min   * ) T s L ( v min , g + V d c 6 ) ( for max-OVM )
Δ i x , max = D max   * T s L ( v max , g V d c 2 ) + ( 1 D max   * ) T s L ( v max , g V d c 6 ) ( for min-OVM )
The IZCDC duty component which can satisfy the aim of minimizing the phase current surge and distortion during the interval of OVM can be finally derived from (5) and (6) by substituting 0 for ∆ix, as defined in (7) and (8).
D min , I Z C D C = v min , g + V d c / 6 V d c / 3 ( for max-OVM )
D max , I Z C D C = v max , g V d c / 6 V d c / 3 ( for min-OVM )

3.2. Implementation of the IZCDC Method

The IZCDC duty component derived in Section 3.1 is a duty component injected to a certain phase according to the sector, which can control the ∆ix at the desired value (=0) by adjusting the vxs. Therefore, the IZCDC component, as an offset voltage injected to the reference voltage for each case, is defined as (9) and (10).
V min , I Z C D C = V d c 2 D min , I Z C D C v min , o f s t   * ( for max-OVM )
V max , I Z C D C = V d c 2 D max , I Z C D C v max , o f s t   * ( for min-OVM )
For the case of max-OVM, the conventional ZCDC component Vcomp injected to the vmin,ofst* is replaced by Vmin,IZCDC to implement the IZCDC method, while those of the other two vx,ofst* do not change. Consequently, the reference voltages of the three phases with the IZCDC method for max-OVM are defined as (11).
v max , I Z C D C   * = v max , o f s t   * + V c o m p v m i d , I Z C D C   * = v m i d , o f s t   * + V c o m p v min , I Z C D C   * = v min , o f s t   * + V min , I Z C D C
Similarly, for the case of min-OVM, the Vcomp which is injected to the vmax,ofst* is replaced by Vmax,IZCDC, unlike those of the other two vx,ofst*. In the same manner as for max-OVM, the reference voltages of the three phases with the IZCDC method for min-OVM are defined in (12).
v max , I Z C D C   * = v max , o f s t   * + V max , I Z C D C v m i d , I Z C D C   * = v m i d , o f s t   * + V c o m p v min , I Z C D C   * = v min , o f s t   * + V c o m p
From expressions (11) and (12), it can be seen that the reference voltage of the mid-phase does not change and is always clamped to 0 in the UR, regardless of whether the proposed IZCDC method is applied or not, to maintain the application of the ZCDC.

3.3. The Entire Control Sequence of the Vienna Rectifier Including the Proposed IZCDC Method

A block diagram is presented in Figure 6, which describes the overall control sequence of the Vienna rectifier and the implementation of the proposed IZCDC method. The terms Sx (x = a, b, and c), Ide, and Iqe denote a gating signal, the d-axis current and the q-axis current in the synchronous coordinate system, respectively. The variables with a superscript ‘*’ refer to the reference values of each corresponding variable to control. In addition, the PLL refers to the implementation of phase-locked loop (PLL).
The reference q-axis current (Iqe*) is derived from the DC-link voltage controller to control the value of the DC-link voltage at the desired value (=Vdc*). Meanwhile, the reference d-axis current (Ide*) is just determined as a constant value depending on the power factor, which is generally designated as 0 to control the power factor as a unity power factor. The reference q-axis and d-axis voltages derived from the Current controller are translated from the synchronous coordinate to the three phase coordinates through the Park’s transformation. The Neutral-point voltage controller in the block diagram refers to the implementation of the neutral-point voltage control method proposed in [22]. The terms Vdc1, Vdc2, and d0 denote the voltage of the upper capacitor on the DC-link, that of the lower capacitor on the dc-link, and a duty component which is the output of the Neutral-point voltage controller. This has to be essentially applied to a 3-level converter to control the values of Vdc1 and Vdc2 at the same value.
The conventional ZCDC is implemented after adding the offset voltage Vofst to the reference voltages of the three phases, as mentioned in Section 2.1. The blue-shaded region indicates the block diagram of the proposed IZCDC method. It describes each process of the proposed method in detail, as follows:
(1)
Sorting the reference voltages of the three phases: vmax*, vmid* and vmin* are determined, and offset voltage to extend the linear modulation region is derived and injected to the reference voltages of the three phases.
(2)
Extracting the conventional ZCDC component: Vcomp can be obtained from the Conventional ZCDC with θg derived from the PLL and Table 1.
(3)
Detecting overmodulation: By adding Vcomp to the reference voltages of the three phases, the reference voltages of the conventional ZCDC vx,conv* (x = a, b, and c) are obtained and they are monitored to check for the occurrence of overmodulation. If the magnitude of vx,conv* exceeds Vdc/2, overmodulation is detected.
(4)
Deriving the IZCDC component: If overmodulation is detected in the previous step, the IZCDC component Vx,IZCDC (x = max || min) is derived from expressions (7) to (10).
(5)
Applying the IZCDC method: Vx,IZCDC is inserted to the reference voltage of the selected phase in accordance with the criteria in expression (11) and (12). The reference voltages of the other two phases remain the same as those of the conventional method.
After the above five processes are progressed, the reference voltages of the IZCDC method of the three phases vx,IZCDC* (x = a, b, and c) are derived. The reference duty signals of the three phases Dx,IZCDC* (x = a, b, and c) are obtained by normalizing vx,IZCDC* as mentioned in Section 3.1. Finally, the final duty signals of the three phases are derived by adding d0 to Dx,IZCDC*, and are entered to the CB-PWM to modulate the gating signals of the three phases Sx (x = a, b, and c).

4. Simulation Results

The simulation results are presented to verify the performances of the proposed IZCDC method compared to the conventional ZCDC method. The simulation of the proposed method is implemented based on the control block diagram shown in Figure 6 and is executed with PSIM using the same parameters as those presented in Table 2.
Figure 7 shows the waveforms of the phase current in the three phases and q-axis, and the DC-link voltage. The reference of the DC-link voltage Vdc* is given in the form of a ramp wave which increases to 700 V from 0.5 s to 0.54 s. In addition, the d-axis current Ide is set to 0 to control the power factor as a unity power factor. A resistive load attached to the output of the Vienna rectifier, which has a value of 90 ohms, consumes 5.4 kW of power in the steady state. In Figure 7, the comparisons of the dynamic characteristics at the driving start-point of the Vienna rectifier are presented between the cases with the conventional ZCDC method and with the proposed IZCDC method. It can be seen that the maximum values of the current surge occurring at driving start-point for two cases are 40.13 A and 26.98 A, respectively. It is approximately 1.5 times smaller in the proposed method, compared to the conventional method. This distinction also appears in the waveform of Iqe for two cases. Figure 8 shows the waveforms of the phase current, the reference duty signal, and the ZCDC duty components of the three phases between the two cases. The yellow-shaded region refers to the case of max-OVM. In this region, it can be seen that the conventional ZCDC duty component of the min-phase is replaced by the IZCDC duty component, unlike those of the other two phases, in the proposed IZCDC method. In the same manner, the ZCDC duty component of the max-phase in the blue-shaded region, which refers to the case for min-OVM, is also replaced by the IZCDC duty component. It can be seen in Figure 8b (marked by red circles) that the variance of the phase current is controlled at 0 by Dx,IZCDC*, as the aim of the proposed IZCDC method. Comparing the waveform of the phase current in the conventional and the proposed method, there is a significant difference of the variance of the phase current during the interval of each sector between the two cases, as shown in Figure 8a,b. As a result, as a sharp fluctuation of the phase current is eliminated in the proposed method, surge and distortion in the phase current can be mitigated.

5. Experimental Results

The proposed IZCDC method is also verified through the experimental results. The experiment is implemented based on the parameters presented in Table 2 which is the same as those of the simulation. In Figure 9, the set-up of the experiment is represented, which consists of a prototype of the Vienna rectifier for PFC, a control board with DSP-TMS320F28377D, a resistive load, and an AC-supply as a source. The control sequences and the operation of the Vienna rectifier in the experiment follows the same as those of the simulation, except that Vdc* rises to 700 V for approximately 2.75 s.
Figure 10 shows the experimental results of the implementation of the ZCDC for each case of the conventional ZCDC method and the proposed IZCDC method in the transients. The resistance value of the load is 90 ohms, which consumes 5.4 kW of power in the steady state. As shown in Figure 10, the overmodulation occurs especially near the driving start-point, not only because the MI is relatively high, but also because the magnitude of the ZCDC component is large as the power factor is not completely controlled at a unity power factor in the transients. In Figure 10a, a serious surge in the phase current due to overmodulation occurs at driving start-point of the Vienna rectifier in the conventional method. The maximum and minimum values of the surge current are 40.5 A and −32.6 A, respectively. On the other hand, those values in the proposed IZCDC method are remarkably reduced to 25.2 A and −21.2 A, about 1.6 times the difference, as shown in Figure 10b. Furthermore, by comparing the waveforms of the phase current between Figure 10a,b, it can be seen that the phase current distortion is also mitigated in the proposed method.
Figure 11 shows the same results as those of Figure 10 under different load condition. The resistance value of the load is 50 ohms, which consumes 9.8 kW of power in the steady state. Similar to the results previously presented, the maximum and minimum values of the surge current are mitigated by about 1.6 times from 47.9 A and −37.7 A to 30.5 A and −31.4 A, respectively. Therefore, the proposed method has a constant performance regardless of the output load condition. In addition, Figure 12 shows the experimental results including the waveforms in the steady state for the cases of the conventional method and the proposed method. It can be seen that the characteristics of the phase current for the two cases are the same as each other in the steady state where the overmodulation does not occur.

6. Conclusions

This paper proposed the IZCDC method for achieving the soft-start of the Vienna rectifier. The proposed method modifies the conventional ZCDC component to the IZCDC component depending on whether overmodulation of the reference voltages occurs due to the conventional ZCDC component being added. Since the IZCDC component adjusts the variance of the phase current to zero during the interval of the overmodulation, surge and distortion in the phase current is effectively mitigated in the proposed method. The development of the proposed method was presented based on the analysis for the variance of the phase current in general grid-connected system, and the IZCDC component was logically derived. The entire implementation sequence of the proposed method was described in detail, as a block diagram. The effectiveness of the proposed method was verified by both the simulation and the experimental results. The comparison of the performances between the conventional method and the proposed method was also presented. As a result, it was noted that surge current and the distortion in the transients are remarkably reduced in the proposed method compared to the conventional method. Therefore, the Vienna rectifier starts its operation softly with the proposed method, ensuring its normal operation in the transients. In addition, in the steady state, the proposed method has the same performance as that of the conventional method. Therefore, the proposed IZCDC method is useful for achieving the soft-start of the Vienna rectifier in the transients.

Author Contributions

Conceptualization, J.-Y.L. and J.-S.L.; methodology, J.-Y.L. and J.-S.L.; software, J.-Y.L.; validation, J.-Y.L. and J.-S.L.; formal analysis, J.-Y.L. and J.-S.L.; investigation, J.-Y.L.; resources, J.-Y.L.; data curation, J.-Y.L.; writing—original draft preparation, J.-Y.L.; writing—review and editing, J.-Y.L. and J.-S.L.; visualization, J.-Y.L.; supervision, J.-S.L. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by a National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2022R1F1A1074316), and by a Korea Institute for Advancement of Technology (KIAT) grant funded by the MOTIE ‘The Competency Development Program for Industry specialist’ (Foster R&D specialist of parts for eco-friendly vehicle (xEV), No. P0017120).

Data Availability Statement

Data are contained within the article.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. The topology of the Vienna rectifier.
Figure 1. The topology of the Vienna rectifier.
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Figure 2. The UR of the Vienna rectifier (pf: leading).
Figure 2. The UR of the Vienna rectifier (pf: leading).
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Figure 3. Sectors of the UR and the reference voltage of the three phases with the conventional ZCDC method.
Figure 3. Sectors of the UR and the reference voltage of the three phases with the conventional ZCDC method.
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Figure 4. Occurrence of overmodulation in the conventional ZCDC method for two cases.
Figure 4. Occurrence of overmodulation in the conventional ZCDC method for two cases.
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Figure 5. The input voltage and the phase voltage in one sampling period for each case: (a) max-OVM; (b) min-OVM.
Figure 5. The input voltage and the phase voltage in one sampling period for each case: (a) max-OVM; (b) min-OVM.
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Figure 6. The block diagram of the entire control sequence of the Vienna rectifier.
Figure 6. The block diagram of the entire control sequence of the Vienna rectifier.
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Figure 7. Simulation results: (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
Figure 7. Simulation results: (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
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Figure 8. Simulation results—the waveform at the driving start-point: (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
Figure 8. Simulation results—the waveform at the driving start-point: (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
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Figure 9. Prototype of the Vienna rectifier for PFC and experiment set-up.
Figure 9. Prototype of the Vienna rectifier for PFC and experiment set-up.
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Figure 10. Experimental results—the waveforms in the transients (output power: 5.4 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
Figure 10. Experimental results—the waveforms in the transients (output power: 5.4 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
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Figure 11. Experimental results: the waveforms in the transients (output power: 9.8 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
Figure 11. Experimental results: the waveforms in the transients (output power: 9.8 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
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Figure 12. Experimental results—the waveforms in the steady state (output power: 9.8 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
Figure 12. Experimental results—the waveforms in the steady state (output power: 9.8 kW): (a) the case with the conventional ZCDC method; (b) the case with the proposed IZCDC method.
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Table 1. Definition of the ZCDC component for each sector.
Table 1. Definition of the ZCDC component for each sector.
SectorVcomp
1 v a , o f s t   *
2 v c , o f s t   *
3 v b , o f s t   *
4 v a , o f s t   *
5 v c , o f s t   *
6 v b , o f s t   *
Table 2. Parameters of the simulation and experiment.
Table 2. Parameters of the simulation and experiment.
ParametersValue
Mains (grid) voltage380 VLL,rms
Mains frequency60 Hz
DC-link voltage700 Vdc
DC-link capacitance1125 μF
Switching frequency10 kHz
Input filter inductance1.25 mH
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Lee, J.-Y.; Lee, J.-S. An Improved Zero-Current Distortion Compensation Method for the Soft-Start of the Vienna Rectifier. Electronics 2024, 13, 1806. https://doi.org/10.3390/electronics13101806

AMA Style

Lee J-Y, Lee J-S. An Improved Zero-Current Distortion Compensation Method for the Soft-Start of the Vienna Rectifier. Electronics. 2024; 13(10):1806. https://doi.org/10.3390/electronics13101806

Chicago/Turabian Style

Lee, Ju-Yeon, and June-Seok Lee. 2024. "An Improved Zero-Current Distortion Compensation Method for the Soft-Start of the Vienna Rectifier" Electronics 13, no. 10: 1806. https://doi.org/10.3390/electronics13101806

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