ActivIC: Design-Based Automatic Characterization of Mixed-Signal Integrated Circuits

This paper presents a new methodology that establishes a bridge between the design and the characterization test of mixed-signal integrated circuits. The same interface is used for the simulation, during the design phase, and for the test setup configuration, during the silicon characterization test. The information used for design validation (testbenches) during the design phase is usually not reused in the characterization of the silicon. Moreover, the feedback that designers can obtain from the lab is nowadays limited since generally designers are not familiar with the configuration of the stimulus and the visualization equipment available in the lab. This work originally uses a Cadence^® library to bridge design and test, allowing the characterization of integrated circuits through the use of interfaces that are familiar to designers: the testbench schematics used for design validation and the visualization tools used for simulation results. Using this approach, designers can interact with the silicon the same way they do with the circuit simulator. Additionally, this methodology reduces the characterization test preparation cost.