RISC-V processors have been widely used in recent years due to their open architecture. In addition, in the field of embedded systems, a small area on an integrated chip is desired from the viewpoint of cost reduction. Therefore, we will use the compressed instruction set defined for RISC-V to develop a small-area embedded processor. By adopting a compressed instruction set, the size of all parts that could be changed from 32 bits to 16 bits was reduced. As a result, we clarified that there are problems such as the overhead required to implement compressed instructions and insufficient compiler optimization.