A Dedicated Image Processing Engine Stacked with CMOS Image Array at 40nm CMOS Imager Technologies

Biay-Cheng Hseih; Khoi Le; Keith Honea; Sami Khawam; Hasib Siddiqui; Sergio Goma; RJ Lin; Chin-Hao Chang; Kuo-Yu Chou; Calvin Chao

doi:10.11485/itetr.40.40.0_5

40.40 Information Sensing Technologies(IST)

Session ID : IST2016-50

DOI https://doi.org/10.11485/itetr.40.40.0_5

Conference information

Host: Information Sensing Technologies(IST)

Name : Information Sensing Technologies(IST)

Date : November 17, 2016

A Dedicated Image Processing Engine Stacked with CMOS Image Array at 40nm CMOS Imager Technologies

*Biay-Cheng Hseih, Khoi Le, Keith Honea, Sami Khawam, Hasib Siddiqui, Sergio Goma, RJ Lin, Chin-Hao Chang, Kuo-Yu Chou, Calvin Chao

Author information

*Biay-Cheng Hseih
Qualcomm Technologies Inc. [United States]
Khoi Le
Qualcomm Technologies Inc. [United States]
Keith Honea
Qualcomm Technologies Inc. [United States]
Sami Khawam
Qualcomm Technologies Inc. [United States]
Hasib Siddiqui
Qualcomm Technologies Inc. [United States]
Sergio Goma
Qualcomm Technologies Inc. [United States]
RJ Lin
TSMC [Taiwan]
Chin-Hao Chang
TSMC [Taiwan]
Kuo-Yu Chou
TSMC [Taiwan]
Calvin Chao
TSMC [Taiwan]

Keywords: Re-Configurable Instruction Cell Array (RICA), Stacked BSI Image Sensor, Computational Photography

CONFERENCE PROCEEDINGS FREE ACCESS

Details

Abstract

Current camera systems present a huge image signal processing (ISP) programmable limitation, since the ISP algorithm is mainly hard-coded via Application Processor. We'll present the prototype development result of a Re-Configurable Instruction Cell Array (RICA), a real time, low power reprogrammable ISP engine stacked with 8MP detector array fabricated in 40nm BSI CMOS imager technology. We believe this RICA stacked image sensor technology presents an efficient programmability solution to support adjacent IOT markets, and next generation computational camera technologies.

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