Host: The Institute of Image Information and Television Engineers
This paper presents a 1.2e-, power efficient 8Mpixel, 3D-stacked CMOS image sensor (CIS) for mobile applications. The proposed CMOS image sensor (CIS) composed of low-noise PGA and low power SS-ADC. PGA is realized with comparator-based switched-capacitor architecture with a multiple sampling technique to reduce the temporal noise at high gain. To further reduce the power consumption, SS-ADC with look-ahead scheme is proposed to turn off the unnecessary power consumption. The developed CIS achieves FoM of 5.97nW*e-/pixel/s with temporal noise of 1.2e- at 20fps at 32-times sampling.