ABSTRACT
Information-centric networking (ICN) is a prominent architecture that realizes content-aware network services through name-based communications. A programmable ICN router implemented on a field-programmable gate array (FPGA) accelerator can achieve predictable performance for advanced service requirements, such as low latency and high throughput. However, owing to the tight resource constraints, implementing ICN functions on an FPGA is a huge challenge, as ICN requires frequent update tables for maintaining long and variable-length content names and access to caching devices capable of storing large-volume content. In this study, we designed and implemented an FPGA router that incorporates an ICN by applying the CCNx v1.0 protocol specification. The FPGA router implemented a unified status table on a large-capacity DRAM that stored 10 million variable-length content name prefixes. Additionally, we introduced a DRAM bank allocation that is unaffected by slow random accesses and reduces table access latency, and a Row-Bank-Column memory address mapping scheme that reduces the access time to heavily loaded in-network cache storage. We present the evaluation results of the proposed architecture implemented on the NetFPGA-SUME board, revealing 10 Gbps or 2.8 Mpps throughput and ≤ 300 ns jitter.
- Somaya Arianfar, Pekka Nikander, and Jörg Ott. 2010. On content-centric router design and implications. In Proc. of the ACM Re-Architecting the Internet Workshop. Association for Computing Machinery, New York, NY, USA, 1--6.Google ScholarDigital Library
- Hitoshi Asaeda, Atsushi Ooka, Kazuhisa Matsuzono, and Ruidong Li. 2019. Cefore: Software platform enabling content-centric networking and beyond. IEICE Transactions on Communications 102, 9 (2019), 1792--1803.Google ScholarCross Ref
- Jean-Philippe Aumasson and Daniel J. Bernstein. 2012. SipHash: A Fast Short-Input PRF. In Progress in Cryptology - INDOCRYPT 2012. Springer, Kolkata, India, 489--508.Google Scholar
- Giovanna Carofiglio, Luca Muscariello, Jordan Augé, Michele Papalini, Mauro Sardara, and Alberto Compagno. 2019. Enabling ICN in the Internet Protocol: Analysis and Evaluation of the Hybrid-ICN Architecture. In Proc. of the 6th ACM Conference on Information-Centric Networking (Macao, China) (ICN '19). Association for Computing Machinery, 55--66.Google ScholarDigital Library
- Cefore. 2023. Information-centric networking platform. https://cefore.net/ (Accessed on: June 10, 2023).Google Scholar
- Huichen Dai, Bin Liu, Yan Chen, and Yi Wang. 2012. On pending interest table in Named Data Networking. In Proc. of the ACM/IEEE 8th Symposium on Architectures for Networking and Communications Systems 2012. ACM, ew York, NY, USA, 211--222.Google ScholarDigital Library
- Open Networking Foundation. 2020. P4 Open Source Programming Language. https://p4.org/ (Accessed on: June 10, 2022).Google Scholar
- Van Jacobson, Diana K. Smetters, James D. Thornton, Michael F. Plass, Nicholas H. Briggs, and Rebecca L. Braynard. 2009. Networking named content. In Proc. of the ACM CoNEXT 2009. IEEE, Rome, Italy, 1--12.Google Scholar
- Ouassim Karrakchou, Nancy Samaan, and Ahmed Karmouch. 2020. ENDN: An Enhanced NDN Architecture with a P4-Programmable Data Plane. In Proceedings of the 7th ACM Conference on Information-Centric Networking (ICN '20). Association for Computing Machinery, New York, NY, USA, 1--11.Google ScholarDigital Library
- Yanbiao Li, Dafang Zhang, Xian Yu, Wei Liang, Jing Long, and Hong Qiao. 2014. Accelerate NDN name lookup using FPGA: Challenges and a scalable approach. In Proc. of International Conference on Field Programmable Logic and Applications (FPL). IEEE, Munich, Germany, 1--4.Google ScholarCross Ref
- Zhuo Li, Yaping Xu, Beichuan Zhang, Liu Yan, and Kaihua Liu. 2019. Packet Forwarding in Named Data Networking Requirements and Survey of Solutions. IEEE Communications Surveys and Tutorials 21, 2 (Nov. 2019), 1950--1987.Google ScholarCross Ref
- P.V. Mockapetris. 1987. Domain names - implementation and specification. RFC 1035. https://www.rfc-editor.org/info/rfc1035Google Scholar
- Marc Mosko, Ignacio Solis, and Christopher A. Wood. 2019. Content-Centric Networking (CCNx) Messages in TLV Format. RFC 8609. Google ScholarDigital Library
- Marc Mosko, Ignacio Solis, and Christopher A. Wood. 2019. Content-Centric Networking (CCNx) Semantics. RFC 8569. Google ScholarDigital Library
- Gabriel S. Niemiec, Luis M. S. Batista, Alberto E. Schaeffer-Filho, and Gabriel L. Nazar. 2020. A Survey on FPGA Support for the Feasible Execution of Virtualized Network Functions. IEEE Communications Surveys and Tutorials 22, 1 (Sept. 2020), 504--525.Google ScholarDigital Library
- Atsushi Ooka, Shingo Ata, Kazunari Inoue, and Masayuki Murata. 2015. High-speed Design of Conflict-less Name Lookup and Efficient Selective Cache on CCN Router. IEICE Transactions on Communications E98-B, 04 (April 2015), 607--620.Google Scholar
- Diego Perino and Matteo Varvello. 2011. A reality check for Content Centric Networking. In Proc. of the ACM SIGCOMM workshop on Information-centric networking. Association for Computing Machinery, New York, NY, USA, 44--49.Google ScholarDigital Library
- Renesas. 2017. Network Packet Search Solution Catalog. https://www.renesas.com/jp/ja/document/bro/network-packet-search-solution-catalogGoogle Scholar
- Randall Rooney and Neal Koyle. 2019. DDR5 SDRAM: New Features. White Paper. Micron. https://media-www.micron.com/-/media/client/global/documents/products/white-paper/ddr5_new_features_white_paper.pdfGoogle Scholar
- G. Rossini, D. Rossi, M. Garetto, and E. Leonardi. 2014. Multi-Terabyte and multi-Gbps information centric routers. In Proc. of IEEE INFOCOM 2014. IEEE, Toronto, ON, Canada, 181--189.Google Scholar
- Urs Schnurrenberger. 2017. Comparing apples to apples in ICN. In Proc. of 14th IEEE Annual Consumer Communications and Networking Conference (CCNC). IEEE, Las Vegas, NV, USA, 89--94.Google ScholarDigital Library
- Junxiao Shi, Davide Pesavento, and Lotfi Benmohamed. 2020. NDN-DPDK: NDN Forwarding at 100 Gbps on Commodity Hardware. In Proceedings of the 7th ACM Conference on Information-Centric Networking (ICN '20). Association for Computing Machinery, New York, NY, USA, 30--40.Google ScholarDigital Library
- Salvatore Signorello, Radu State, Jérôme François, and Olivier Festor. 2016. NDN.p4: Programming information-centric data-planes. In 2016 IEEE NetSoft Conference and Workshops (NetSoft). Seoul, Korea, 384--389. Google ScholarCross Ref
- Junji Takemasa, Yuki Koizumi, and Toru Hasegawa. 2017. Toward an Ideal NDN Router on a Commercial Off-the-Shelf Computer. In Proc. of the 4th ACM Conference on Information-Centric Networking (ICN '17). Association for Computing Machinery, 43--53.Google ScholarDigital Library
- Junji Takemasa, Yuki Koizumi, and Toru Hasegawa. 2022. Terabytes and Terabits/s Packet Caching in ICN Routers using Programmable Switches. In Proc. of the 11th International Conference on Cloud Networking (CloudNet) (Paris, France). IEEE, 67--72.Google ScholarCross Ref
- Zahid Ullah, Manish Kumar Jaiswal, Y.C. Chan, and Ray C.C. Cheung. 2012. FPGA Implementation of SRAM-based Ternary Content Addressable Memory. In Proc. of 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops and PhD Forum. IEEE, Shanghai, China, 383--389.Google Scholar
- Matteo Varvello, Diego Perino, and Jairo Esteban. 2012. Caesar: A Content Router for High Speed Forwarding. In Proc. of the ACM SIGCOMM workshop on Information-centric networking (Helsinki, Finland) (ICN '12). ACM, 73--78.Google ScholarDigital Library
- Yi Wang, Keqiang He, Huichen Dai, Wei Meng, Junchen Jiang, Bin Liu, and Yan Chen. 2012. Scalable Name Lookup in NDN Using Effective Name Component Encoding. In Proc. the IEEE 32nd International Conference on Distributed Computing Systems 2012. IEEE, Macau, China, 688--697.Google ScholarDigital Library
- Yi Wang, Tian Pan, Zhian Mi, Huichen Dai, Xiaoyu Guo, Ting Zhang, Bin Liu, and Qunfeng Dong. 2013. NameFilter: Achieving fast name lookup with low memory cost via applying two-stage Bloom filters. In Proc. of the IEEE INFOCOM 2013. IEEE, Turin, Italy, 95--99.Google ScholarCross Ref
- Yi Wang, Yuan Zu, Ting Zhang, Kunyang Peng, Qunfeng Dong, Bin Liu, Wei Meng, Huichen Dai, Xin Tian, Zhonghu Xu, Hao Wu, and Di Yang. 2013. Wire speed name lookup: a GPU-based approach. In Proc. of the 10th USENIX Conference on Networked Systems Design and Implementation. USENIX Association, Lombard, IL, 199--212.Google Scholar
- Xilinx. 2021. 7 Series Product Tables and Product Selection Guide(XMP101). Selection Guide. https://japan.xilinx.com/content/dam/xilinx/support/documents/selection-guides/7-series-product-selection-guide.pdfGoogle Scholar
- Wei You, B. Mathieu, P. Truong, J. Peltier, and G. Simon. 2012. DiPIT: A Distributed Bloom-Filter Based PIT Table for CCN Nodes. In Proc. of the 21st ICCCN 2012. IEEE, Munich, Germany, 1--7.Google Scholar
- Lixia Zhang, Deborah Estrin, Jeffrey Burke, Van Jacobson, James D. Thornton, Diana K. Smetters, Beichuan Zhang, Gene Tsudik, KC Claffy, Dmitri Krioukov, Dan Massey, Christos Papadopoulos, Tarek Abdelzaher, Lan Wang, Patrick Crowley, and Edmund Yeh. 2010. Named data networking (NDN) project. Technical Report., 24 pages. http://named-data.net/techreport/TR001ndn-proj.pdfGoogle Scholar
- Noa Zilberman, Yury Audzevich, G. Adam Covington, and Andrew W. Moore. 2014. NetFPGA SUME: Toward 100 Gbps as Research Commodity. IEEE Micro 34, 5 (July 2014), 32--41.Google ScholarCross Ref
Index Terms
- CCNx Router on FPGA Accelerator Achieving Predictable Performance
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