Hongbo Kang
Guy E. Blelloch
Laxman Dhulipala
Yan Gu
Phillip B. Gibbons
ABSTRACT
Processing-in-memory (PIM) is an emerging technology to alleviate the high cost of data movement by pushing computation into/near memory modules. There is an inherent tension, however, between minimizing communication (data movement) and achieving load balance in PIM systems in the presence of workload skew. This work introduces PIM-tree, a PIM-based index that simultaneously achieves low communication, good load balance, and low space consumption. It achieves good theoretical bounds in the PIM Model and efficient on a real-world PIM machine, outperforming prior PIM-based and state-of-the-art CPU-based indexes.
- UPMEM Tech. https://www.upmem.com/technology/, Accessed March 20, 2023.Google Scholar
- T. Brown. Techniques for constructing efficient lock-free data structures. PhD thesis, University of Toronto (Canada), 2017.Google Scholar
- J. Choe et al. Concurrent data structures with near-data-processing: an architecture-aware implementation. In ACM Symposium on Parallelism in Algorithms and Architectures, pages 297--308, 2019.Google ScholarDigital Library
- J. Jeddeloh et al. Hybrid memory cube new DRAM architecture increases density and performance. In 2012 Symposium on VLSI Technology, 2012.Google ScholarCross Ref
- H. Kangetal. The processing-in-memorymodel. In ACM Symposium on Parallelism in Algorithms and Architectures, pages 295--306, 2021.Google Scholar
- Z. Liu et al. Concurrent data structures for near-memory computing. In ACM Symposium on Parallelism in Algorithms and Architectures, page 235--245, 2017.Google ScholarDigital Library
- O. Mutlu et al. A Modern Primer on Processing in Memory. Springer Nature Singapore, Singapore, 2023.Google ScholarCross Ref
Index Terms
- PIM-tree: A Skew-resistant Index for Processing-in-Memory (Abstract)
Recommendations
PIM-trie: A Skew-resistant Trie for Processing-in-Memory
SPAA '23: Proceedings of the 35th ACM Symposium on Parallelism in Algorithms and ArchitecturesMemory latency and bandwidth are significant bottlenecks in designing in-memory indexes. Processing-in-memory (PIM), an emerging hardware design approach, alleviates this problem by embedding processors in memory modules, enabling low-latency memory ...
To PIM or not for emerging general purpose processing in DDR memory systems
ISCA '22: Proceedings of the 49th Annual International Symposium on Computer ArchitectureAs Processing-In-Memory (PIM) hardware matures and starts making its way into normal compute platforms, software has an important role to play in determining what to perform where, and when, on such heterogeneous systems. Taking an emerging class of PIM ...
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System
The Data-Intensive Architecture (DIVA) system employs Processing-In-Memory (PIM) chips as smart-memory coprocessors. This architecture exploits inherent memory bandwidth both on chip and across the system to target several classes of bandwidth-limited ...
Comments