Cristian Tirelli
ABSTRACT
The need for low power and high performance architectures - that can efficiently handle compute-intensive tasks while working with tight power and resource constraints - has been steadily rising due to the constant growth of computational demands in everyday applications.
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Cross Ref
- Mahesh Balasubramanian and Aviral Shrivastava. 2022. PathSeeker: A Fast Mapping Algorithm for CGRAs. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (2022), 268--273.Google ScholarCross Ref
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- Manupa Karunaratne, Aditi Kulkarni Mohite, Tulika Mitra, and Li-Shiuan Peh. 2017. HyCUBE: A CGRA with reconfigurable single-cycle multi-hop interconnect. In Proceedings of the 54th Design Automation Conference. 1--6.Google ScholarDigital Library
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- Cristian Tirelli, Lorenzo Ferretti, and Laura Pozzi. 2023. SAT-Maplt: A SAT-based Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures. Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (2023), 1--6.Google Scholar
Index Terms
- SAT-MapIt: An Open Source Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures
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