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TimingCamouflage+ Decamouflaged

Published:05 June 2023Publication History

ABSTRACT

In today's world, sending a chip design to a third party foundry for fabrication poses a serious threat to one's intellectual property. To keep designs safe from adversaries, design obfuscation techniques have been developed to protect the IP details of the design. This paper explains how the previously considered secure algorithm, TimingCamouflage+, can be thwarted and the original circuit can be recovered [15]. By removing wave-pipelining false paths, the TimingCamouflage+ algorithm is reduced to the insecure TimingCamouflage algorithm [16]. Since the TimingCamouflage algorithm is vulnerable to the TimingSAT attack, this reduction proves that TimingCamouflage+ is also vulnerable to TimingSAT and not a secure camouflaging technique [7]. This paper describes how wave-pipelining paths can be removed, and this method of handling false paths is tested on various benchmarks and shown to be both functionally correct and feasible in complexity.

References

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    • Published in

      cover image ACM Conferences
      GLSVLSI '23: Proceedings of the Great Lakes Symposium on VLSI 2023
      June 2023
      731 pages
      ISBN:9798400701252
      DOI:10.1145/3583781

      Copyright © 2023 Owner/Author

      This work is licensed under a Creative Commons Attribution International 4.0 License.

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      Association for Computing Machinery

      New York, NY, United States

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      • Published: 5 June 2023

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