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A Study of Network-on-Chip Performance

Published:04 November 2021Publication History

ABSTRACT

Network-on-Chip (NoC) technology was introduced by incorporating the concepts of computer networks for on-chip communication. The packet based communication has advantages over conventional bus based communication architectures. In this work we explore the performance of NoC by varying the parameters of NoC like topology, injection rate, routing algorithm, traffic pattern ...etc. We compare the throughput and latency for different configurations of NoC. From the performance analysis a mesh network with 4x4 size, number of virtual channels 4, traffic pattern as tornado and routing algorithm as dimension order routing has the low latency and high throughput.

References

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  • Published in

    cover image ACM Other conferences
    IC3-2021: Proceedings of the 2021 Thirteenth International Conference on Contemporary Computing
    August 2021
    483 pages
    ISBN:9781450389204
    DOI:10.1145/3474124

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    Publication History

    • Published: 4 November 2021

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