ABSTRACT
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- Session details: Gate sizing
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The J-K Gate
For many years two-input NAND, AND, NOR, OR and EX-OR gates have been commercially available as cheap quad TTL integrated circuits (IC's). Ideas on quad programmable two-input gates (three inputs per gate) have been published in the literature but have ...
Session details: Oral Session 3: Multimedia Applications (Oral presentations)
ICMR '17: Proceedings of the 2017 ACM on International Conference on Multimedia RetrievalPower vs. delay in gate sizing: conflicting objectives?
ICCAD '95: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided designAbstract: The problem of sizing gates for power-delay tradeoffs is of great interest to designers. In this work, the theoretical basis for gate sizing under delay and power considerations is presented, and results on a practical implementation are ...
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