A design methodology for a very low noise figure common-source LNA

Yingbo Zhu; Said F. Al-Sarawi; Michael Liebelt

doi:10.1117/12.580705

28 February 2005 A design methodology for a very low noise figure common-source LNA

Yingbo Zhu, Said F. Al-Sarawi, Michael Liebelt

Proceedings Volume 5649, Smart Structures, Devices, and Systems II; (2005) https://doi.org/10.1117/12.580705
Event: Smart Materials, Nano-, and Micro-Smart Systems, 2004, Sydney, Australia

Abstract

The design of common source (CS) Low Noise Amplifiers (LNA) for wireless receivers is presented. The design trade-offs between main criteria are discussed. An extra gate-to-source capacitor is added to the input transistor to reduce the transistor dimension while still satisfying the noise matching. The small MOSFET also improves the LNA linearity with comparatively small drain-source current. The extra gate-to-source capacitor is introduced by the bonding-pad parasitic capacitor; hence a negative effect parasitic capacitance is turned into a useful capacitor. The simulated Noise Figure (NF) of two single-ended LNAs using 0.18 μm CMOS process achieve 0.62 dB and 0.92 dB at 2.4 GHz and 5.25 GHz respectively while matching a 50 ohm impedance.

Citation Download Citation

Yingbo Zhu, Said F. Al-Sarawi, and Michael Liebelt "A design methodology for a very low noise figure common-source LNA", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); https://doi.org/10.1117/12.580705

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