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On product overlay (OPO) is one of the most critical parameters for the continued scaling according to Moore’s law. Without good overlay between the mask and the silicon wafer inside the lithography tool, yield will suffer. As the OPO budget shrinks, non-lithography process induced stress causing in-plane distortions (IPD) becomes a more dominant contributor to the shrinking overlay budget. To estimate the process induced in-plane wafer distortion after cucking the wafer onto the scanner board, a high-resolution measurement of the freeform wafer shape of the unclamped wafer, with the gravity effect removed, is needed. A high-resolution wafer shape map using a feed-forward prediction algorithm, as has been published by ASML, can account for both intra and inter die wafer distortions, minimizing the need for alignment marks on the die and wafer in addition to that it can be performed at any lithography layer. Up until now, the semiconductor industry has been using Coherent Gradient Sensing (CGS) interferometry or Fizeau interferometry to generate the wave front phase from the reflecting wafer surface to measure the free form wafer shape. However, these techniques have only been available for 300mm wafers. In this paper we introduce Wave Front Phase Imaging (WFPI), a new technique that can measure the free form wafer shape of a patterned silicon wafer using only the intensity of the reflected light. In the WFPI system, the wafer is held vertically to avoid the effects of gravity during measurements. The wave front phase is then measured by acquiring only the 2-dimensional intensity distribution of the reflected non-coherent light at two or more distances along the optical path using a standard, low noise, CMOS sensor. This method allows for very high data acquisition speed, equal to the camera’s shutter time, and a high number of data points with the same number of pixels as available in the digital imaging sensor. In the measurements presented in this paper, we acquired 7.3 million data points on a full 200mm patterned silicon wafer with a lateral resolution of 65μm. The same system presented can also acquire data on a 300mm silicon wafer in which case 16.3 million data points with the same 65μm spatial resolution were collected.
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