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Double-sided silicon vias (DSSVs) interconnection for large-sized interposer fabrication

Haibo Yang (System Packaging and Integration Technology Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China and University of Chinese Academy of Sciences, Beijing, China)
Fengwei Dai (System Packaging and Integration Technology Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China)
Liqiang Cao (System Packaging and Integration Technology Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China)
Guofu Cao (Experimental Physics Division, Institute of High Energy Physics, Chinese Academy of Sciences, Beijing, China and University of Chinese Academy of Sciences, Beijing, China)
Zhidan Fang (System Packaging and Integration Technology Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China)
Qidong Wang (System Packaging and Integration Technology Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China)

Microelectronics International

ISSN: 1356-5362

Article publication date: 20 January 2023

Issue publication date: 17 March 2023

76

Abstract

Purpose

A large-scale detection system with more data in short time bins, small dead space and small signal identification is the ideology the scientists pursuing. These proposed demands are able to be solved by 2.5 D integration. The substance of a 2.5 D integration is called silicon interposer, which consists of the through silicon via (TSV) and redistribution layer. However, the state-of-the-art silicon interposer is not able to sustain its own mechanical strength with the detector/readout array often sitting as standalone in large science facilities and fails to reduce the expansions on the installation of the components due to its insufficient thickness and size. This study aims to propose a moderation of current interposer with large-sized, standalone properties.

Design/methodology/approach

This paper proposes an interposer based on double-sided silicon vias (DSSVs) interconnection. Unlike conventional interposer that is interconnected by TSVs, DSSVs interposer is interconnected by top vias (T-vias) and bottom vias (B-vias).

Findings

The fabrication process of DSSVs interposer is introduced, and the superiority of the double-sided interconnection process with two etch-stop layers is described in detail. The impact of different T-vias depth on DSSVs interconnections in the same wafer is discussed and two times PI opening processes are proposed to eliminate air bubbles in the B-via. The relationship between the interposer thickness and warpage is studied by finite element analysis simulation and experiment. The prototype of the DSSVs interposer with a size of 100  × 100 mm and a thickness of 318.2 µm is fabricated, and electrical tests including short tests and continuity tests are carried out.

Originality/value

This paper proposes a large-sized and stand-alone interposer based on DSSVs interconnection.

Keywords

Acknowledgements

The authors gratefully acknowledge the support from the National Natural Science Foundation of China (NSFC) under Grant No. 12075269.

Citation

Yang, H., Dai, F., Cao, L., Cao, G., Fang, Z. and Wang, Q. (2023), "Double-sided silicon vias (DSSVs) interconnection for large-sized interposer fabrication", Microelectronics International, Vol. 40 No. 2, pp. 81-88. https://doi.org/10.1108/MI-07-2022-0139

Publisher

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Emerald Publishing Limited

Copyright © 2022, Emerald Publishing Limited

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