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CMOS blocks for on-chip RF test

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Abstract

In this paper we present two designs of CMOS blocks suitable for integration with RF frontend blocks for test purposes. Those are a programmable RF test attenuator and a reconfigurable low noise amplifier (LNA), optimized with respect to their function and location in the circuit. We discuss their performances in terms of the test- and normal operation mode. The presented application model aims at a transceiver under loopback test with enhanced controllability and detectability. The circuits are designed for 0.35μm CMOS process. Simulation results of the receiver frontend operating in 2.4 GHz band are presented showing tradeoffs between the performance and test functionality.

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Authors and Affiliations

  1. Department of Electrical Engineering, Linkoping University, SE-581 83, Linkoping, Sweden

    Rashad Ramzan & Jerzy Dąbrowski

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  1. Rashad Ramzan
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  2. Jerzy Dąbrowski
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Correspondence to Rashad Ramzan.

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Rashad M. Ramzan did his graduation in Electrical Engineering with Honors from University of Engineering and Technology Lahore, Pakistan in 1994. After Graduation he joined Advanced Engineering Research Organization and worked on low noise electronics, micro-processors, micro-controller, SMPS and PCB design for more than four years. In 1999 he joined Enabling Technology Islamabad, a branch office of the same company in Irvine CA. At Enabling Technology, he was a part of the team who designed a media processing ASIC for VoIP application for future IP enabled exchanges. He did his masters in SoC design from Royal Institute of Technology (KTH), Stockholm. Currently he is working toward his Ph.D degree in testable and reconfigurable RF circuits. His reaserch interests are mainly focused on RF circuits, fully integrated transceivers, design for testability and high speed PCB design.

Jerzy J. Dąbrowski received the Ph.D. and D.S. degrees form Silesian University of Technology (SUT), Gliwice, Poland, in 1987 and 2001, respectively. He has specialized in macromodeling and simulation of analog and mixed-signal circuits. Currently, he is an Associate Professor at Linköping University, Sweden, and at SUT, Gliwice. His recent research interests are also in RF ICs design and design-for-testability for analog/RF circuits. He has published over 70 research papers in international journals and conference proceedings. He holds 12 patents (as a coauthor) in switched-mode power supplies and instrumentation circuits. He is a member of IEEE, PTETiS and the Commission of Electronics PAN (Poland).

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Ramzan, R., Dąbrowski, J. CMOS blocks for on-chip RF test. Analog Integr Circ Sig Process 49, 151–160 (2006). https://doi.org/10.1007/s10470-006-9615-2

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  • DOI: https://doi.org/10.1007/s10470-006-9615-2

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