Impacts of plasma-induced damage due to UV light irradiation during etching on Ge fin fabrication and device performance of Ge fin field-effect transistors

We investigated the impacts of plasma-induced damage due to UV light irradiation during etching on Ge fin fabrication and the device performance of Ge fin field-effect transistors (Ge FinFETs). UV light irradiation during etching affected the shape of the Ge fin and the surface roughness of the Ge fin sidewall. A vertical and smooth Ge fin could be fabricated by neutral beam etching without UV light irradiation. The performances of Ge FinFETs fabricated by neutral beam etching were markedly improved as compared to those of Ge FinFETs fabricated by inductively coupled plasma etching, in which the UV light has an impact.

H igh performance of Si complementary metal-oxidesemiconductor (CMOS) devices has been realized by their miniaturization. The gate length of advanced CMOS field-effect transistors (CMOSFETs) has become smaller than 20 nm. To improve the performance of nanometer-scale CMOSFETs, in addition to performing their miniaturization, it is also necessary to replace the Si channel with high-mobility materials such as Ge and III-V compounds. In particular, since the carrier (electron and hole) mobility in Ge is higher than that in Si. Ge is a promising highmobility channel. [1][2][3][4][5][6] Furthermore, a multichannel is required to improve the electrostatic control of the gate electrode of Ge MOS FETs (MOSFETs). There are two main methods of Ge fin fabrication: epitaxial growth of Ge from a SiGe=Si substrate 3) and conventional top-down etching. 6) Fin structure fabrication in Ge fin FETs (FinFETs) on Ge-on-insulator (GeOI) substrates is usually performed by inductively coupled plasma (ICP) etching. However, during ICP etching, the UV light generated from the ICP and charge build-up by ionized atoms cause plasma-induced damage. A concern here is that such etching damage reduces the performance and reliability of Ge-channel CMOS devices. In particular, since the thermal resistance of Ge is very low compared to that of Si, the inability to recover the damage by high-temperature thermal annealing (≥1000°C) is a critical issue.
In this work, we studied the impacts of plasma-induced damage due to UV light irradiation during etching on Ge fin fabrication and the device performance of Ge FinFETs.
Ge CMOS FinFETs were formed on (100) GeOI substrates. The Ge fin channel was formed by both conventional ICP etching and neutral beam etching with pure Cl 2 gas. Essentially, neutral beam etching consists of an ICP source and a high-aspect-ratio carbon aperture plate, wherein accelerated ions are effectively converted to an energy-controlled neutral beam through charge transfer processes and most of the UV light is shaded through absorption processes from the ICP, as shown in Fig. 1. 7,8) The neutral beam energy can be controlled by applying RF bias power to the aperture plate. Ge fin structures were etched with chemical vapor deposited-SiO 2 hard masks, which were patterned by electron beam (EB) lithography and conventional ICP etching. A gate dielectric of 3.0 nm HfO 2 =2.0 nm Al 2 O 3 (equivalent oxide thickness = 2.1 nm) was deposited by atomic layer deposition. Subsequently, a metal gate of 50 nm TiN was formed by physical vapor deposition. The gate electrode was formed by EB lithography and chemical etching. The source and drain (S=D) of Ge n-and p-type FinFETs were formed by P + and BF 2 + implantation, respectively, with a dose of 2.0 × 10 15 cm −2 at 10 keV. After Al electrode metallization, forming gas annealing was performed at 300°C for 30 min in 3% H 2 .
A physical analysis was performed that involved crosssectional scanning electron microscopy (SEM) and transmission electron microscopy (TEM) observations. In the electrical measurement of the Ge FinFETs, to suppress charge trapping in the high-k gate stack and self-heating during the current-voltage (I-V ) measurement, a pulsed I-V measurement was performed for evaluating transconductance (g m ). Figure 1 shows a schematic illustration of the neutral beam etching apparatus. In this neutral beam etching apparatus, accelerated negative ions (Cl − , F − , etc.) are efficiently neutralized by their passage through the carbon aperture. The plasma consists mainly of negative and positive ions in our pulse time modulated discharge. 9) Both Cl + and Cl − ions can be accelerated alternately by the RF electric field applied to the aperture plate. Since the neutralization efficiency of Cl − ions (where electron detachment occurs by their collision with the aperture sidewall) is much higher than that of Cl + ions (where electron attachment occurs), the Cl − ions are preferentially utilized by the application of negative DC bias to the top electrode. The kinetic energy of the neutral beam can be controlled by varying the RF bias power. There are two advantages of the neutral beam etching process. 1) The wafer is not exposed to the UV light generated from the plasma through the high-aspect-ratio carbon aperture plate. 2) Ions are efficiently neutralized by their collision with the carbon aperture plate. Under the neutral beam etching condition adopted in this work, the neutralization efficiency of Cl − ions is more than 95%. 10) Thus, in neutral beam etching, the influences of the UV light and charge build-up can be eliminated and defect-free etching can be realized.
We investigated the impact of plasma-induced damage due to UV light irradiation during the etching process on Ge fin fabrication. In our experiments, conditions other than the UV light irradiation, such as the flux of the reactive species and the physical bombardment energy, were kept the same in both etching cases (i.e., ICP etching and neutral beam etching) because the opening area ratio of the aperture plates was fixed at 50% in both these cases. The Ge etch rate in ICP dry etching was one order of magnitude larger than that in neutral beam etching despite the use of completely identical chamber configurations and ICP discharge conditions, with the exception of the aspect ratio of the aperture plates. Thus, we compared the Ge fin profiles at the same over-etching ratio of 30%. In ICP etching, the Ge fin has a trapezoidal shape, as shown in Fig. 2(a). The trapezoidal shape indicates that a horizontal etching reaction occurs at a constant etch rate during the etching process. In neutral beam etching, a vertical Ge fin can be formed without any side etching, which is in contrast to the case of ICP etching, as shown in Fig. 2(b). This result indicates that the Ge fin is etched only by the vertically directional Cl neutral beam 8) and the horizontal etching reaction never occurs spontaneously. The trapezoidal shape shown in Fig. 2 Neutral Beam Etching  Thus, the plasma-induced damage due to UV light was found to have an impact on the surface roughness of the Ge fin sidewall. UV light irradiation from the plasma to the surface is isotropic, whereas ion irradiation is anisotropic. As a result, UV light is mainly irradiated on the surface of the etched sidewall. The penetration depth of UV light irradiation from 220 to 380 nm in Si has been estimated to be about 10 nm. 11) Since the extinction coefficient k of Ge in this wavelength region is slightly smaller than that of Si, 12) the penetration depth of UV light irradiation in the case of Ge is larger than that in the case of Si. This UV absorption region is heated or directly attacked by the UV photons with energy much higher than the bond energy of Ge, and the Ge bonds consequently weaken or break. This is the reason why the damage layer is formed by UV light irradiation. In conventional ICP etching with UV light irradiation, the Ge bonds in the damage layer (≥10 nm in depth) formed by UV light irradiation break or weaken; therefore, the damage layer enhances the chemical reactions. As a result, the etching process of Ge is followed by multilayer etching in the damage layer deeper than 10 nm, as shown in Fig. 4(a), rather than by atomic layer etching. On the other hand, in the case of neutral beam etching without UV light irradiation, the Ge surface is not damaged, and therefore, a surface dangling bond is formed only on the atomic layer and it undergoes a chemical reaction with the reactive species. Then, atomic layer etching can be realized. The above behaviors are related to the difference in the surface roughness caused by the UV light irradiation. Next, to clarify the impact of the plasma-induced damage due to UV light irradiation during the etching process on the uniformity of Ge etching, we examined the surface roughness of the Ge(110) substrate after ICP etching and neutral beam etching by means of atomic force microscopy. The etching conditions were the same as those in the fin fabrication described above. Ge(110) corresponds to the plane direction of the fin sidewall. The average surface roughness (R a ) of Ge(110) was 0.27 nm after ICP etching (not shown). On the other hand, R a of Ge(110) after neutral beam etching was 0.16 nm, which is almost the same as R a of the initial Ge(110) substrate (not shown). This means that neutral beam etching without UV light irradiation can uniformly etch Ge. Further, the surface roughness of Ge(110) after neutral beam etching is consistent with the results in Figs. 3(c) and 3(d) (not shown). It was found that in the case of Ge etching, the UV light affected the surface roughness as well as the uniformity of the etching. Thus, to ensure the fabrication of a damage-free vertical and smooth fin, it is necessary to perform the etching process without UV light irradiation, for example, by neutral beam etching.
We investigated the influence of UV light irradiation during the fin fabrication on the performance of n-and p-type Ge FinFETs. Figure 5(a) shows the |I d |-V g characteristics of n-and p-type Ge FinFETs with a gate length (L g ) of 500 nm fabricated by neutral beam etching, as measured by the DC   I-V method. The n-and p-type Ge FinFETs fabricated by neutral beam etching without UV light irradiation exhibit excellent |I d |-V g characteristics. However, I on for n-and p-type Ge FinFETs obtained in the DC I-V measurement is estimated to be less than 10% of that obtained in the pulsed I-V measurement, which is due to charge trapping in the high-k gate stack and self-heating during the I-V measurement. To suppress these effects, we precisely estimated the on current (I on ) and the maximum g m (g m,max ) by the pulsed I-V method. In Fig. 5(b), it is clearly seen that for both n-and p-type FinFETs, the |I d |-V d characteristics of the Ge FinFET fabricated by neutral beam etching are markedly improved as compared to those of the FinFETs fabricated by ICP etching. The difference between the |I d | improvement ratios of the nFinFET and pFinFET fabricated by neutral beam etching is related to the difference in the carrier masses in these FinFETs. Since the electron mass is lighter than the hole mass, the electrons in the nFinFET are easily affected by the etching damage. Figure 6 shows the maximum g m (g m,max ) at V d = ±0.5 V as a function of fin thickness (T fin ) in a Ge nFinFET (a) and a Ge pFinFET (b) fabricated by ICP etching and neutral beam etching. g m,max for the Ge FinFET fabricated by neutral beam etching is two times that for the nFinFET, and 10% higher for the pFinFET than those of the FinFETs fabricated by ICP etching, regardless of T fin . Figure 7 shows g m,max as a function of the subthreshold swing (SS) for n-and p-type Ge FinFETs fabricated by ICP etching and neutral beam etching. For both the n-and the p-type Ge FinFETs, g m,max =SS = m in the case of neutral beam etching is superior to that in the case of ICP etching. Furthermore, since there is no plasma-induced damage due to UV light irradiation in neutral beam etching, the interface state density (not shown) and surface roughness [ Fig. 3(d)] are lower than those in the case of ICP etching. This is the reason for the improved g m,max and SS for the n-and p-type Ge FinFETs fabricated by neutral beam etching (Figs. 6 and 7). In summary, we investigated the impacts of plasmainduced damage due to UV light irradiation during etching on Ge fin fabrication and the device performance of Ge FinFETs. We found that the plasma-induced damage due to UV light irradiation affects the shape of the Ge fin and the surface roughness of the fin sidewall. A vertical and atomically flat fin can be realized by neutral beam etching without UV light irradiation. The performances of n-and p-type Ge FinFETs fabricated by neutral beam etching are greatly improved as compared to those of FinFETs fabricated by conventional ICP etching, which is affected by UV light. This means that the plasma-induced damage due to UV light irradiation has an impact on the device performances. Thus, it is concluded that damage-free fabrication is essential for the fin etching process of future Ge CMOS FinFETs.