A 42 mV startup ring oscillator using gain-enhanced self-bias inverters for extremely low voltage energy harvesting

This paper presents a ring oscillator (ROSC) capable of operating at an extremely low supply voltage. The proposed ROSC consists of gain-enhanced self-bias inverters. The voltage gain of the proposed inverter is improved by controlling the body bias voltages. Measurements of a prototype chip demonstrated that our proposed ROSC can operate at an extremely low supply voltage of 42 mV.


Introduction
One of the challenging research areas in microelectronics is the development of Internet of Things (IoT) devices that collect various data from our surroundings and utilize them for the purpose of improving lifestyle, industry, agriculture and medical science. [1][2][3][4][5][6] A low-power and highly efficient power management system (PMS) using environmental energy will be a key component in the construction of such devices. Its creation also presents a technical challenge because of the large number of IoT devices to be installed world wide. [7][8][9][10][11][12][13][14][15][16][17][18][19][20] Thermoelectric generators (TEGs) have attracted attention as an alternative energy source because they can generate energy from a subtle temperature difference. [21][22][23][24] However, the output voltage of a TEG is too low to operate application circuits and systems. To address this issue, DC-DC converters are used to generate a sufficiently higher voltage. [25][26][27][28][29][30][31][32][33][34][35] As a first step in the realization of such converters, an extremely low voltage oscillator is required to start the PMS. [32][33][34][35][36][37][38][39] A ring oscillator (ROSC) consisting of CMOS inverters is widely used because it can operate at lower supply voltages. However, the voltage gain of the inverter decreases as the supply voltage decreases, and thus it is difficult to operate at a sub-100 mV supply voltage, which is the typical output voltage range of a TEG with a small temperature difference.
In light of this background, we propose an ROSC capable of operating at an extremely low supply voltage. In contrast to our previous work, 40) here, we discuss its circuit operation and analyze its effectiveness in more detail. In addition, we demonstrate that our proposed ROSC can operate at an extremely low voltage of 42 mV. Our ROSC consists of gainenhanced self-bias inverters (SBIs). The voltage gain of the proposed SBI is improved by controlling the body bias voltages.
This paper is organized as follows. In Sect. 2, we present our proposed self-bias inverter. In Sect. 3, we discuss the simulated results. In Sect. 4, we show the measured results of our prototype chip. In Sect. 5, we conclude the paper. Figure 1 shows a schematic of the ROSC. An odd number of inverters are connected in series and the output node is fed back to the first-stage input node. For oscillation to begin, the voltage gain of the inverter (| | A INV ) must be greater than unity, 41) Figure 2 shows a schematic of a CMOS inverter and an illustration of the voltage transfer curve (VTC) at a low supply voltage V DD . The V DD is set to a lower voltage than the threshold voltage V TH of the MOSFET and thus MOSFETs are operated in the subthreshold region. In the subthreshold region, the drain current of the MOSFET is given by

Proposed gain-enhanced inverter
is the pre-exponential factor of the subthreshold current, μ is the carrier mobility, OX OX OX is the gate-oxide capacitance, ε OX is the oxide permittivity, t OX is the oxide thickness, W/L is the aspect ratio, W is the channel width, L is the channel length, η is the subthreshold slope factor, is the thermal voltage, k B is the Boltzmann constant, T is the absolute temperature, q is the elementary charge, V GS is the gatesource voltage, and V DS is the drain-source voltage of the MOSFET. 41,42)  The switching voltage of the CMOS inverter can be derived on the condition that currents flowing into both the nMOSFET and pMOSFET are equal (I N = I P ), and is given by , and is expressed as Note that, as shown in Eq. (5), the voltage gain of the CMOS inverter decreases as V DD decreases.
As shown in Eq. (3), the VTC strongly depends on the threshold voltage difference between the nMOSFET and the pMOSFET. The VTC shifts according to the value of ΔV TH [see Fig. 2(b)]. Thus, we consider using this characteristic to improve the voltage gain of the inverter. Figure 3(a) shows a schematic of our proposed self-bias inverter (SBI). The SBI consists of two inverters. The output voltage of the feedback inverter is connected to the body of the main inverter and controls the V TH of the main inverter's MOSFETs. The threshold voltage is expressed as where V BS is the body-source voltage, V TH0 is the threshold voltage at V BS = 0 V, γ is the proportional factor, and f F is the surface potential. 43) When V IN is low, V OUT and the output voltage of the feedback inverter become high and low, and V TH,P and V TH,N become low and high, respectively. Therefore, ΔV TH is higher than 0 V (ΔV TH > 0). On the other hand, when V IN is high, V OUT and the output voltage of the feedback inverter become low and high, and V TH,P and V TH,N become high and low, respectively. Therefore, DV TH is lower than 0 V (D < V 0 TH ). Thus, the VTC of our SBI comes close to two curves and the voltage gain is significantly improved, as shown in Fig. 3 The maximum voltage gain of the SBI can be calculated by differentiating Eq. (3) with V IN and is given by By comparing Eq. (7) with Eq. (5), the voltage gain of the SBI is improved by (6), the term can be calculated as where V B is the body bias voltage. In Eq. (8), I N is positive because the V B is generated by using the feedback inverter, and thus the term shown in Eq. (8) is larger than 1. Therefore, the maximum voltage gain of the SBI is improved compared with that of the conventional inverter.
Note that as a similar body bias technique, the dynamic threshold-voltage MOSFET (DTMOS) can also improve the voltage gain of the inverter. 44) The DTMOS controls the body bias voltage by using V IN . Therefore, the maximum voltage gain can also be given by Eq. (7). However, the maximum voltage gain is less than that of our proposed SBI. This is because ¶ ¶ V V B I N in our SBI is larger than 1 thanks to the feedback inverter, while in the DTMOS inverter is given by  (9), the voltage gain of the SBI is larger than that of using DTMOS.

Simulation results
The proposed SBI was simulated with 0.18 μm standard CMOS technology. Table I shows the transistor sizes of the proposed circuit. The supply voltage V DD was set to 60 mV. For comparison, the conventional inverter [ Fig. 2(a)] and the DTMOS inverter 44) were also evaluated with the same technology and sizing. Figure 4(a) shows the simulated VTCs. The amplitudes of the conventional inverter, the DTMOS inverter, and the SBI were 48, 53 and 53 mV, respectively. In addition, the output voltage of the SBI changed steeply around the switching voltage. This means that the voltage gain of the SBI is higher than those of the others. Figure 4(b) shows the simulated voltage gain derived from Fig. 4(a). When V IN = V DD /2 = 30 mV, the voltage gains reached their maximum values. The maximum gain of the SBI was 119 and it was 15 times higher than that of the DTMOS inverter, 7.7.
An ROSC using the proposed SBIs was designed and simulated with the same technology. For comparison, an ROSC using conventional inverters was also evaluated. Figure 5 shows the simulation test circuits of the ROSCs. The proposed and conventional ROSCs used 31 SBIs and 51 inverters, respectively, to obtain the same frequency. Figure 6 shows the simulated transient waveforms. The supply voltage V DD was set to 60 mV; the amplitude and frequency of the conventional ROSC were 47.5 mV and 64 Hz, respectively, while those of the proposed ROSC were 53.8 mV and 59 Hz, respectively. Figure 7(a) shows the simulated normalized amplitude as a function of V DD . The amplitude of the proposed SBI was higher than that of the conventional one. The proposed circuit was able to oscillate at an extremely low supply voltage of 40 mV. Figure 7(b) shows the frequency as a function of V DD . The frequencies of the ROSCs were almost the same as designed.

Experimental results
We fabricated a prototype chip of our proposed ROSC using 0.18 μm, 1 poly, 6 metal CMOS technology. The conventional ROSC was also fabricated in the same chip. Figure 8 shows a micrograph of our chip. The proposed and conventional ROSCs used 31 and 51 inverters, respectively, to    obtain the same frequency, and their areas were 0.015 and 0.002 9 mm 2 , respectively. The SBI occupied a larger area because the bodies of the main inverters needed to be separated from the substrate in order to control the body bias voltages. In the measurement, we used source follower buffers to sufficiently drive off-chip parasitics. The bias current of the source follower buffer was set to 500 nA. Figure 9 shows the measured waveforms of (a) the conventional and (b) the proposed ROSC at V DD = 60 mV. The amplitudes were 52.0 and 41.9 mV, respectively. A higher amplitude was obtained by using our proposed SBI. Figure 10 shows the measured normalized amplitudes as a function of V DD . The proposed circuit had a higher amplitude than the conventional one, and was able to oscillate at an extremely low supply voltage of 42 mV, while the conventional one oscillated at 51 mV. Figure 11 shows the measured count that was able to oscillate successfully as a function of V DD in nine samples. In all samples, the proposed ROSC was able to oscillate successfully at V DD = 42 mV. Thus, we defined the minimum V DD as 42 mV. On the other hand, the minimum V DD of the conventional one was 52 mV. Figure 12 shows the measured normalized amplitude of the proposed ROSC as a function of V DD at different temperatures. The amplitude of the ROSC decreased and the minimum V DD increased as the temperature increased. This was because the subthreshold leakage currents of the off-state MOSFETs increased and the voltage gains of the inverter degraded. Figure 13 shows the measured minimum V DD of the ROSCs as a function of temperature. Both circuits showed almost the same temperature dependence. Figure 14 shows the measured (a) frequency and (b) power consumption as a function of V DD . The measured frequency and power of our proposed ROSC was slightly slower and higher, respectively, because of the additional feedback inverters. Figure 15 shows the measured (a) frequency and (b) power consumption as a function of V DD at different temperatures. The frequency and power increased because the current increased with temperature.      For comparison, Table II summarizes the performance of the proposed ROSC and others. [33][34][35] Our proposed ROSC achieved the lowest minimum supply voltage, 42 mV.

Conclusions
In this work, we proposed an ROSC capable of operating at an extremely low supply voltage. The proposed ROSC consists of gain-enhanced self-bias inverters (SBIs). The SBI is composed of two inverters: the main inverter and the feedback inverter. The feedback inverter controls the body bias voltage of the main inverter in order to improve the voltage gain. The simulation and measured results show that the proposed SBI had a higher amplitude and voltage gain. The measurements of the prototype chip demonstrated that the proposed ROSC with SBIs can operate at an extremely low voltage of 42 mV.   a) The area of the startup circuit including the ring oscillator.