Electro-Physical Technique for Post-Fabrication Measurements of CMOS Process Layer Thicknesses

This paper1 presents a combined physical and electrical post-fabrication method for determining the thicknesses of the various layers in a commercial 1.5 μm complementary-metal-oxide-semiconductor (CMOS) foundry process available through MOSIS. Forty-two thickness values are obtained from physical step-height measurements performed on thickness test structures and from electrical measurements of capacitances, sheet resistances, and resistivities. Appropriate expressions, numeric values, and uncertainties for each layer of thickness are presented, along with a systematic nomenclature for interconnect and dielectric thicknesses. However, apparent inconsistencies between several of the physical and electrical results for film thickness suggest that further uncertainty analysis is required and the effects of several assumptions need to be quantified.

Of the above mentioned methods, spectroscopic ellipsometry (SE) [4,5] is the only one that can be used to measure multiple thicknesses on fully fabricated CMOS test chips (a test area of 50 µm by 100 µm is currently required). However, this method does not work for metallization thicker than about 0.04 µm and the layers underlying the thicker metal. In addition, the rough surface of the top glass or nitride layers covering the chips also prevents accurate measurements of underlying layers. But the potential of this technique should be kept in mind as equipment and processes become aligned, especially since the combined standard uncertainty values of the thicknesses found using SE (typically between 0.01 nm and 0.05 nm) are considerably less than those found with the electro-physical technique (0.20 nm to 150 nm for the presented data set). However, the technique presented here provides the thicknesses of all the layers in sufficient accuracy to perform Young's modulus optimizations.
This work was prompted by the goal of finding the Young's modulus values for the various layers in a CMOS process [6]. Knowledge of the Young's modulus values and the residual strain [7] of each layer can lead to calculations of residual stress, which can in turn contribute to circuit design strategies and fabrication and post-processing methods that help increase fabrication yield by reducing the frequency of failures from electromigration, stress migration, and delamination. To find the Young's modulus values, a test chip was designed and fabricated with 16 distinct CMOS MEMS cantilevers in conjunction with the thickness test structures described in this paper. The resonant frequencies of the cantilevers and the thicknesses of each layer are input into an optimization program to find the Young's modulus values of the various layers. For the processing run being considered, this paper presents a set of thickness values for use with the optimization.
In this paper, an electro-physical technique is presented which melds two post-fabrication approachesphysical and electrical-to obtain thickness values. The physical approach uses thickness test structures, such as those shown in Fig. 1. Step-height measurements from these thickness test structures are measured on fully fabricated chips using instruments such as an optical interferometer, a stylus profilometer, an atomic force microscope, and a scanning electron microscope.
The electrical approach utilizes capacitance and sheet resistance measurements that are posted publicly [8] for each MOSIS 2 multi-project wafer lot. Additional thickness values are extracted from interconnect resistivity values and properties of the silicon dioxide crystal lattice, and by assuming ideal thermal oxidation of silicon [9]. The 1.5 µm (feature size) commercial CMOS process depicted in Fig. 1 can provide 48 distinct com-Volume 112, Number 5, September-October 2007 Journal of Research of the National Institute of Standards and Technology 224 2 Certain commercial equipment, instruments, or materials are identified in this paper to foster understanding. Such identification does not imply recommendation or endorsement, nor does it imply that the equipment identified are necessarily the best available for the purpose. a b * Where "fox" indicates field oxide (an SiO 2 layer) and "aan" indicates n-doped active area.  binations of interconnect and dielectric layers over field oxide on p-type substrate (p-well) and over n-type active area (without including contacts and vias). These 48 combinations utilize 10 different layers (4 interconnects, 4 oxides, the glass passivation layer, and a nitride cap that is present on top of the glass layer when the chips are received from MOSIS). These 10 different layers can have 25 different thicknesses depending upon the grown and deposited oxide properties and the etch sequence and effects; however, a set of 42 thickness values will be presented for this process, the extra thicknesses being useful from an analytical standpoint, which will become clearer later. These thicknesses were obtained by the physical approach, the electrical approach, or both. The calculations presented in this paper and the calculations for the layer thicknesses in other similar processing runs can be performed on-line [10].

Test Structures, Sample Preparation, and Nomenclature
This section presents the test structures used in this work in Sec. 2.1, the sample preparation in Sec. 2.2, and the nomenclature in Sec. 2.3.

Test Structures
Three thickness test structures are used in this work. Test structure #1 (TS #1) is presented in Fig. 1, test structure #2 (TS #2) is presented in Fig. 2, and test structure #3 (TS #3) is presented in Fig. 3. These figures include the design renditions, the corresponding cross sections, and prominent features beneath each platform.

Sample Preparation
The design files are submitted to MOSIS [8] for fabrication on a commercial CMOS process. After fabrication, MOSIS sends approximately 15 chips to each participant in that particular multi-project processing run. In this paper, one of these chips is used to obtain stepheight measurements from two of the thickness test structures (i.e., TS #1 and TS #2) presented in Sec. 2.1, and two additional chips are used to obtain step-height measurements from TS #3. Therefore, three of the fifteen test chips received from MOSIS are used for stepheight measurements.
A non-contact optical interferometer is used to take the step-height measurements in this paper. Since the top metal2 layer (with a thickness of approximately 1.0 µm) in TS #1 and in TS #2 is reflective (a requirement for optical interferometry), measurements are taken on these test structures on one of the three chips received directly from MOSIS, before any post processing is done.
In TS #3, the top glass or nitride cap layer is not reflective so for interferometric measurements, additional post-processing is required. On the second of the three chips is evaporated approximately 8 nm of chromium followed by approximately 150 nm of gold before measurements are taken on TS #3. The chromium helps the gold adhere to the chip while the gold coverage provides a smooth, top reflective surface to ensure an accurate interferometric measurement. These additional layers are assumed to have a uniform thickness across the test chip and, as such, do not enter into the calculations. Therefore, these layers will not appear in the pertinent figures throughout this paper. The third of the three chips undergoes a XeF 2 etch [11] until the nitride cap layer is lifted off the underlying glass layer. Then, a thin chromium layer and a thin gold layer are evaporated on the chip as specified in the previous paragraph before additional measurements are taken on TS #3.

Nomenclature
Two types of symbols (#1 to #7 and #8 to #25 of Table 1) have been developed to keep track of the 42 different thickness values; 25 of which are given in Table 1. 3 The first type of symbol (for interconnects, glass, and the nitride cap) can be represented by the thickness designations given in #1 to #7. The second type of symbol (for the oxide dielectric layers) can be represented by the thickness designations given in #8 to #25. The thickness designations for both these symbols start with the letter "t" and are followed by one or more subscripts. Refer to Fig. 4 for familiarization with a more detailed cross section and the use of some of these symbols.
The first type of symbol (in #1 to #7 of Table 1) is for the interconnects, glass, and nitride cap. As an example, consider the poly2 thickness given by the thickness designation t (p2) in #3. The 3. For TS #3: a) a design rendition, b) a cross section (where the uncolored regions above the active area correspond to one or more oxide including the glass layer and nitride cap), and c) prominent features beneath each platform. 3 These 25 thicknesses correspond to the thicknesses in the 48 layer stacks mentioned in the introduction. layer (namely, p2) is given in parentheses in column 3. This parenthesized shorthand notation becomes the subscript of "t" in the thickness designation (as shown in column 2). The second type of symbol (in #8 to #25 of Table 1) is used for all the oxide layers below the glass layer. As an example, the thickness of the oxide layer between p2 and p1 (#13 in Table 1) is given as t thin(p2/p1) . The first subscript "thin" indicates what oxide is being considered. There are four possibilities for these oxides: "Fox" stands for field oxide; "thin" is for the thin, thermal oxide between a polysilicon layer and the active area, or between the two polysilicon layers; "pmd" is for the deposited oxide before the m1 deposition (also called PMD or poly-to-metal dielectric); and "imd" is for the deposited oxide after the m1 deposition (also called IMD or inter-metal dielectric).
The second subscript (given in parentheses) specifies the two layers between which the oxide resides with the topmost layer specified first. Therefore, t thin(p2/p1) indicates there is a thin, thermal oxide between the p2 and p1 layers. Given the designation t fox(pmd/sub) , this refers to the field oxide thickness between the deposited PMD oxide and the substrate, t pmd(m1/fox) refers to the deposited PMD oxide thickness between m1 and the field oxide, and t thin(p1/aan) refers to the thin, thermal oxide thickness between p1 and the n-doped active area. (In this paper, we will only be dealing with n-doped active area.) The third subscript is optional. If a subscripted "phys" follows the thickness symbol [such as in t fox(p2/sub)phys ], it implies that the thickness is found using the physical approach. The subscript "elec" would imply the electrical approach is used to determine the thickness.
Additional subscripts will be presented in the following sections.

The Physical Approach
The first approach to be presented is the physical approach, which uses measurements from thickness test structures. The design of a sample thickness test structure (TS) is given in Fig. 1a, with its cross section given in Fig. 1b. The labels on the arrows are the same in Fig. 1a and Fig. 1b, indicating that the locations correspond. These arrows locate the steps where select measurements are taken. As indicated in Fig. 1b, specific design layers comprise the lower and upper platform of each step. The prominent layers included beneath each platform are given in Fig. 1c. Each platform is 50 µm long and 100 µm wide except for the reference platforms on either end of the test structure, which are each 100 µm long. Therefore, each platform consists of a flat spot with sufficient area to obtain a height value. The test structure occupies a p-well region of the wafer and does not include n-well regions. (MOSIS generates a p-well wherever there is no n-well specified.) This eliminates possible field oxide thickness variations (as shown in Fig. 5) that can be associated with using different well types.
As can be seen in Fig. 5, the height of the active area in the p-well region is different than the height of the active area in the n-well region. For the process in this figure, the p-well region is protected during the processing of the n-well region. This creates a field oxide thickness that is dependent upon which well it is in. The deposited PMD and IMD oxides are typically thicker over lower topographical areas. Assuming the processing in Fig. 5 to be correct, with the active area in the p-well region being higher than the active area in the n-well region, the deposited PMD and IMD oxide thicknesses would be expected to be thicker over the n-well regions than the corresponding thicknesses over the p-well regions. For the measurements described in this paper, all of the designs and measurements are over p-well regions.  The thickness test structures were fabricated, postprocessed as specified in Sec. 2.2 as necessary, and measured. For the test structure in Fig. 1a, four stepheight measurements were initially taken, namely, step1 AB , step1 CD , step1 EF , and step1 GH as depicted in Fig. 1b. If two or more different step-height measurements could be taken to determine a particular thickness value, the test structure is chosen that produces the lowest value for the combined standard uncertainty, u c (which is comparable to the estimated standard deviation). Note that we are not considering test structures that include contacts or vias, since huge contacts and vias (a requirement for the thickness test structures) are not allowed in chemical mechanical planarization (CMP) processes, which is the typical process for 0.25 µm feature-size processes and below. These processes have density rules where the density and fill must be balanced on all layers, which would not be possible in huge contact and via areas. Therefore, to be compatible with smaller feature-sized processes, this analysis only includes CMP-compatible thickness test structures.
A step consists of two platforms. A measurement of the height of one of the platforms is called a platformheight measurement. The height of these platforms is measured with respect to the reference platform, such as plat1r shown in Fig. 1a, for TS #1. Table 2 gives platform-height measurements and their uncertainties as measured with an optical interferometer. In this table, a reference platform is specified with the symbol "platNrD," as shown in #1 and #9, where N is the test structure number ("1," "2," "3," etc.), r indicates it is from a reference platform, and the optional letter D directionally indicates which reference platform (using the compass indicators "N," "S," "E," or "W" where "N" refers to the reference platform designed closest to the top of the chip). Therefore, as shown in Fig. 1b, plat1rW is the leftmost reference platform and plat1rE is the rightmost reference platform. The remaining platforms in Table 2 4 are specified with the symbol Volume 112, Number 5, September-October 2007 Journal of Research of the National Institute of Standards and Technology 228 4 In Table 2, the additional nomenclature associated with the platforms in TS #3 is explained in a note beneath the table. "platNX" where N is the test structure number ("1," "2," "3," etc.) and X is the capital letter associated with the platform ("A," "B," "C," etc.) as lettered starting with "A" for the platform closest to platNrW or platNrS. Therefore, plat1C shown in Fig. 1b, is the third platform from plat1rW. In Table 2, references are  made to entries in Tables 3 and 4 to indicate the thicknesses of the layers beneath the platforms of each step. Tables 3 and 4 give the thickness layer combinations for the 48 p-well designs over field oxide and n-doped active area, respectively, that do not include contacts and vias. In these tables, the possible layers that can be included are listed as column headings. These column headings are listed in the order in which they appear after fabrication with the bottommost layer given first. As such, there are two occurrences of "thin" in Table 4, corresponding to the thin, thermal oxide between a polysilicon layer and the active area, and between the two polysilicon layers. If the layer is included for the particular instance, its thickness designation is specified in the table. Therefore, for instance #9 in Table 3, to obtain the thickness of all the oxides between the substrate and m2, you would add t fox(pmd/sub) , t pmd(imd/fox) , and t imd(m2/pmd) . Many of the thicknesses in Tables 3 and  4 will be used in calculations throughout this paper. Table 5 gives the step-height measurements and their uncertainties as measured with an optical interferometer. A step-height measurement involves subtracting one platform-height measurement from another, if two different 3-D data sets are used to obtain the platformheight measurements. (Consult the appendix [12] for details.) For the symbol "step1 CD " in Table 5, and shown in Fig. 1b, the number following "step" refers to the test structure number it was taken from. The subscripted capital letters refer to the two platforms, in this case, plat1C and plat1D, involved in the measurement. Therefore, step1 CD has plat1C on its left and plat1D on its right. See the appendix [12] for measurement and calculation specifics; however, if two different 3-D data sets are used to obtain plat1C and plat1D, the following calculation is used to obtain step1 CD : 5 Volume 112, Number 5, September-October 2007 Journal of Research of the National Institute of Standards and Technology 229   1 The nitride cap may or may not be present.  1 The step-height measurements in this table were obtained using one 3-D data set. If step3 CD (0) were obtained using one 3-D data set, it also would be included and then this table would be comprised of all the step-height measurements required for a complete analysis. 2 The measurements on TS #1 and TS #2 were taken on an unetched chip. The measurements on TS #3 were taken on chips covered with chromium and gold on either an unetched chip (as indicated by a "0" in parenthesis following the platform and step name) or on a chip post-processed using 4 cycles of a XeF 2 etch (as indicated by a "4" in parenthesis) which removed the nitride cap. (1) Notice that step1 CD is a negative number because it can be viewed as a step "down" when going from left to right. If a lower case "r" appears in place of one of the capital letters (as shown in Fig. 1b for step1 Gr ), it indicates that the step includes one of the reference platforms. Additional step-height measurements can be found in Table 5. (Note that steps do not need to involve adjacent platforms.) In Secs. 5 and 6, these step-height measurements will be used with layer thicknesses below the pertinent platforms to determine key thicknesses for a possible comparison with those found using the electrical approach.

The Electrical Approach
The second approach combines the capacitances and sheet resistances that MOSIS reports for each lot (included in the on-line details that MOSIS posts publicly [8]) with process-specific and extracted values for resistivities and oxide thicknesses. These values are used to determine 38 thicknesses, most of which can be directly compared with the physical approach.
This electrical approach is comprised of four components. The first three components will be presented in this section. First, the dielectric 6 thicknesses are obtained from capacitances, then conductive layer thicknesses are obtained from sheet resistances and resistivities, and finally oxide thicknesses are obtained via the equating of similar oxides. These three components will be presented in the following three sections. The fourth component is the determination of some field oxide thicknesses and t (p1′) , which utilize crystal lattice calculations. 7 This component will be integrated with the physical approach in Sec. 5.

Dielectric Thicknesses from Capacitances
The dielectric thicknesses given in Table 6 are obtained from capacitances using the formula A dielectric is an electrically nonconducting material, such as an oxide. 7 Although crystal lattice calculations can result in what can be considered a "physical" quantity, we are viewing these calculations as part of the electrical approach to more sharply distinguish between the interferometric measurements and calculations used in the physical approach and the non-interferometric measurements and calculations used in the electrical approach.
where t is the thickness in micrometers, ε SiO 2 is the permittivity of SiO 2 {which equals the dielectric constant of SiO 2 (3.9) times the vacuum permittivity (8.85 aF/µm) [13]} which equals 34.5 aF/µm, and C a is the capacitance per unit area in attofarads per square micrometer, for which the fringing capacitance and stray capacitance have been removed [8]. Note in this table that some of the thickness calculations are for combinations of field oxide, PMD, and IMD. The equation for the thickness combined standard uncertainty (u c ) calculations, resulting in the values given in the last column of Table 6, is presented in the appendix.

Conductive Layer Thicknesses From Sheet Resistances and Resistivities
Values for conductive layer thicknesses are obtained from sheet resistances and resistivities. The interconnect sheet resistance, R s , values for a 1.5 µm commercial CMOS foundry processing run are given in the third column in Table 7 as obtained from MOSIS. The standard deviations, σ Rs , of the MOSIS-supplied sheet resistance values are given in the fourth column. The resistivities, ρ, in the fifth column are averages derived from measurements at MOSIS on multiple wafer lots. The standard deviations, σ ρ , of the resistivities in the sixth column, are assumed to be 0.1 Ω µm for p1 and p2 and 0.001 Ω µm for m1 and m2 (which is the uncertainty of the last digit of the resistivities). The thicknesses, in the seventh column, are calculated using the formula The equation used to calculate the thickness combined standard uncertainty (u c ) values given in the last column is presented in the appendix. Table 6 includes entries with multiple oxides. These entries correspond to #6, #10, #11, #12, and #13. Additional thicknesses can be obtained by separating these oxides. In order to do that, we equate similar oxides between platforms assuming the layer on top is the same. The layer underneath can be different. This will become clearer as we examine the following four assumptions that apply to interconnects or oxides when going from one platform to the next.

Thicknesses From Equating Similar Oxides
First, it is assumed that the thicknesses of the interconnect layers do not vary with topography, except at steps. Second, it is assumed that the deposited PMD and/or IMD oxide thicknesses sandwiched between similar layers do not change in thickness as a function of topography, except at steps. For example, the m2-to-m1 oxide thickness over active area is assumed to be equal to the m2-to-m1 oxide thickness over field oxide. This is contrary to the belief that the deposited oxides are thicker over lower topographical areas. However, contradictory evidence was instrumental in precipitating this assumption. This can be seen by comparing the values for #7 and #8 in Table 6. Number 7, corresponding to t pmd(m1/aan)elec , is over a lower topographical area than #8, corresponding to t pmd(m1/p1)elec , and yet the thickness value for #7 is less than the thickness value for #8. In this paper, we do not equate t pmd(m1/aan)elec with t pmd(m1/p1)elec but observe that their values appear to be switched if the deposited oxides are indeed thicker over lower topographical areas. Therefore, as applied to the m2-to-m1 oxide thickness, to avoid the possibility of amplifying an error in the ensuing calculations, the m2to-m1 oxide thickness over active area is assumed to be equal to the m2-to-m1 oxide thickness over field oxide.
The third assumption involves the IMD oxide shown in Fig  assumed that the IMD oxide thicknesses in this figure are equated as follows: Therefore, we can calculate the only unknown oxide thickness in Fig. 6 (in order to separate or obtain thickness values for the two oxide thicknesses in #11 of Table 6) as follows: In other words, the m2-to-active area thickness given by [t pmd(imd/aan) + t imd(m2/pmd) ] elec minus the IMD oxide thickness between m2 and the PMD oxide [t imd(m2/pmd)elec ] is equal to the only unknown oxide thickness in Fig. 6, t pmd(imd/aan)elec . Referring to this figure, this value of 0.405 µm for t pmd(imd/aan)elec is less than the value of 0.6725 µm for t pmd(m1/aan)elec due to the additional etching of t pmd(imd/aan)elec during the m1 patterning. Given the value for t imd(m2/pmd)elec in Eq. (4) we can also separate the oxides in #12 and #13 in Table 6 using the following two calculations, respectively: and As an extension of this third assumption involving the IMD oxides, it is also assumed that t imd(gl/pmd)phys = t imd(gl/m1)phys (8) the value for which will be determined in Sec. 5.10. These thicknesses are not found using the electrical approach.
The fourth assumption involves the PMD oxide. Referring to Fig. 7, it is assumed that the PMD oxide thicknesses are equated as follows: and Note that t pmd(m1/fox)elec in Eq. (9) is not equated with t pmd(imd/fox)elec in Eq. (10), for example and as shown in Fig. 7, because the PMD oxide without the m1 on top undergoes an additional etch when the m1 is patterned. And, as you can see in Eqs. (9) and (10), the difference between these two values can be significant (approximately 0.268 µm in this case for the electrical approach).
Given the above equalities in Eqs. (9) and (10), the oxide thicknesses in the remaining two entries in Table  6 involving multiple oxides (namely, #6 and #10) can be separated as follows: and where the added subscripts after "fox", namely, "m1" or "m2", indicate the thickness of the field oxide beneath m1 or m2, respectively. Indeed, t fox,m1(pmd/sub)elec in Eq.  two measurements will be discussed in Sec. 7. This discrepancy will be the starting point for obtaining an additional uncertainty component for thicknesses obtained from capacitances. The newly found thicknesses presented in this section are included in Table 8 under the column heading t elec , for the thicknesses found using the electrical approach. For the thicknesses found using the physical approach, the column heading t phys is used. Most of these thicknesses will be obtained in Sec. 5.

Comparing Approaches
Thicknesses obtained with the physical approach can be compared with those obtained with the electrical approach. The thicknesses with the smaller combined standard uncertainty values would be the preferred thickness values, for use in Young's modulus calculations, for example. For the comparison of these two approaches, we begin with the assumptions, which are presented in Sec. 5.1, followed by crystal lattice calculations in Sec. 5.2. Then, in Secs. 5.3 through 5.6, we compare field oxide thicknesses obtained with the physical and the electrical approach using TS #1 (shown in Fig. 1). Section 5.7 presents additional thickness comparisons that can be made given the platforms in this test structure. Then, Sec. 5.8 presents some thickness comparisons using the platforms in TS #2 (shown in Fig. 2). Using step-height measurements from this test structure, the physical polysilicon interconnect thicknesses are found in Sec. 5.9. And finally, Sec. 5.10 presents the determination of the physical metal interconnect thicknesses using both TS #2 (shown in Fig. 2) and TS #3 (shown in Fig. 3). At this point, all of the electrical thicknesses will have been  compared in some manner with physical thicknesses, thereby completing the measurement comparisons before the post-processing XeF 2 etch.

Assumptions
As the physical approach is compared to the electrical approach, five assumptions are made. First, it is assumed that the thickness of the field oxide below the level of the unoxidized active area is the same regardless of what layers (such as p1, p2, m1, or m2) are above it. In other words, as can be seen in Fig. 8, where the added subscripted letters "be" indicate the thickness is of the field oxide that is below the unoxidized active area level.
Second, the gate oxide thicknesses (i.e., #2 and #4 in Table 6) are assumed to be accurate. With capacitance measurements, the thicknesses of these thinner gate oxides are more accurately determined than the thicknesses of the thicker deposited oxides. Therefore, we will equate these measurements for the physical and electrical approaches as follows: and t thin(p2/aan)phys = t thin(p2/aan)elec = 0.04878 µm.
To keep the physical approach somewhat independent of the electrical approach, we are going to the extreme of equating these oxides as an assumption so that we are careful in not "mixing" the approaches in the many equations that follow. In Sec. 7, this will enable us to discuss data trends between the physical approach and the electrical approach.
Third, it is assumed that #1 in Table 6 is accurate such that This assumption is used in Sec. 5.2. The fourth assumption is dependent upon the u c values in the given data set, therefore, the specific details associated with this assumption will be presented in Secs. 5.7 and 5.8. The upshot is that for the presented data set, we will assume that #8, #11, and #14 in Table  6 are accurate. Therefore, we assume the following equalities: and And fifth, we will equate the same similar oxides for the physical approach as we did in Sec. 4.3 for the electrical approach. In other words, similarly to Eqs. (4), (9), and (10), we have the following: and The values for Eqs. (21) and (22) will be determined in Secs. 5.8 and 5.7, respectively. Table 9 includes a listing of most of the equated oxides in this paper, including the ones presented up to this point.

Crystal Lattice Calculations
and only the thicknesses change. We have the following calculation: where V molar is the molar volume of silicon (Si) or silicon dioxide (SiO 2 ) as indicated by the subscript, w is the molecular weight, and ρ is the density. This means that the thickness of the original silicon, which has been converted now to silicon dioxide, is 44.3 % of the final total oxide thickness. In other words, the field oxide should extend 44.3 % below and 55.7 % above the unoxidized active area level. This is for the ideal case and actual processes may be biased away from the ideal; therefore, the one sigma uncertainty for each of these percentages will be assumed to be 1.5 %.
In addition to field oxide, the above calculation is also applicable to the three thin, thermal oxides given in Table 4, namely, t thin(p1/aan) , t thin(p2/aan) , and t thin(p2/p1) . In referring to the oxide thickness above the unoxidized active area level, the added subscripted letters "ab" are added after the specified oxide, as in t fox,ab(p2/sub) and t thin,ab(p1/aan) . Similarly, in referring to the oxide thickness below the unoxidized active area level, the subscripted letters "be" are used, as in t fox,be(p1/sub) and t thin,be(p2/aan) . When the subscripts "ab" and "be" are used with t thin(p2/p1) , the level of the unoxidized p1 is the reference point. 8 To determine the percentages for the physical approach, let us take a close look at step1 AB in Fig. 1b, as magnified in Fig. 9.
Given the underlying assumption in #7 in Table 9, we can write the following step-height equation:    8 The designation for the reduced, oxidized thickness of p1 after the creation of t thin(p2/p1) is given by t (p1′) .
where here %t ab,phys is the percentage of oxide above the unoxidized active area level for the physical approach.
(The values for step1 AB and t thin(p1/aan)phys can be found in Tables 5 and 9, respectively.) Therefore, for the physical approach, the percentage of oxide above (%t ab,phys ) and the percentage of oxide below (%t be,phys ) the unoxidized active area level can be calculated as follows: ( 25) and (26) The one sigma uncertainty for each of these percentages will be assumed to be 1.5 %.
Due to the relatively small dimensions associated with the conversion of the silicon or polysilicon into a thin, thermal oxide, in some figures, this small reduction in thickness may not be indicated. However, it needs to be accounted for during pertinent calculations.

Examining Step1 AB
First, let us reexamine step1 AB in Fig. 1b, as magnified in Fig. 9. We can use calculations from this step for comparison with similar values derived from #1 in Table 6. Since we have a value for %t ab,phys , we can now complete the calculation for t fox,ab(p1/sub)phys in Eq. (24) as follows: ( 27) And, by definition and using the underlying assumption in #9 in Table 9, we can write the following: For the electrical approach, we can use the following equations to compare with Eqs. (27) and (28):   (29) and (30) Due to the difference of the calculated values in Eqs.
(27) and (29) (namely, 0.0222 µm) the physical and the electrical approaches give fairly comparable results for the amount of field oxide above and below the unoxidized active area level. Several different tacks can be used to find the physical field oxide thicknesses. The one presented here, of equating t fox(p1/sub)phys with t fox(p1/sub)elec , offers the advantage of comparing the percentages. The above results are included in Table 10. Section 7 will provide a further discussion of these results. Consult the appendix for the equation used to determine the combined standard uncertainty values.

Examining Step1 CD
Next, let us look at step1 CD in Fig. 10. We can use calculations from this step for comparison with similar values derived from or using #3 in Table 6 for the electrical approach.
Given the underlying assumption in #8 in Table 9, we can make the following step-height calculation: from which we can calculate t fox(p2/sub)phys to be: recalling the underlying assumption in #6a in Table 9 equating t fox,be(p2/sub)phys with t fox,be(p1/sub)phys .  For the electrical approach, using the underlying assumption in #5a in Table 9, we have the following: The above two measurements in Eqs. (31) and (33) for t fox,ab(p2/sub) differ by 0.0417 µm. These measurements are included in Table 10. Section 7 will provide a further discussion of these results. Also, the two measurements for t fox(p2/sub) in #2 of Table 8 differ by 0.0195 µm and the electrical measurement is preferred due to the lower value for u c .

Examining Step1 EF
Next, let us look at step1 EF in Fig. 11. This stepheight measurement will be compared with a similar value derived from #6 in Table 6. We can make the following step-height calculation: from which we can calculate t fox,m1(pmd/sub)phys to be: with the help of the underlying assumption in #6b in Table 9.
For the electrical approach, using the underlying assumptions in #3a and #5b in Table 9, we have the following: The above calculations for t fox,ab,m1(pmd/sub) in Eqs. (34) and (36) are given in Table 10. They differ by 0.0677 µm. Section 7 will provide a further discussion of these results. Also, the two measurements for t fox,m1(pmd/sub) in #3a in Table 8 differ by 0.0899 µm and the electrical measurement is preferred due to the lower value of u c .

Examining Step1 GH
Next, let us look at step1 GH in Fig. 12. This stepheight measurement will be compared with a similar value derived from #10 in Table 6 for the electrical approach. We can make the following step-height calculation:   1 The highlighted entries correspond to the preferred values, as determined by the lower value of u c . 2 These values were obtained from crystal lattice calculations. from which we can calculate t fox,m2(pmd/sub)phys to be: with the help of the underlying assumption in #6c in Table 9.
For the electrical approach, using the underlying assumptions in #1a, #4a, and #5c in Table 9, we have the following: The above calculations for t fox,ab,m2(pmd/sub) in Eqs. (37) and (39) are given in Table 10. They differ by approximately 0.169 µm. Section 7 will provide a further discussion of these results. Also, the two measurements for t fox,m2(pmd/sub) in #3b in Table 8 differ by approximately 0.147 µm and the physical measurement is preferred due to the lower value of u c .

Additional Comparisons Using TS #1
Additional thickness comparisons can be made using TS #1. Looking at Table 6, we have already addressed #1, #3, #6, and #10 by way of field oxide thickness comparisons in the previous four sections. In this section, we will compare calculations from or results in #11, #12, #13, and #7 with calculations using or values for a, b, c, and d, respectively, in Fig. 13. (Figure 13 consists of select platforms from TS #1.) For the following calculations, we can assume that t (m2) = 0 since m2 is common to each platform.
In Sec. 5.1, we assumed in the fourth assumption that #11 in Table 6 is accurate. Why did we assume this? To make the calculations for a, b, c, and d in Fig. 13, the height of the unoxidized active area, h AA , can be used as a reference level. Therefore, we choose the approach that produces the lowest value of u c for h AA . The layer combinations to be considered are #41, #42, #43, and #45 in Table 4, which have m2 as the top layer and one or fewer interconnects beneath the m2 layer. 9 The equation used to obtain u c is presented in the appendix. Suffice it to say that after calculating the values for u c for each layer combination for this data set, #41 produces the smallest value. (The oxide in #41 corresponds to #11 in Table 6.) Therefore, we can obtain the smallest u c value for h AA if we assume the following: (40) as given in Eq. (18) and use a in as many of the remaining calculations as possible.
The appendix points out that step-height measurements are preferred over platform-height measurements. Therefore, we can calculate b for the physical approach (which corresponds to #12 in Table 6 for the electrical approach) using step1 rA as follows: , , and we can calculate c for the physical approach (which corresponds to #13 in Table 6 for the electrical approach) using step1 rD as follows: In the above calculations for b and c, we used the electrical thicknesses for p1 and p2. We will see in Sec. 5.9 that the u c values for the electrical poly interconnect thicknesses are less than the u c values for the physical poly interconnect thicknesses. It was also assumed in the fourth assumption in Sec. Table 6 is accurate. Why? Given the underlying assumption in #1c in Table 9 for which t imd(m2/pmd)phys is common to Eqs. (40), (41), and (42), we can separate the PMD and IMD oxides in a, b, and c in Eqs. (40), (41), and (42). Therefore, assuming #14 in Table 6 to be accurate, gives us a low value for u c for the calculations that follow:
Additionally, given step1 rE in Fig. 13, we can calculate d as follows: For this calculation, we use the physical thickness of m1, as we will see in Sec. 5.10 that u c for t (m1)phys is less than u c for t (m1)elec . (An alternate calculation of d will be found in the next section, which ends up having a smaller value for u c .)

Some Thickness Comparisons Using TS #2
In this section, additional thickness comparisons will be made. We will compare #5, #7, #8, and #9 in Table  6 with the results from step-height calculations for g, d, e, and f, respectively, as depicted in Fig. 14, which shows select platforms from TS #2. For the calculations associated with this figure, we will assume that t (m2) = 0, t imd(m2/m1) = 0, and t (m1) = 0 because the corresponding layers are common to each platform in this figure and therefore their values would cancel out in the calculations.
As done in the previous section, we first find the lowest value of u c for h AA . The layer combinations to be considered are #45 to #48 in Table 4, which have m2 as the top layer and which include m1 as an interconnect. After calculating the values for u c for each layer combination for this data set, #46 produces the smallest value, 10 so we will assume Eq. (17) and use e equals  10 The u c value for the physical approach in #7a of Table 8 is used in these calculations.
0.7516 µm in as many calculations as possible. Therefore, given the value for e, we can calculate d, f, and g in Fig. 14. Refer to Table 8 for the appropriate values to insert in the equations that follow: and (50) Once again, t (p1)elec and t (p2)elec were used instead of t (p1)phys and t (p2)phys , respectively. These values for d, e, f, and g are presented in Table 8 as #7b, #9, #10, and #6, respectively, for comparison with the corresponding electrical thicknesses. We will use #7b in Table 8 as the preferred physical calculation for d due to the lower value for u c as opposed to #7a.

Polysilicon Interconnect Thicknesses
In this section, we will determine the physical p1 and p2 interconnect thicknesses for comparison with similar values obtained with the electrical approach in Sec. 4.2. We will also determine the reduced p1 thicknesses t (p1′)phys and t (p1′)elec .
Referring to Tables 5 and 8, the reduced p1 thickness, namely t (p1′)phys , is calculated from step2 CD in Fig.  15 as follows: (51) from which t (p1)phys is calculated as follows: (52) where t thin(p2/p1)elec is used in conjunction with the physical percentage instead of t thin(p2/p1)phys in conjunction with the physical percentage. 11 The above p1 physical thicknesses are included in Table 8 along with the corresponding electrical thicknesses, including the reduced p1 electrical thickness calculated as follows: Similarly, the p2 thickness can be determined from step2 BC in Fig. 15 using the equation: Once again, note that t thin(p2/p1)elec was used in conjunction with the physical percentage instead of t thin(p2/p1)phys with the physical percentage due to the large discrepancies in the corresponding values for u c as given in #6 in Table 8 in conjunction with the fact that this thickness is so small that the electrical approach can be assumed to be accurate. This was not assumed earlier since we had an opportunity to calculate it using the physical approach.

Metal Interconnect Thicknesses
In this section, we will determine the physical m1 and m2 interconnect thicknesses for comparison with similar values obtained with the electrical approach in Sec. 4.2.
To determine the m1 physical thickness, refer to Fig.  16, which uses select platforms from TS #2. We can make the following calculation with the help of Table 8 and the underlying assumption in #4d in Table 9: (55) As seen in Table 8, t (m1)phys is preferred over t (m1)elec .
Before the m2 physical thickness can be found, #17 and #18 in Table 8, which are assumed to be equal according to the underlying assumption in #2 in Table  9, should be obtained. These thicknesses cannot be found with the electrical approach. They can be found from step3 BC (0) in TS #3 (see Fig. 17). Since the top layer is not reflective, for interferometric measurements, additional post-processing is required (see Sec. 2.2). The following equations can be written assuming that the glass and nitride cap thicknesses do not vary with topography: and (57) To determine the m2 physical thickness, refer to Fig.  18, which also uses select platforms from TS #3. Once again the post-processing mentioned in Sec. 2.2 is needed for interferometric measurements since the top layer is not reflective. We can make the following calculation: 12 (58) Since t (m2)elec was used to find t imd(gl/m1)phys , which is used in the calculation of t (m2)phys , we cannot expect the u c value for t (m2)phys to be less than it is for t (m2)elec , as confirmed by the results in #23 of Table 8.   12 The appendix points out that it is preferable to use step3 CD (0) instead of plat3D(0) minus plat3C(0). However, since two different data sets in two different data sessions were used to find plat3D(0) and plat3C(0), this approach is being taken. Chromium is typically used to help the gold adhere to the chip.

Thickness Calculations Remaining After the Post-Processing Etch
The remaining thicknesses to be found are #24 and #25 in Table 8. This analysis assumes that the m2 thickness is not reduced during the glass etch and that the m2, glass, and nitride cap (assuming it remains) thicknesses are not reduced during the XeF 2 etch.
Let's consider two separate measurements for step3 AB in Fig. 17. First, let's look at the pre-XeF 2 etch measurement of step3 AB [or step3 AB (0)]. For this measurement, the nitride cap layer is present on top of the glass layer covering the m2 in plat3B. We have the following formula: With Eq. (59) alone, the glass layer and the nitride cap layer are not separated. As a rough approximation we can separate these layers with the use of the following equation: (60) However, to be more exact, especially if we are interested in the CMOS thicknesses after a XeF 2 etch, all of the previously obtained thicknesses still apply; however, we would also need an additional measurement of step3 AB after the etch. After the etch, if the nitride cap is still present on top of the glass layer covering the m2 on plat3B, step3 AB is called step3 AB (n) + , where n indicates the number of XeF 2 etch cycles and the "+" sign indicates the nitride cap layer is still present. If the nitride cap is no longer present, step3 AB is called step3 AB (n) -, where the "-" sign indicates the nitride cap layer is no longer present. In the former case, we would have an equation similar to Eq. (59), namely: And, in the later case, we would have: When the chips are received from MOSIS, the combined glass and nitride cap thickness is approximately 1.0 µm (in this case 1.180 µm), and the glass thickness is approximately equal to the nitride cap thickness. Therefore, if the measurement of step3 AB after the XeF 2 etch is closer to 0.5 µm than it is to 1.0 µm as it is in this case [i.e., step3 AB (4) = 0.4876 µm], it can be assumed that the nitride cap has lifted off, thereby enabling the calculation of the glass thickness using Eq. (62), such that (63) followed by the calculation of the nitride cap thickness using Eq. (59), such that (64)

Discussion
In this section, we will start in Sec. 7.1 and determine if there are any noticeable trends in the data concerning thicknesses obtained with the physical approach and thicknesses obtained with the electrical approach. In Sec. 7.2, we will discuss the variations in the field oxide thicknesses given in Table 10. Next, we will look for inconsistencies in the data, in Sec. 7.3, followed in Sec. 7.4 by a determination of whether or not a more detailed error analysis is required. Then, in Sec. 7.5, an uncertainty component will be added to the physical approach and to the electrical approach after which the preferred thicknesses are determined.

Data Trends
For the first discussion point, we will determine if there are any noticeable trends in the data concerning thicknesses obtained with the physical approach and thicknesses obtained with the electrical approach. Forty-two thickness values were obtained. Thirty-one of these values are given in Table 11. The remaining eleven thicknesses derived in this paper can be viewed as virtual oxide thicknesses. The subscript "ab" or "be" can be found in the designations for these oxides, which are given in Table 12. (Recall that the subscript "ab" indicates an oxide thickness above the unoxidized active area or unoxidized p1 level and the subscript "be" indicates an oxide thickness below the unoxidized active area or unoxidized p1 level.) Look at Table 11, which is the rank-ordering of the thicknesses from smallest to largest u c value. The highlighting indicates the preferred thickness value, as determined by the lower value of u c . These are the thicknesses that would be used in Young's modulus calculations, for example. Most (but not all) of the data in the table support the observation that the electrical approach is preferred over the physical approach for thicknesses with values of u c less than or equal to      1 The rank-ordering is from the smallest to the largest u c value when looking at the highlighted entries. The highlighted entries correspond to the preferred values, as determined by the lower value of u c . 0.011 µm. These are mostly layers that are fabricated earlier in the processing sequence, such as the poly2-to-poly1 oxide and the poly2 layers. In addition, most of the data support the conclusion that the physical approach is preferred for thicknesses with values of u c greater than or equal to 0.014 µm. These are mostly layers that are fabricated later in the processing sequence, such as the metal1 and the nitride cap. For thicknesses with u c values between 0.011 µm and 0.014 µm, inclusive, it is not clear which approach to use in further calculations; it depends on the particular thickness. Table 13 is a rank-ordering of the thicknesses from smallest to largest. No distinctive pattern is apparent from this data. Next look at Table 14, where the capacitance values from Table 6 are rank-ordered from the largest to the smallest capacitance value. In addition to the electrical thicknesses, the physical thicknesses and their u c values are also included. The entries with the smaller u c value are highlighted, which indicates they are the preferred thickness values. This table tells us that for capacitances less than or equal to 23 aF/µm 2 (corresponding to #12, #13, and #14) the physical approach is preferred and for larger capacitances the electrical approach is preferred. In addition, this table supports the results in Table 11 in that #12, #13, and #14 also have the largest u c values. It is not surprising that the electrical approach dominates for the thinner oxides represented by the higher capacitances in Table 14 and that the physical approach dominates for the thicker oxides because the capacitance signal becomes smaller as the oxide thickness increases.

Variations in Field Oxide Thickness
For the second discussion point, we will discuss the variations in the field oxide thicknesses given in Table  10, where the physical approach has u c values that are lower than the u c values for the electrical approach for all entries, and hence the physical thicknesses are the preferred thicknesses for use in calculations.
The results for the amount of field oxide above the unoxidized active area level as determined with the physical and the electrical approaches are presented in #2 through #5. In particular, note entries #4 and #5 for t fox,ab(pmd/sub) . As can be seen in Fig. 8, this thickness should be the same whether or not it is covered with m1 or m2 due to similar processing before the m1 deposition, and the physical measurements in #4 and #5 differ by 0.0117 µm whereas the electrical measurements in #4 and #5 differ by approximately 0.249 µm. (This will be discussed in greater detail in Sec. 7.5.2.) This suggests that the physical approach using step-height measurements are more reliable for one or both of these measurements. Consistent with this observation, the u c values for the physical approach are smaller than the u c values for the electrical approach for both these measurements. Table 10 also shows a trend. For the physical approach, going from entry #2 to #3 to #4 to #5 the thickness of the field oxide above the unoxidized active area level can be viewed as getting smaller then leveling out. There is no apparent trend for the thicknesses obtained from the electrical approach. It does not seem realistic that the field oxide thickness in #5 is about 1.7 times the thickness as that given in #4 when they should be equal. Again, the u c values for the physical approach are less than the u c values for the electrical approach for these measurements.

Inconsistencies in the Data
The third discussion point concerns inconsistencies in the data. As a follow up to the discussion in the previous section, a cause for concern is as follows: looking at Table 11, entry #18 and entry #19, corresponding to t fox,m1(pmd/sub) and t fox,m2(pmd/sub) , respectively, should be equal, according to the equalities presented in Fig. 8, due to similar processing before the m1 deposition. The u c values are such that for #18 the electrical approach is preferred and for #19 the physical approach is preferred. The preferred thicknesses differ by 0.102 µm when they should be equal. Even more significant, the electrical thicknesses are inconsistent with one another.
In addition to the above example, it is interesting that the glass layer (i.e., #13 in Table 11) does not have a very high u c value in comparison to the other thicknesses. This may be due to it being considered a local measurement and having only one uncertainty component, due to the uncertainty of the measurement of step3 AB (4)in the calculation of t (gl)phys in Eq. (63), in the u c calculation.

Is a More Detailed Error Analysis Required?
The question arises, is a more detailed error analysis required? To begin addressing this question, look at   Tables 11 and 12. These tables are comprehensive rankorderings of the u c values from smallest to largest. A conventional way to determine if a more detailed analysis is required, is to compare the difference between the physical result and the electrical result (namely, t physt elec ) with the uncertainty of the difference (namely, u diff ) where (65) This is done in the last column of Tables 11 and 12 using the E n statistic [15,16], which is calculated using the following equation: Of the 42 thicknesses in Tables 11 and 12, there are 11 thicknesses with E n values less than or equal to 1.0. On the flip side, there are 18 thicknesses with E n values greater than 1.0. The remaining thicknesses do not address this question because the thicknesses were assumed to be equal or only one thickness is presented. If the uncertainties of the measurements in Tables 11  and 12 were fully characterized and the results being compared were independent, we might expect about 95 % (perhaps 27 or 28 of the 29 results) to have an E n value less than or equal to 1.0. However, since there are only 11 thicknesses with E n values less than or equal to 1.0, it is likely that the uncertainties of these measurements have not been fully characterized and, in particular, that the assumptions we have made in Secs. 4.3, 5.1, 5.10, and Sec. 6 require further investigation.

Adding Uncertainty Components
Should more uncertainty components be added to the physical approach, the electrical approach, or both? For the physical approach, more uncertainty components can be added to address one or more of the many assumptions made in Secs. 4.3, 5.1, 5.10, and Sec. 6. For the electrical approach, more uncertainty components can be added to account for the assumptions in Secs. 4.3 and 5.1, modeling, edge effects, thickness inhomogeneities, calibration, repeatability, drift, and for noise in the capacitance measurement.
For the physical approach, we will start in Sec. 7.5.1 by adding an additional uncertainty component, u Lstep , to the step height measurements. This uncertainty component is due to the measurement uncertainty across the length of the two 50 µm long platforms involved in the step. Then, for the electrical approach, we will add in Sec. 7.5.2 an additional uncertainty component (which is larger for the larger thicknesses) to the thicknesses obtained from capacitance measurements. And lastly, in Sec. 7.5.3, the results will be assimilated to determine the preferred thicknesses for use in calculations.
As an aside, it should be mentioned that a thorough thickness analysis would add to the nomenclature a distinction between thicknesses obtained over field oxide and thicknesses obtained over active area. As such, #9 in Table 11 (as an example) would be split into two rows since the m1-to-p2 thickness was measured over field oxide for the electrical approach (as indicated in the first note beneath Table 6) and measured over active area for the physical approach (as determined from step2 BD , shown in Fig. 2b, which is over active area). They should not be expected to be equal, which is counter to the second assumption in Sec. 4.3. Due to this, uncertainties can be added to assumptions, such as the ones given in Eqs. (21) and (22).
Along the same lines, since the electrical approach deals mainly with thicknesses over field oxide, TS #2 and TS #3 could also be designed over field oxide (thereby creating TS #4 and TS #5) to more appropriately compare similar thicknesses without relying on an assumption.

Adding an Uncertainty Component to the Physical Approach
For the physical thicknesses, Table 15 for step height measurements and their uncertainties was constructed. It is an extension of Table 5 in that an additional uncertainty component (namely u Lstep ) is included in the calculation of u c for step heights. The uncertainty component, u Lstep , is due to the measurement uncertainty across the length of the two 50 µm long platforms involved in the step. Consult Sec. A.4 for more details concerning the other column headings in this table.
Examining Table 15, the uncertainty components u Wstep (the measurement uncertainty across the 100 µm width of the step) and u Lstep can be associated with nonuniformity issues across one or both of the platforms involved in the step. Notice that the values for u Lstep are comparable to the values for u Wstep and recall that u Lstep was not included in the uncertainty analysis that was done earlier in this paper. Had we included u Lstep into the uncertainty analysis that was done earlier, which only included u Wstep and u basic , as explained in Sec. A.4, the results for which are presented in Tables 11 and 12, there would have been little overall effect in that the same thicknesses would be preferred as specified by the

Adding an Uncertainty Component to the Electrical Approach
Recall from Sec. 7.2 that the electrical measurements in #4 and #5 of Table 10 differ by approximately 0.249 µm when they should be equal. We will use this as a starting point for obtaining uncertainties for thicknesses obtained from capacitances. The largest thickness in Table 6 (that is, #10) is 2.300 µm for [t fox,m2(pmdsub) + t pmd(imd/fox) + t imd(m2/pmd) ] elec . Ten percent (or 0.230 µm) of this thickness is comparable to the 0.249 µm difference obtained. Since an uncertainty of the thickness (u res ) divided by the thickness (t) is equal to a standard deviation of the capacitance (σ resCa ) divided by the capacitance (C a ), or rearranged (67) then with t = 2.300 µm, u res = 0.230 µm, and C a = 15.0 aF/µm 2 , it follows that σ resCa = 1.5 aF/µm 2 . This value for σ resCa can be used with all the capacitances to obtain the additional residual uncertainty component, u res , for the other thicknesses using Eq. (67). The results of including u res as an uncertainty component are given in Table 16. Note that u res gets larger as the capacitance gets smaller and that it is negligible for the largest capacitance.

The Preferred Thicknesses
Given the above analysis, Tables 17 and 18 are the revised rank-orderings of the u c values for all the thicknesses, comparable to Tables 11 and 12. For the entries in Tables 11 and 17, the inclusion of the above uncertainties for the physical approach and the electrical approach, presented in Secs. 7.5.1 and 7.5.2, had the effect of switching 2 thicknesses {namely, t fox,m1(pmd/sub) and [t fox,m1(pmd/sub) + t pmd(m1/fox) ]} from being a preferred electrical thickness to being a preferred physical thickness and switching 1 thickness [namely, t (m1) ] from being a preferred physical thickness to being a preferred electrical thickness. The u c value below which electrical measurements are typically preferred has shifted from being less than or equal to 0.011 µm as ascertained in Table 11 to being less than or equal to 0.035 µm as ascertained in Table 17, for those thicknesses for which an electrical thickness can be obtained. There does not appear to be a preferred approach for thicknesses with larger values of u c , it depends upon the particular thickness. Now, 23 of the thicknesses have E n values less than or equal to 1.0, and 6 E n values greater than 1.0. Plus, as pertains to Sec. 7.3, the two preferred values for the thicknesses t fox,m1(pmd/sub) and t fox,m2(pmd/sub) as given in #15 and #16 of Table 17, which should be equal, differ by only 0.012 µm and their E n values are less than or equal to 1.0 (as opposed to the previous difference of 0.102 µm with E n values greater than 1.0).
Considering there are 23 (and not 27 or 28) thicknesses out of 29 thicknesses with E n values less than or Volume 112, Number 5, September-October 2007 Journal of Research of the National Institute of Standards and Technology 248 equal to 1.0, there still seem to be sources of uncertainty that are unaccounted for. This suggests that further uncertainty analysis is required and that the effects of several assumptions need to be quantified. Further analysis of the correlations between the calculated thickness results should also be performed.

Conclusion
In conclusion, the electro-physical technique was presented which combines a physical approach and an electrical approach for determining the layer thicknesses for a 1.5 µm commercial CMOS process. The physical approach obtains thicknesses from step-height measurements on thickness test structures. The designs for these test structures were given in Figs. 1, 2, and 3. The electrical approach obtains thicknesses from capacitances, sheet resistances and resistivities, crystal lattice calculations, and the equating of similar oxides between platforms. The thickness from the approach that results in the lower value for u c is the reported value, meaning this number is chosen, for example, for use in Young's modulus calculations.
Due to the apparent inconsistencies between the physical approach and the electrical approach for 18 thicknesses (as determined by the number of E n values greater than 1.0 in Tables 11 and 12), an additional uncertainty component was added to the physical step height measurements and to the electrical capacitance measurements in order to produce consistent results. This resulted in 23 (and not 27 or 28) thicknesses out of 29 thicknesses with E n values less than or equal to 1.0, which is an improvement over 11 E n values being less than or equal to 1.0. However, this still suggests that further uncertainty analysis is required and that the effects of several assumptions need to be quantified. For the processing run under consideration, the reported values are highlighted in Tables 17 and 18.
As a rule of thumb, given the results in Table 17, the electrical approach is preferred for thicknesses with u c values less than or equal to 0.035 µm. This corresponds somewhat to the layers, such as the poly2-to-poly1 oxide and the poly2 layers, which tend to be fabricated earlier in the processing sequence. The capacitances for the oxide layers fabricated earlier in the processing sequence are typically higher and thus easier to measure accurately. For capacitances less than or equal to 24.7 aF/µm 2 , the physical approach is preferred, as seen in Table 16.
The electro-physical technique enabled us to calculate the thicknesses of all the layers in the 1.5 µm commercial CMOS foundry process. Although some of the uncertainties appear to be small, the approach has provided thickness values that have been supported [6] via the successful optimization of the Young's modulus values for the various layers in the process.
In the future as equipment and processes improve, an opto-electro-physical technique using spectroscopic ellipsometry in conjunction with this electro-physical technique has the potential to provide better results. Meanwhile, further analyses are required of the assumptions and uncertainties of these techniques.

Appendix A. Measurement Specifics and Uncertainty Calculations
In this appendix, measurement specifics and the equations used to determine the values of the combined standard uncertainty, u c , are presented. The first section presents the basic combined standard uncertainty equation, the second section presents platform-height measurement specifics and the more specific uncertainty equations for these measurements, the third section presents step-height measurement specifics and the corresponding uncertainty equations, the fourth section presents an additional uncertainty component for stepheight measurements, and the fifth section presents the uncertainties for the thicknesses derived from capacitance and sheet resistance values.

The Combined Standard Uncertainty Equation
The combined standard uncertainty is comparable to the estimated standard deviation of the result [17]. It is equal to the square root of the sum of the squares of the uncertainty components. As pertains to this paper, the combined standard uncertainty can be calculated for thicknesses, platform-height measurements, and stepheight measurements.
If there are three sources of uncertainty, there would be three uncertainty components, and the uncertainty equation would be as follows: where u 1 is the uncertainty component due to one of the sources of uncertainty, u 2 is the uncertainty component due to the second source of uncertainty, and u 3 is due to the third source of uncertainty. Additional components are added to Eq. (68) for each additional source of uncertainty, and similarly, if there are only two sources of uncertainty, the third term in Eq. (68) is removed.
As an example, consider the thickness formula in Eq. (32) involving two thicknesses as given below: In Tables 9 and 10, the combined standard uncertainty values for t fox,ab(p2/sub)phys and t fox,be(p2/sub)phys are 0.0053 µm and 0.0103 µm, respectively. Therefore, we can calculate u c for t fox(p2/sub)phys as follows: This value for u c is presented in #2 of Table 8. Many of the other uncertainties are calculated in a similar manner.
Uncertainty components undergo either a Type A or Type B evaluation [17]. A Type A evaluation is based on any valid statistical method. A Type B evaluation includes experience with the behavior of relevant materials and instruments, for example. Therefore, the type of distribution (for example, a Gaussian or uniform distribution) is typically specified for Type B evaluations. For all of the uncertainty components in this paper, a Type B evaluation is assumed with a Gaussian distribution unless otherwise specified.

Measurement Specifics and Uncertainties for Platform-Height Measurements
In this section, the measurement specifics are presented for the platform-height measurements in Table 2 along with the combined standard uncertainty equation associated with this measurement.
For the platform-height measurements in Table 2, interferometric 3-D data sets are obtained incorporating the pertinent platforms on the thickness test structures. 13 The data sets are leveled with respect to the reference platform. Therefore, the height of the reference platform is at or near zero.
Three 2-D data traces (such as, traces "a," "b," and "c" shown in Fig. 19) are extracted from an interferometric 3-D data set and calibrated. These data traces (such as the one shown in Fig. 20) traverse the platforms, each being 50 µm long and 100 µm wide (except for the reference platforms which are 100 µm long). Therefore, for each 2-D data trace, data from approximately 70 µm in the center of each 100 µm long reference platform is averaged and data from approximately 20 µm in the center of each 50 µm long platform is averaged.
The reference platform height [12], platNr, is the average of the values obtained from the reference platforms from all the data traces. [ where an "a," "b," or "c" appendage to the platform designator refers to the data trace ("a," "b," "c," etc.) the measurement was taken from.
For each 50 µm long platform, the three measurements taken from the platform from traces "a," "b," and "c" are averaged together (and the standard deviation, s platNX , is calculated) and the reference platform height, platNr, is subtracted from this average to obtain the platform-height measurement [12], platNX, as given below: The measurement uncertainty across the width of the platform, u WplatNX , is equal to the square root of the sum of the squares of s platNX and s platNr , namely: This is the first component in the combined standard uncertainty equation given below for platform-height measurements: where u cert is the component in the combined standard uncertainty calculation that is due to the uncertainty of the value of the step-height standard, u repeat is the uncertainty of instrument calibration due to the repeatability of the measurements of the calibration standard, u drift is the uncertainty of a measurement due to the amount of drift during the data session 14 , and u linear is the uncertainty of a measurement due to the deviation from linearity of the data scan. (See [18] for the equations associated with these uncertainty components.) In particular, we can write the following equation for u cert assuming a Gaussian distribution: where platNX is the calibrated platform-height measurement under consideration, cert is the certified value of the step-height standard, and σ cert is the certified one sigma uncertainty of the certified step-height standard. For the presented data set, cert equals 9.887 µm and σ cert equals 0.083 µm.
We can write the following equation for u repeat assuming a uniform distribution: where z repeat is calculated to be the maximum of two uncalibrated values; one of which is the positive difference between the minimum and maximum values of the six calibration measurements taken before the data session (at the same location on the step-height standard) and the other is the positive difference between the minimum and maximum values of the six calibration measurements taken after the data session (at the same location on the step-height standard). Also, z 6 is the uncalibrated average of the six calibration measurements from which z repeat is found. For the presented data set, z repeat equals 0.029 µm and z 6 equals 9.821 µm. However, for the calculations involving plat3D(0), z repeat equals 0.035 µm and z 6 equals 9.774 µm, since the measurement of plat3D(0) was taken during a different data session.
We can make the following calculation for u drift assuming a uniform distribution:   Therefore, if interferometric data is taken on two different days, then this corresponds to two different data sessions. where z drift is calculated as follows: the average of the six calibration measurements taken before the data session (at the same location on the step-height standard) is determined and the average of the six calibration measurements taken after the data session (at the same location on the step-height standard) is determined. Then, z drift is calculated as the positive uncalibrated difference between these two values. Also, cal z is the zcalibration factor which is equal to cert divided by the average of the twelve calibration measurements. For the presented data set, z drift equals 0.013 µm and cal z equals 1.0061. However, for the calculations involving plat3D(0), z drift equals 0.010 µm and cal z equals 1.0121.
And lastly, we can make the following calculation for u linear assuming a uniform distribution: where z perc is the percent quoted by the interferometer manufacturer as the maximum deviation from linearity over the z-scan range. For the presented data set, z perc equals 1.0 %.
The resulting calculated values of u c are presented in Table 2.

Measurement Specifics and Uncertainties for
Step-Height Measurements In this section, the measurement specifics will be presented for step-height measurements along with the combined standard uncertainty equations associated with this measurement.
For step-height measurements [12] taken from one 3-D data set, given the averaged data from approximately 20 µm in the center of each 50 µm long platform for each data trace (as detailed in the previous section), the following calculation is used for each data trace: where t is the data trace ("a," "b," "c," etc.) being examined. The step-height measurement is then calculated to be the average of these measurements as follows: The standard deviation of these step-height measurements, s stepNXY , is also calculated and the following equality can be made: where u Wstep is the first component in the combined standard uncertainty equation for step-height measurements and it is due to the measurement uncertainty of the step height across the width of the step. This combined standard uncertainty equation, a modification of Eq. (76), is given below for the step-height measurements presented in Table 5: where platNX gets replaced with stepN XY in the calculations of u cert , u repeat , u drift , and u linear in Eqs. (77) to (80), respectively.
If two different 3-D data sets (one data set including the first platform, platNX, and a reference platform and the other data set including the second platform, platNY or platMY, and a reference platform) are used to find stepN XY or stepN X M Y (where N is the test structure number associated with platNX and M is the test structure number associated with platMY) then stepN XY or stepN X M Y is found using one of the following equations: where platNX, platNY, and platMY are found using Eq. (74).
With two different 3-D data sets, Eq. (84) is not used to find the combined standard uncertainty for stepheight measurements. Instead, the combined standard uncertainty equation for stepN XY or stepN X M Y would be as follows: where u platNX is the uncertainty component due to the measurement of platNX, u platNY is the uncertainty component due to the measurement of platNY, and u platMY is In summary, using Eqs. (87) or (88) would typically produce a larger value for u c , than if Eq. (84) were used. Therefore, whenever possible, step-height measurements are taken and Eq. (84) used as opposed to the use of platform-height measurements to determine step heights.

An Additional Uncertainty Component for
Step-Height Measurements An additional uncertainty component (namely u Lstep ) can be added to Eq. (84) in the calculation of u c for step-height measurements producing the following equation: where the components u basic , u Wstep , and u Lstep are described in the next few paragraphs. Table 15, an extension of Table 5 for step-height measurements, includes these uncertainty components.
The first component, u basic , in Eq. (89), presented in column 6 of Table 15, includes all the basic interferometric-related uncertainty components. In other words, for which the components u cert , u repeat , u drift , and u linear are also found in Table 5. Consult Sec. A.3 for details associated with these components.
The second component, u Wstep , in Eq. (89) presented in column 7 of Table 15, is due to the measurement uncertainty of the step-height across the 100 µm width of the step. Column 7 in Table 15 is a replica of column 6 in Table 5. Therefore, the two components u basic and u Wstep produce the values of u c given in Table 5.
The third component, u Lstep , in Eq. (89) presented in column 8 of Table 15, is the new uncertainty component. It is due to the measurement uncertainty of the step height across the length of the two 50 µm long platforms involved in the step. It is calculated using the following formula: where σ platNX , also found in column 4 of Table 15, is extracted from a 2-D data trace, such as trace "b" in Fig. 19, ideally taken through both platforms involved in the step. It is the standard deviation of the interfero-metric measurements taken from approximately 20 µm along the data trace in the center of the 50 µm long platform, platNX. Similarly, σ platNY , also found in column 5, is taken from approximately 20 µm along the data trace in the center of the 50 µm long platform, platNY. Note in Eq. (91) that the value for σ rough gets subtracted from σ platNX and σ platNY , where σ rough is the smallest of all the values for σ platNX and σ platNY obtained in this analysis. For the presented data set, σ rough equals 0.0025 µm.

Uncertainties for the Electrical Approach
In this section, the equations will be presented for the combined standard uncertainty values presented in Table 6 for the thicknesses derived from the MOSISsupplied capacitance values, and in Table 7 for the thicknesses derived from the MOSIS-supplied sheet resistance values.
For the combined standard uncertainty calculations of the thicknesses derived from the MOSIS-supplied capacitance values, look at Eq. (2). There are two uncertainty components; one due to the uncertainty of C a , or u Ca , and one due to the uncertainty of ε SiO2 , or u ε , such that (92) The first uncertainty component, u Ca , is assumed to be due solely to the standard deviation of the MOSIS-supplied capacitance values, σ Ca . 15 The capacitance values (C a ) and their standard deviations (σ Ca ) as supplied by MOSIS are presented in Table 6. Basically, with the help of Eq. (2), u Ca is calculated as follows assuming a Gaussian distribution: