Dielectrics for High Temperature SiC Device Insulation: Review of New Polymeric and Ceramic Materials

The keys to successful high power electronic systems are located as much in the ability to build high temperature power devices and to package them with the appropriate materials, as in the aptitude to reduce and control switching and conduction power losses. Particularly, high temperature low loss operation allows an increase in the power rating of these devices. The recent development of wide band gap semiconductor devices should allow improving power electronic systems. Wide band gap semiconductor materials, especially the most mature silicon carbide (SiC), should allow the electronics operation at high junction temperatures (>200°C), high voltages (>10 kV) or in harsh thermal environment, with faster switching and lower power losses active devices than the silicon (Si) counterparts. Such SiC devices impose more severe electrical and thermal stresses to the surrounding insulating materials (polymeric passivation and encapsulation materials and ceramic substrates). Lots of improvements have already been built-up at the die level; however, superior device performance degrees could be reached using higher performance insulation materials. Among the power device packaging materials for a high temperature operation, typical organic passivation and encapsulation appear nowadays as the most sensitive to the thermal constraints (Tmax=250 °C). Moreover, even if ceramic materials present a high isothermal stability (up to 600°C) they are very sensitive to the large passive or active thermal cycling induced by the power devices or by severe environmental constraints during operation. Therefore, research on high temperature dielectric materials tries to identify new polymeric and ceramic materials electrically, thermally and mechanically suited for the packaging of SiC power devices and to determine their effective limits (properties and durability). In this chapter after a section on the high temperature applicative needs and the new thermal and electrical constraints imposed by SiC devices on the surrounding insulating materials, a complete review of the polymers and ceramics insulating materials which are reported to potentially answer to the packaging issues is carried out through a presentation of their different main physical properties and the sensitive aging parameters in link with microstructure. Among the polymeric materials, BPDA/PDA polyimide (PI), fluorinated parylene (PA-F), polyamide-imide (PAI), and silicone (PDMS) will be studied. On the other hand, mainly aluminium nitride (AlN) and silicon nitride (Si3N4) ceramics will be presented.


Introduction
The keys to successful high power electronic systems are located as much in the ability to build high temperature power devices and to package them with the appropriate materials, as in the aptitude to reduce and control switching and conduction power losses. Particularly, high temperature low loss operation allows an increase in the power rating of these devices. The recent development of wide band gap semiconductor devices should allow improving power electronic systems. Wide band gap semiconductor materials, especially the most mature silicon carbide (SiC), should allow the electronics operation at high junction temperatures (>200°C), high voltages (>10 kV) or in harsh thermal environment, with faster switching and lower power losses active devices than the silicon (Si) counterparts. Such SiC devices impose more severe electrical and thermal stresses to the surrounding insulating materials (polymeric passivation and encapsulation materials and ceramic substrates). Lots of improvements have already been built-up at the die level; however, superior device performance degrees could be reached using higher performance insulation materials. Among the power device packaging materials for a high temperature operation, typical organic passivation and encapsulation appear nowadays as the most sensitive to the thermal constraints (T max =250 °C). Moreover, even if ceramic materials present a high isothermal stability (up to 600°C) they are very sensitive to the large passive or active thermal cycling induced by the power devices or by severe environmental constraints during operation. Therefore, research on high temperature dielectric materials tries to identify new polymeric and ceramic materials electrically, thermally and mechanically suited for the packaging of SiC power devices and to determine their effective limits (properties and durability). In this chapter after a section on the high temperature applicative needs and the new thermal and electrical constraints imposed by SiC devices on the surrounding insulating materials, a complete review of the polymers and ceramics insulating materials which are reported to potentially answer to the packaging issues is carried out through a presentation of their different main physical properties and the sensitive aging parameters in link with microstructure. Among the polymeric materials, BPDA/PDA polyimide (PI), fluorinated parylene (PA-F), polyamide-imide (PAI), and silicone (PDMS) will be studied. On the other hand, mainly aluminium nitride (AlN) and silicon nitride (Si 3 N 4 ) ceramics will be presented.

Needs, insulation problematic and constraints
The "high temperature" range and the applicative needs are presented in the first part of this section. Silicon carbide arises today as the solution for above 200 °C operations on the semiconductor point of view. The roles and the types of dielectrics in the current semiconductor devices are described then. Insulating passivation, encapsulation and substrate, involving polymeric or ceramic materials, are the main insulating functions to be satisfied by the device packaging. Besides the high temperature requirement, the specific constraints on these materials and their assembly due to the use of SiC are presented at last.

Needs for high temperature semiconductor devices
Silicon being the most widely used semiconductor material for active devices active devices, the latter maximal operating junction temperature (T j ) limitation fixes the threshold for the "high temperature" denomination. Hence, operations or environments above 200 °C are qualified as "high temperature", 200 °C being the highest maximal operating temperature for available silicon devices. For a long time, the list of high temperature electronics markets has been given as follows: deep well logging (300 °C), geothermal research (400 °C), space exploration (500 °C), for which the common points are the high ambient temperature (T a ) of the environment (as indicated into brackets) and their 'niche' specificity. The self -heating of semiconductor devices under operation has been identified as a predictable limitation for the silicon based electronics development for a while as well. Today, the trends for higher integration, or more elevated power level, leading to T j higher than 200 °C, increase the list of the high temperature device markets. In fact, a simple relation between the junction temperature and the power losses (P d ) dissipated through the device can be written as follows: where R thja is the thermal path resistance between the device dissipating junction and the system ambient. The wider field of the energy conversion either for industry or transportation applications is concerned nowadays. Indeed, embedded integrated power electronics (with reduced or suppressed cooling requirements, meaning very high R thja values) as well as static converters closer to (or inside) hot engine areas (which may correspond simultaneously to elevated T a and P d ), are wanted. The aims are mass, volume, and cost savings and higher T j devices are required. The recent silicon carbide components emergence (Cooper Jr. & Agarwal, 2002), with promising operating temperatures well above 200 °C (Raynaud, 2010) in the future, represents a perspective of offer which will even encourage new demands. As a consequence, the research for high temperature operating dielectrics suitable for the semiconductor die assembly has become essential for the development of the full systems, as insulating materials are among the key points for its performance and reliability.

Dielectrics for power device insulation
To realize a discrete (single die) or hybrid (multiple dies) semiconductor device, multiple materials playing different roles are assembled, all of them constituting the device packaging. The semiconductor die itself is not a single material element, as it exhibits different metallized areas (ohmic contact, insulated gate contact, …), and different dielectric www.intechopen.com Dielectrics for High Temperature SiC Device Insulation: Review of New Polymeric and Ceramic Materials 411 layers (gate dielectric, primary and secondary passivations, intermetallic insulator, …). In particular, the secondary passivation is the top final coating layer elaborated at the wafer level state, before sawing the dies. Contrary to the other existing dielectrics which are inorganic (most often SiO 2 and Si 3 N 4 , from tens of nm to the order of 1 µm in thickness), the secondary passivation is usually a spin-coated polyimide film (from several µm to few tens of µm thick). Its role is the die protection against premature electrical breakdown, mechanical damages and chemical contamination. In a multichip semiconductor power device, the die backside contacts require to be insulated from each other and from their common mechanical substrate. Double-side metallized ceramic substrates are mostly used in this case, instead of polymer based substrates suitable for low power and low voltage ratings. Such metallized ceramic substrates allow the electrical interconnection between the dies soldered on them and with the external circuit. Besides their mechanical and insulating functions, the ceramics ensure the thermal interface with the intermediary dissipating baseplate or the cooling system directly. For the die topside electrical connections, several techniques exist today apart from the conventional wire bonding, which have been developed in order to improve the packaging electrical performance, the cooling efficiency, and the '3D' system integration capability. In particular, 'sandwich' structures involve a second metallized insulating substrate (with polyimide (Liu, 1999) or ceramic as dielectric layer) for the chip top electrodes connecting. Either metal posts or bumps (Mermet-Guyennet, 2008) (preliminary brazed on the chip metal pads), or solder bumps (Dieckerhoff, 2006) (preliminary deposited as well), or direct bonding (Bai, 2004), have been used for the attachment between the chip top pads and the ceramic substrate metallization circuit. Finally, the empty space, existing above the assembly (as in the conventional wire-bonded structures or in the pressure-contacted structures) or present within the gap of the 'sandwich' structures, has to be filled with an insulating material. Its role is to avoid premature electric breakdown and partial discharges, and to protect all the system against humidity and contaminations. This encapsulation function is generally satisfied using silicone gels, which minimize mechanical strains on the assembly. More recently, the use of polymeric underfills, with a thermal expansion coefficient close to the soldered joint ones, is reported for '3D' structures.

Specific constraints induced by SiC properties
The superior features of silicon carbide compared to silicon ones are recalled in Table 1, in order to introduce their potential impacts on the die surrounding materials conditions under operation. The high temperature ability of this wide energy band gap semiconductor principally arises from its much lower intrinsic carrier density ni, allowing the translating of the thermal runaway onset (induced by prohibitive leakage currents) above at least 700 °C instead of at maximum 200 °C for silicon, depending on the device blocking voltage ratings. Because no other SiC physical intrinsic mechanism is supposed to limit Tj, the upper T jmax temperature limitation for SiC devices is more likely to be imposed by the high temperature performance and stability of all the die surrounding materials and their related interfaces and by the market need besides. Up to now, several high temperature SiC based circuits and devices have been reported, demonstrating short term operations up to 300 °C or 400 °C ambient temperatures (Mounce, 2006;Funaki, 2007). Connected to the thermal aspect, it should be added that high temperatures, and large thermal cycling magnitudes, mean more www.intechopen.com severe thermo-mechanical stresses and fatigue on the device assembly parts, due to their different thermal expansion coefficients. Also, a higher T a may lead to higher thermal conductivity requirement (for reduced Rthja), in order to preserve a sufficient power density level (and its related level of power losses dissipation) for the wanted system operation for a given T jmax (according to relation (1)). Beyond the high temperature operation ability and related constraints presented above, the high critical electric field E C is the other SiC specificity inducing major novel stresses to the die surrounding materials, in comparison to the silicon case. Here the insulating dielectrics are more specifically addressed with regard to this aspect. Because the one-order higher E C property allows faster and higher voltage devices with low conduction losses than the silicon one, SiC components are designed to operate with internal maximal electric fields at blocking state as close as possible to the SiC critical E C value. As a consequence, even for optimally designed junction termination structures for a given blocking voltage rating, electric field peak values as high as around 3 MV/cm exist near the semiconductor surface, at the device periphery (Locatelli, 2003). Moreover, smaller dimensions of the device are resulting from the higher E C ability of SiC, including shorter periphery protection extension. Higher average result values of the electrical field as well. The semiconductor surface passivation materials are concerned at first level by such electrical stress enhancement. Besides, the higher the blocking voltage rating, the more the encapsulating material (above the passivation coating) will be impacted too. Today, the record in terms of breakdown voltage for a single SiC component is 19 kV for a SF 6 gas encapsulated diode demonstrator (Sugawara, 2001), and more than 50 kV might be achievable with SiC while 10 kV represent the Si device practical limit. Last but not least, higher on-state current density, higher switching speed and smaller SiC dies (thanks to a combination of good E C , electron mobility µ n , and electron saturation velocity v sat properties), also represent new challenges, especially in terms of connecting materials and highly compact packaging structures. Specific constraints on the insulation elaboration techniques may result so.

Material choice criteria and main issues
As presented in the previous paragraph, the insulating passivation, encapsulation and substrate are the three main insulating functions to be satisfied by the device packaging, involving organic and ceramic materials. Besides their electrical role, the involved materials may play mechanical, and/or thermal, and/or chemical roles. The aim of this paragraph is to review the main limiting properties or the main influent constraints to be taken into account at high temperature, according to the dielectric nature or its role in the device. Used dielectrics or reported candidates, as materials for high temperature device packaging, are presented at the same time through the proposed result examples. In particular, biphenyltetracarboxilic dianhydride/p-phenylene diamine (BPDA/PDA) polyimide (PI), and flurorinated parylene (PA-F) are considered as interesting high temperature insulating surface coating. Limits of polydimethylsiloxane (PDMS) materials, currently used as volumic insulation for encapsulation purpose, are presented as well. The different ceramic/metal couples available for the device assembly insulating substrate are also discussed.

Thermal stability and degradation of organic materials
Thermal stability is a fundamental parameter for a long-term reliable high temperature operation of polymeric and other organic materials. It appears as the first stage in the material evaluation because it can ensure a stability of the other physical properties. Conventionally, the thermal stability is determined using thermal gravimetric analysis (TGA) either in oxidant or inert atmosphere. This consists in probing the mass loss of a material versus temperature under a controlled heating slope (dynamical TGA, DTGA) or time at a set temperature (isothermal TGA, ITGA). The degradation temperature (Td) is often defined as the 5%-mass loss onset in DTGA plots. Figure 1 shows a comparison of DTGA measurements of thermo-stable organic materials. According to the material structural chemistry, T d is more or less elevated. Thus, the thermal stability determined by the means of DTGA in nitrogen reports T d values of 606 °C, 455 °C, 537 °C, and 456 °C for BPDA/PDA PI, PAI, PA-F and PDMS/silica materials, respectively . For polymers, the thermal stability is often related to the presence of benzene rings in the monomer structure. In the case of PI materials, it has been shown that the increase in the number of benzene rings contributes to an increase in the degradation temperature (Sroog, 1965). However, the degradation temperature can be also affected by the presence of low thermo-stable bonds in the macromolecular structure. As an example, even if BPDA/PDA and PMDA/ODA (Kapton-type) PI own the same number of benzene rings (i.e. three in the elementary monomer backbone), the absence of the C-O-C ether group in the case of BPDA/PDA PI allows increasing T d of 60 °C in nitrogen and 110 °C in air in comparison to T d of PMDA/ODA PI (see Figure 2). Indeed, this is due to the lower thermal stability of the ether bonds inducing earlier degradations than the rest of the structure (Sroog, 1965;Tsukiji, 1990). Although the degradation temperature obtained by DTGA appears as an important parameter for the evaluation of the thermal stability, it is not sufficient to valid that a polymer can endure high temperature during a very long time. In addition, some polymers can exhibit lower T d values while they display a more stable behavior during time. Therefore, short-term ITGA measurements are recommended in order to identify premature degradation processes. Figure  3 presents ITGA measurements of both BPDA/PDA PI and PA-F films in air. Whereas PA-F films own a lower dynamical T d value than PI films, they show a better stability under isothermal conditions. Hence, after 5,000 minutes at 350 °C in air atmosphere the weight loss of PA-F is only of 0.5 % compared to 2.4 % for BPDA/PDA PI. All these illustrations lead to highlight that the thermal stability is a property difficult to quantify with accuracy. It depends strongly on various structural parameters (materials, …) and experimental conditions (type of measurements, atmosphere, temperature, …).
However, it appears as an essential information for a first selection of materials for high temperature uses.

Thermal properties of ceramic materials
In a classical approach for power electronics, the substrates assure the mechanical link and the electrical insulation between the semiconductor die and the rest of the system. For high temperature applications, ceramic materials are a natural choice due to their thermal stability, and high thermal conductivity compared to polymer materials. Ceramic materials on their own present a high isothermal stability (up to 600°C) and seem to be self-sufficient in most cases to insulate electrically appropriately the semiconductor from the environment. However, the presence of an attached metal can be at the origin of several mechanical problems which will be treated in a later section. Furthermore, when high power densities are attained, heat extraction could need to be assisted by high-thermal conductivity ceramics as aluminum nitride, for instance. The choice of the appropriate insulating ceramic is related to a compromise of electrical properties, thermal characteristics and compatible technologies available to assemble the components. Table 2 presents the characteristics of some of the insulating ceramics that are commercially available to this date. Beryllium oxide (BeO) use is being more and more limited due to toxicity concerns, and is being replaced, when possible, by other ceramic technologies.

Electrical properties
As the main function of dielectric materials in the environment of the power devices is to separate two different electrical potentials from one to the other, their electrical insulating properties are fundamental and must be accurately known versus temperature. Particularly, in the case of the insulation of high temperature SiC power devices and modules (above 200 °C), the electrical properties of the candidates need to be investigated in the same range.

Dielectric permittivity and loss
The low field dielectric properties are usually defined under the complex dielectric permittivity formalism (ε * ), which is made up of the dielectric constant (real part) and the dielectric loss (imaginary part) (see eq. (2)). The ratio between the imaginary part and the real part corresponds to the dielectric loss factor (tanδ) (see eq. (3)): where ε' and ε'' represent respectively the real and imaginary parts of the complex dielectric permittivity, ω is the angular frequency and The dielectric permittivity and loss result from polarization processes in the material bulk such as the orientation of dipole entities. This phenomenon is strongly dependent on the frequency of study. Moreover, the dipolar mobility being thermally activated, the polarization processes are also strongly temperature-dependent. For good insulating 417 materials, an acceptable upper limit for the loss factor can be situated around 10 -2 while it can be as low as 10 -5 for very performing materials. Figure 5 shows two examples of the high temperature dependence of the dielectric properties of good insulating dielectrics: (a, c) BPDA/PDA PI films and (b, d) Al 2 O 3 ceramic. Typically, at low temperature (<100 °C), most of the thermo-stable dielectrics present a nonvariant relative permittivity and a loss factor below 10 -2 . On the contrary, for higher temperatures, it is observed that the magnitude of both ε' and tanδ exhibits a strong increase all the more important as temperature is high and/or frequency is low. Such magnitudes cannot find explanations in simple dipolar polarization processes (Adamec, 1974). These huge values are mainly associated to interfacial polarization processes (i.e. either due to Maxwell-Wagner-Sillars (MWS) relaxation-type in heterogeneous specimen or electrode polarization) (Kremer & Schönhals, 2003). MWS relaxation and electrode polarization are involved by the drift of mobile charges across the materials towards bulk interfaces (different phases, impurities, …) or electrodes, respectively. Their occurrence corresponds to the transition where the materials start to become semi-insulating (i.e. ε'>>ε ∞ and tanδ>10 -1 ).
Consequently, it appears as more judicious to investigate them in terms of electrical conductivity (i.e. property completely controlled by the motion of charges).

Electrical conductivity
Insulating materials are defined by a volume conductivity largely below 10 -12 Ω -1 cm -1 . The peculiar range of semi-insulating materials corresponds to the conductivity range between that of insulating ones and semiconductors (i.e. from 10 -12 to 10 -8 Ω -1 cm -1 ). When the conduction of mobile charges dominates the dielectric loss, compared to the dipolar processes, it is preferable to represent the loss in the formalism of the alternating conductivity (σ AC ) as a function of frequency and temperature using eq. (4) (Kremer & Schönhals, 2003;Jonscher, 1983): where ε 0 is the vacuum permittivity, σ DC is the static volume conductivity, A is a temperature-dependent parameter and s is the exponent of the power law (0<s≤1).
In a large frequency range of study, the AC conductivity is made up of a high frequency linear contribution and an independent-frequency region at low frequency characterized by a static conductivity (σ DC ) plateau. The DC conductivity is a temperature-dependent property following usually the Arrhenius-like behavior, described by eq. (5). Materials presenting a thermal transition in the investigated temperature range (e.g. glass transition region) follow the non-linear Vogel-Fulcher-Tamman (VFT) behavior given by eq. (6): where σ ∞ is the conductivity at an infinite temperature, E a is the activation energy, k B is the Boltzmann's constant, D is the material fragility and T 0 is the Vogel temperature. DC conductivity is related to the structure and microstructure of the dielectric materials. Moreover, for a given material the dielectric properties are also strongly related to the way used to synthesize and process it. Hence, whereas it is difficult to predict a priori what will be the final DC conductivity from a theoretical point of view, it appears as impossible to estimate before what will be the impact of the material processing on this property. Consequently, it is fundamental to investigate, analyse and understand the origins of such variations of the DC conductivity in close relations with the material physico-chemical properties. Figure 6 presents the main parameters affecting the temperature dependence of the dc conductivity for various thermo-stable polymers. Figure 6a shows the variation of σ DC of 400 °C-cured BPDA/PDA PI films for different thicknesses from 1.5 µm to 20 µm. It is observable an increase in σ DC with increasing thickness. The inlet plot, showing the infrared spectra of the PI films, allows relating this evolution to the remaining presence after the material processing of PI precursor (polyamic acid, PAA) residues . These impurities are a source of ionic species increasing the electrical conduction. Figure 6b shows the temperature dependence of σ DC for two PAI films with different glass transition temperatures (T g ). The increase in T g for PAI 2 (i.e. 335 °C against 280 °C for PAI 1 obtained by DSC in the inlet plot) allows shifting the onset of the σ DC increase towards higher temperature  controlling the charge motion across amorphous dielectrics. For high temperature operation, higher the T g , wider is the temperature range of use. Figure 6c and 6d present respectively the σ DC temperature dependence of PA-F before and after a 400 °C annealing and as a function of thickness. It is shown that both annealing and material thickness improve the electrical properties (DC conductivity decreases). Inlet plots show that the PA-F crystallinity and the crystallite size are increased either with a thermal treatment or increasing thickness. Consequently, when the volume of the crystalline phase is increased the motion of charges within the material becomes more difficult, thus reducing the DC conductivity . In the case of ceramic materials, it is difficult to detect the DC conductivity because of the presence of several interfacial relaxations (from internal or extrinsic origins) at low frequency. Moreover, the pure nature effect of the ceramic on the DC conductivity is difficult to be derived due to the strong additive influence on the synthesized materials. Figure 7 shows the frequency dependence of the AC conductivity of various ceramics at different temperatures. No evidence can be extracted on the substrate nature effect because all the substrates own different sintering processes (temperature, additive types and concentrations, …). However, these results let expect that most of the ceramics present relatively low DC conductivity less than 10 -12 Ω -1 cm -1 at 400 °C such as some AlN or Si 3 N 4 substrates. Finally, Figure 8 presents the impact of the sintering process at 1800 °C (i.e. conventional thermal sintering and spark plasma sintering, SPS) on the AC conductivity of AlN ceramics with Y 2 O 3 additives. The microstructure, density and the distribution of sintering additives impact the low frequency-dispersion of the dielectric properties. The SPS sintered AlN ceramic has lower AC conductivity values at high temperatures, even if the low-frequency plateau (i.e. DC conductivity) cannot be observed in the investigated frequency range.

Dielectric breakdown field
The dielectric strength is the capability of dielectrics to withstand high electric fields without failure. The dielectric breakdown field (E BR ) is the upper limit of electric field that dielectrics can support under a voltage supply. Its value strongly depends on the electrode configuration (i.e. plane-plane or needle-plane electrodes). In homogeneous plane-plane electrode configuration, the dielectric breakdown field is given by: where V BR is the breakdown voltage and d is the dielectric thickness.
Experimental breakdown values (EBR) exhibit a dispersion that requires statistical treatment in order to extract a mean value under the specific measurement conditions. Thus, the data are usually analyzed using the Weibull distribution law (Weibull, 1951): where F(E BR ) is the cumulative probability of failure, α is the scale parameter (i.e. the field value for which 63.2% of the samples are failed), β is the shape parameter quantifying the width of the data distribution (i.e. β>>1 is related to a low scattering of the data) and γ is the threshold parameter (often γ=0).
Even if the dielectric strength is an intrinsic parameter depending mainly on structural properties, it is the dielectric property the more sensitive to both experimental (electrode configuration, electrode surface, material thickness, voltage waveform, voltage ramp speed, ...) and environmental parameters (temperature, humidity, pressure, ...). If it is an important property to know, this appears as not self-sufficient for dimensioning electronic systems due to the extreme complexity of the electrical and thermal stresses induced by power devices and environmental severe stresses induced by applications. Consequently, the following section only gives the main experimental observable tendencies on the breakdown field of thermo-stable dielectrics. Recently, the influence of several parameters on the dielectric strength has been reported for BPDA/PDA PI and PA-F films (Diaham, 2010b;Khazaka, 2011a).   Figure 9 shows the electrode area influence on the cumulative probability versus E BR at room temperature for BPDA/PDA PI and PA-F films. For PI, it is possible to observe that the cumulative probability curve shifts towards lower breakdown fields with increasing the electrode diameter. The scale parameter α (F=63.2 %) decreases also with increasing the electrode diameter. In the same way, the shape parameter β (i.e. the slope of the fitting straight line) decreases with increasing the electrode diameter. These two simultaneous observations typically deal with an increase in the result scattering. They usually are characteristic of an increase in the probability to find defects or impurities in the material bulk leading to the failure of the insulating layer. In the case of PI films, this tendency is associated to the increase in the probability to find polyamic acid and solvent precursor residues in the film. Contrary to PI, PA-F exhibits an area independent dielectric strength behavior at high breakdown field. The fact that PA-F is a by-productless material could explain such a behavior. At low fields, an area dependence appears and is usually related to the presence of surfacic defects (i.e. stacking faults, pinholes, ...). Such studies allow often extrapolating dielectric strength for higher areas which can correspond to more practical cases. Figure 10 presents the influence of the main other parameters on the dielectric breakdown field of dielectrics. The temperature dependence of the dielectric strength shows a general decrease in α with increasing temperature. For instance, thermo-stable polymers such as PI, PAI and PA-F films illustrate such a tendency (see Figure 10a) (Diaham, , 2010b. The thermal activation of the mobile charge transport and electromechanical constraints are usually brought to light to interpret the origin of the breakdown of polymers. Figure 10b shows the thickness dependence of the dielectric breakdown field of PI and PA-F films. It is usual to observe a general decrease in the breakdown field with increasing thickness for dielectric materials. Here also, this behavior can be explained by an increase in the probability to find defects in the dielectric layer. However, whatever the thickness investigated the dielectric strength remained high above 1 MV/cm. As seen in the previous section, the processing parameters of ceramics have a great impact on dielectric properties evolution with temperature. When comparing AlN ceramic substrates from two different manufacturers, the differences in the processing conditions (i.e. organic binders, sintering additives, sintering temperature and dwell times) result in subtle differences in the final microstructures and crystallographic phase distributions, that modify considerably the dielectric strength evolution versus temperature (Chasserio, 2009). Figure 10c and 10d present the influence of the ceramic substrate nature and the impact of the sintering process of commercial AlN ceramics on the breakdown field. On one hand, AlN and Si 3 N 4 ceramics appear as the materials owning the higher dielectric strength even at high temperature compared to Al 2 O 3 and BN ceramics. However, for high temperature insulation applications cautions have to be taken, even in the choice of a same-type of ceramic. Indeed, from one supplier to another, breakdown field values can vary strongly in the high temperature range (see Figure 10d with two different commercial AlN).

Aging and life time
In power electronics applications, the high operating temperature (>200 °C) can result from either the ambient environment, the power dissipation, or a combination of both. Thus, after the first stage of initial material characterizations, it is necessary to follow the above properties during aging in harsh environment (temperature during time, thermal cycles, atmospheres, ...) in order to estimate the life time of dielectrics. In this section, the influences of the more usual aging conditions on the main sensitive parameters for each dielectric function in a power device assembly are presented. www.intechopen.com

Thermal aging
For organic materials, the thermal aging appears among the more severe aging condition during long term service because temperature can carry out sufficient energy to break the structural bonds constituting the material skeleton. Although approximate models exist to predict accelerated aging under relatively smooth conditions, nowadays nobody can ensure their validity at very high temperatures near the limit of the polymer maximal operating temperature due to the absence of knowledge of the degradation mechanisms. Moreover, despite the importance of such a topic, there is a lack of studies in the literature dealing with long term thermal aging of polymers (Diaham, 2008;Khazaka, 2011b, Wayne Johnson, 2007Zheng, 2007;Yao, 2010). It is indispensable to perform extremely long aging under such high temperature to validate high temperature reliability. In order to probe thermal-induced degradations, the dielectric breakdown strength is often appreciated because it gives information on the high field properties of dielectrics. Figure 11 shows the dielectric strength evolution of BPDA/PDA PI films versus time for several aging temperatures in air. The figure compares also the dielectric strength evolution for films coated on different substrates. We can observe first that the life time depends on exposure temperatures. For instance, while the life time is more than 7,000 hours at 250 °C for PI coatings on stainless steel, it decreases strongly with increasing temperature: around 5,000 hours at 300 °C; 1,000 hours at 340 °C and 400 hours at 360 °C. This result underlines the thermal activation of the degradation. Secondly, the aging of PI coatings depends strongly on their substrate nature. Indeed, when the films are deposited on Si wafers, the life time of the material is strongly increased. For instance, the life time at 300 °C of films deposited on Si is superior than 5,000 hours while the same films deposited on metal substrates (stainless steel) is less than 5,000 hours. This can be interpreted by the the difference of the CTE between the PI films and the substrates. In the case of stainless steel substrates (CTE=17 ppm/°C), internal residual mechanical stresses are amounted in the BPDA/PDA PI layer (CTE=3-6 ppm/°C) which lead to premature degradation during thermal aging. Semicrystalline PA-F films (Parylene HT in commercial form) have been developed for their capability to support very high temperature during very long time even in oxidant atmosphere due to C-F bonds in the monomer structure. This relatively new material is supposedly stable for at least 1,000 hours at 350 °C in air atmosphere and 3 hours at 450 °C (see Figure 12) (Kumar, 2009). Nowadays only one study has been reported on the high temperature electrical properties of PA-F . This places PA-F among the potential suitable polymers for insulating coating in high temperature electronics applications.  Kumar, 2009). Measured at room temperature Figure 13 shows the room temperature probed dielectric strength of silicone gel and silicone elastomer used for the device encapsulation function during thermal aging at 250 °C in air (Yao, 2010). The breakdown field falls down in the early first stage of aging, whatever the encapsulant materials, showing the difficulty nowadays to identify materials, for this important function of the packaging, able to operate at high temperature with reliability. Comparable results on other silicone-type materials have been reported recently by Zheng (Zheng, 2007). The penury of thick and soft materials appears as the main problem to increase the operating temperature of high voltage power devices above 250 °C, at least without changing radically the architecture of power modules.

Thermal cycling
One of the main problems in power electronic systems, besides the discrete materials performance is their heterogeneous mechanical properties. The thick insulating ceramics are especially under concern, more than the thinner passivation layers or the very soft encapsulating silicone gels classically used in power devices. In a first glance, SiC and the insulating ceramic substrates appear to have a similar CTE, but as stated earlier, metallic conductors that support the assemblies have much larger CTE, often 5 to 10 times larger. This makes the interface of ceramic and metal of the substrate component a susceptible point of failure. Thermal cycling amplifies this effect, as systems are exposed to wide temperature fluctuations over their lifetime. In high temperature operating SiC devices, several technologies, such as Al 2 O 3 direct-copperbond (DCB) and AlN DCB are limited in wide temperature cycling (Dupont, 2006a), as the ceramic is fractured by the mechanical stress that is imposed by the copper foil (see Figure 14a). The local mechanical stress is incremented by each cycling due to the work hardening of the copper foil, increasing its yield strength (see Figure 14b), this goes on until the maximum acceptable stress is attained at the ceramic, causing its failure (Dupont, 2006b). For intermediate current levels, it is possible to diminish the metallization thickness to delay failure, or to make dimples applied to the edges of the copper foil (Dupont, 2006a). The availability of new substrate ceramics and available metallization types make possible to increase the reliability in increasing temperature cycling ranges. AlN can be brazed to aluminium, that has a higher CTE when compared to copper, but a lower recrystallization temperature (200-400 °C). This allows for a recrystallization after the work hardening imposed by the thermal cycling, keeping the constraints below the fracture limit of the AlN (Lei, 2009). On the other hand, Si 3 N 4 has much higher fracture toughness, allowing it to resist the work hardening of copper across cycling (El Sawy & Fahmy, 1998). Si 3 N 4 brazed to copper is claimed to last more than 5,000 cycles, ten times more than DCB technologies (Kyocera, 2009). Alternative approaches involve the use of low CTE metals as Kovar alloys (Lin & Yoon, 2005

Atmosphere effects
Atmosphere nature acts as an important factor in the degradation of the polymers. In the case of BPDA/PDA PI films, Figure 15 shows the influence of the ambient atmosphere of aging on PI high temperature breakdown voltage. This result shows the increase in the life time when aging is performed into inert atmosphere. Oxygen atoms coming from air atmosphere lead to cut the PI monomer skeleton inducing a thermo-oxidative degradation processes (Khazaka, 2011b). In nitrogen atmosphere, the pure thermal degradation processes start at a further moment or temperature. This highlights the importance of using hermetic cases for power devices or to use oxygen barrier layers to protect PI films against oxygen. The effects of such barriers (e.g. SiO x , Si x N y ) have been previously reported elsewhere (Khazaka, 2009). On the contrary, the atmosphere nature seems to have low influence in the case of PA-F due to its low permeability to oxygen. This kind of materials could act as a good oxygen barrier coating over other oxygen sensitive polymers to protect them and increase their life time under high temperature conditions.

Conclusion
This chapter summarizes recent worldwide research advances regarding reported insulating polymers and ceramics for high temperature power SiC devices and modules. A presentation of their main limiting physical properties regarding high temperature applications, linked to microstructure analyses, is also presented. Among polymeric materials, BPDA/PDA polyimide (PI) or fluorinated parylene (PA-F) are reported as interesting candidates for high temperature operation due to their highest and longest thermal stability. Moreover, they keep good dielectric properties even above 250 °C and even in oxidative atmosphere. PI film electrical properties are very sensitive to curing process while PA-F ones depend strongly on the crystallinity of the layer. However, even those materials may be not suitable for answering the highest temperature identified needs (above 400 °C) for long-term operation. Other polyamide-imide (PAI) and silicone elastomer (PDMS) materials, widely used up to now as thick insulating in electronic systems, exhibit a long-term operating limit below 250 °C. Today, it remains the issue of the existence of thick and soft insulating polymeric materials able to withstand high voltage even in the very high temperature range (>250 °C) during thousands of hours in order to answer the insulation of high temperature/high voltage SiC devices. Consequently, future research should concentrate towards this objective. Regarding ceramics, the high thermal conductivity and the relatively invariant temperature dependence of the dielectric strength of aluminium nitride (AlN) and silicon nitride (Si 3 N 4 ) place them as the more performing ceramic materials to realize metallized substrates for high temperature power electronic modules. However, the choice of their metallization nature and geometrical parameters is of first importance in order to improve the substrate life time. Thus, AlN/Al and Si 3 N 4 /Cu couples have already shown higher performances than classical DCB technologies, particularly in terms of thermal cycling resistance and could be good alternatives to answer the needs in high temperature and severe cycling substrate applications. Silicon Carbide (SiC) and its polytypes, used primarily for grinding and high temperature ceramics, have been a part of human civilization for a long time. The inherent ability of SiC devices to operate with higher efficiency and lower environmental footprint than silicon-based devices at high temperatures and under high voltages pushes SiC on the verge of becoming the material of choice for high power electronics and optoelectronics.

Acknowledgment
What is more important, SiC is emerging to become a template for graphene fabrication, and a material for the next generation of sub-32nm semiconductor devices. It is thus increasingly clear that SiC electronic systems will dominate the new energy and transport technologies of the 21st century. In 21 chapters of the book, special emphasis has been placed on the â€oematerialsâ€ aspects and developments thereof. To that end, about 70% of the book addresses the theory, crystal growth, defects, surface and interface properties, characterization, and processing issues pertaining to SiC. The remaining 30% of the book covers the electronic device aspects of this material. Overall, this book will be valuable as a reference for SiC researchers for a few years to come. This book prestigiously covers our current understanding of SiC as a semiconductor material in electronics. The primary target for the book includes students, researchers, material and chemical engineers, semiconductor manufacturers and professionals who are interested in silicon carbide and its continuing progression.