Cost-Effective Solution of Input Voltage Stabilizer of Auxiliary Drive Converter for Traction Vehicles

This paper describes a prospective design concept of a hard switching input voltage stabilizer for the auxiliary drives converters of dc catenary fed light traction vehicles. Auxiliary drives are mostly dedicated to generate standard power grid that supplies various on-board equipment and charging on-board batteries. The input voltage stabilizer (IVS) is the first input block of auxiliary drives. This block defines the voltage level of the consequent dc/dc isolated converter (IC). The main aim of this paper is to present the reader with the design of a low-cost variant of the voltage stabilizer. The described input voltage stabilizer is designed as a buck (step-down) or boost (step-up) converter, operating with an input catenary voltage range of 400 (VDC) to 950 VDC. The new fast, discrete IGBT H3 transistors and SiC diodes allow switching frequency from 20 kHz to 30 kHz in a hard switching mode with power rated up to 22 kW. DOI: http://dx.doi.org/10.5755/j01.eee.21.6.13752


I. INTRODUCTION
This research has been motivated by our industrial partner with the aim of developing a new generation of electric equipment for light traction vehicles (mainly mass transport vehicles like trolley buses and trams).One part of light rail vehicles' electric equipment is the traction converter for auxiliary drives which consists of input voltage stabilizer (IVS) and the dc/dc isolated converter, which operates at high switching frequencies and under hard switching conditions.The auxiliary drives are an integrated part of light traction vehicles.They are mostly used for generating a standard power grid which supplies various on-board equipment and charges on-board batteries.The auxiliary drives are designed while taking into consideration the voltage range of the DC catenary.In our case, the dc catenary voltage range of light traction vehicles may vary between 400 VDC -950 VDC for rated catenary voltage 600 VDC and 750 VDC.
In equipment, including auxiliary drives [1].For simplicity's sake, we omit the charger branch [2], [3] as a part of auxiliary drives in the traction drive structure.The main branch includes the input filter IF (LF, CF) and the main traction converter (MTC) feeding the traction motor (TM).The IF is generally a supply source for the whole electrical equipment of light traction vehicle [4], [5] and its voltage level varies widely according to catenary line.The major electrical device (from the rated power point of view) is MTC plus TM.The auxiliary drives are the secondary electrical branch with lower power.It is nevertheless of great importance for the vehicle's safety.The input part of the auxiliary drives is the input voltage stabilizer (IVS) with LC filter (LDC, CDC) as a source for the following dc/dc isolated converter (IC).This block presents a simple topology providing a galvanic isolation between the catenary and auxiliary drives' potentials and, importantly, it protects the passengers inside the vehicle.The IC consists of input single-phase inverter (e.g.full or half bridge transistor topology), a high frequency transformer (HFT) [6]- [10] and an output rectifier (diode or the active one).The IVS has a significant impact on the design of LDC, CDC filter (values, size and price).A prospective design concept of input voltage stabilizer is the main contribution of this paper.

II. AUXILIARY DRIVES CONVERTER TOPOLOGY
In general, the auxiliary drive topology can be divided into two groups due to connection to input filter IF: 1.The isolated DC/DC converter IC is connected to IF through the input voltage stabilizer IVS.The first group uses the IVS to stabilise the input catenary voltage (may vary 400 VDC -950 VDC) to define the voltage level (lower or higher than input range) and to supply IC.Selected basic topologies are shown in Fig. 2 and Fig. 3.
The second group doesn't use IVS to supply IC and the input part of IC is directly connected to catenary voltage.Selected basic topologies are shown in Fig. 4 and Fig. 5.The block diagram in Fig. 2 describes the standard topology of auxiliary drives.The input voltage stabilizer is designed for connection to the dc catenary voltage range (400 VDC -950 VDC) and therefore the 1700 V device is used.The BUCK converter [11] mode is usually used to stabilise input voltage to e.g.380 VDC (can also be BOOST converter [11] mode to stabilise to e.g.1200 VDC).The main drawback is using a 1700 V semiconductor device which causes several demerits such as lower switching frequencies, higher switching losses, a higher price, etc.
As well as the buck converter mode, it is also possible to use the BOOST converter mode, e.g. to stabilise the input catenary voltage to 1200 VDC.However, because of the properties of the 1700 V semiconductor device it is not commonly used.Figure 3 presents the block diagram of the auxiliary drives' topology with the IVS as a serial connection of two input BUCK/BOOST converters.The serial connection enables the use of the 1200 V semiconductor devices, which bring several merits such as higher switching frequencies, lower switching losses, a lower price etc.However, as a drawback we have to mention the higher number of semiconductor devices.In comparison with the topology in Fig. 2, the 1200 V semiconductor devices allow higher switching frequencies which enable significant elimination of size and value of passive components LCD and CDC.
The second group presents a topology where the IC is directly connected to IF (catenary voltage) without IVS.In this case we must pay the utmost attention to the voltage dimension of the input part of IC and we have to use 1700 V devices or a serial connection of 1200 V devices.The current standard topology uses a switching frequency of around tens of kHz of HFT, and this demand excludes 1700 V devices.
A serial connection of 1200 V devices or converter sections enable higher switching frequencies as well, however due to an input voltage range of 400 VDC-950 VDC and HFT ratio, it is necessary to consider the output rectifier dimension (in some cases the 1700 V devices are necessary).In Fig. 4 the input part the IC consists of two serial single phase inverters which are connected to two separate HFTs and two rectifiers on the output side.The secondary rectifiers can be connected in serial or parallel combination (dashed lines in Fig. 4).Each variant presents some merits and demerits: 1) serial connection (+ 1200 V devices,voltage balancing), 2) parallel connection (+ easy voltage control, -1700 V rectifier devices).
Similar topology is shown in Fig. 5 where two serial single-phase inverters feed one common HFT with dual input windings and a single output winding.This topology employs the effect of common magnetic flux of HFT, which naturally balances input filter capacitors CDC1 and CDC2.Moreover, a single HFT output ensures appropriate voltage range and enables using 1200 V devices in the output rectifier.

III. THE DEVELOPMENT OF A NEW CONVERTER CONCEPT
OF INPUT VOLTAGE STABILIZER Following our industrial partner's demand for the development of a new generation of electric equipment for light traction vehicles, the converter concept of auxiliary drives was modified.The auxiliary drive converter is part of the traction vehicle's electric equipment.In present days there is a strong emphasis on placing all the electrical equipment on the top of the vehicle.Therefore the size and weight constraints become highly significant; furthering high efficiency, low price, reliability and life-time.Due to the typical industrial use in mass transport vehicles reliability and life-time should be the most important targets.However the price is also important for manufacturer in the competitive environment.
The existing topology of auxiliary drive converter is based on the scheme in Fig. 2. As the main problem we can pinpoint the IVS based on 1700 V devices (single BUCK converter operating at 8 kHz) and IC structure using HFT at 50 kHz.The new converter concept of auxiliary drives is based on the scheme in Fig. 3 with emphasis on size, weight and price reduction (IVS operates at 30 kHz, IC using the HFT at 100 kHz, secondary rectifier only in diode version -Fig.6).This paper is focused on the new concept of input voltage stabilizer (IVS), therefore we will discuss only IVS in following text.The new concept of IC is not discussed in this paper.Input converter IVS (Fig. 6) based on serial combination of buck converters enables using 1200 V devices in discrete packages and under hard switching conditions (with regard to input voltage range we do not use soft switching conditions [3], [12], [13]).The IVS converter is supposed to stabilise input catenary voltage to e.g.380 VDC as a DC voltage level for the rest of the auxiliary drives converter structure.
new concept of IVS (Fig. 6) is aiming to achieve size, weight and price reduction in comparison with the existing IVS concept (Fig. 2).The new concept of IVS is based on discrete TO247 devices (lower price) with an air cooling system and it operates at a 30 kHz switching frequency (reduces passive LDC and CDC).
The equation (1) describes the dependency of IVS current ripple on the circuit parameters.It is evident that the appropriate value of IVS current ripple corresponds to switching frequency f and inductance LDC.Therefore for the identical current ripple and higher switching frequency we can use smaller value of inductance LDC.Switching frequency increase from 8 kHz to 30 kHz allows inductance LDC significant reduction from 1,2 mH to 0,3 mH (Table I and Table II) while keeping the same current ripple.This reduction keep similar current stress and thus the voltage ripple on the output capacitor CDC under the same operating conditions where   Comparing Table I and Table II we can conclude that the new IVS concept reduces the price by 13 % (915 $ of existing concept versus 805 $ of new concept), the size by 7 % (9 dm 3 of existing concept versus 8.4 dm 3 of new concept) and finally the weight by 15 % (16.5 kg of existing concept versus 14.1 kg of new concept).
The price reduction of 13 % of the new concept is caused by cheaper discrete devices (including two drivers) and cheaper inductance LDC.The size is very similar (7 % reduction in size) and the decrease is mainly achieved by a smaller inductance LDC (the switching frequency is 4times higher).Finally, the weight is reduced by 15 % due to discrete devices and lighter inductance LDC.

IV. HARDWARE PROTOTYPE
Table III summarizes the basic application requirement for the designed IVS.There is a strong demand for the switching frequency to be well above the audible range.That suggests dominant switching loss related to the diode reverse recovery as well.The antiparallel combination of a SiC Schottky diode (the reason for using SiC instead of Si is described in [14]) IDW20S120 and high speed diode-less IGBT transistors IGW40N120H3 was chosen to overcome this drawback.
Another major concern was the generally poor thermal performance of the TO-247 package of these price effective components.With respect to the desired power output there were three transistors parallelly employed as a single switching cell in the converter.
As already mentioned, the selected topology (Fig. 7) consists of two series buck converters.The laboratory prototype was designed so that it could exhibit additional functionality such as bidirectional power flow or boost mode.That's why S2 and S4 are indicated in Fig. 7 as an active switch even though only SiC diodes are used in reality in the described buck operation (furthermore, S1 and S3 will be the only IGBTs in the buck operation -therefore in Table II   The parallel combination of IGBTs and SiC diodes places demands on careful design of the power circuit as it may produce disruptive parasitic oscillations.In the laboratory prototype the single section was implemented as a three layer PCB with great emphasize on the sandwiches structure of power planes and matching gate circuits. The 3D model of a single buck converter (IVS section) is shown on Fig. 8. and Fig. 9 depicts the hardware setup.The control of the converter has to guarantee both correct output voltage value and even distribution of voltage levels imposed on both serially connected sections (UC1 and UC2).The control scheme proposed for the converter is based on a well-known voltage control with an inner current loop formed by two cascaded PI type regulators.This regulator cascade, directly controlling one of the sections, is extended with a third PI type regulator.It inputs the converter section voltage difference and its output represents a difference in modulation signal for the sections.Once summed with the modulation signal provided by the cascade, it controls the second section.The variable length of the second section's PWM pulses with respect to the first one provides the voltage balancing capability while assuring the safe operation of 1200 V devices under high catenary voltage levels.

V. MEASUREMENT RESULTS
The IVS laboratory prototype performance was verified by a series of experiments in steady and transient states.The ability to properly balance the section voltages under various transient conditions was closely examined.In to forcibly create severely unbalanced conditions one section was additionally loaded.
Steady state operations are depicted in Fig. 10 upon the 600 V input voltage.Converter start-up waveforms are presented in Fig. 11 (with forced imbalance -the voltage imbalance is made by external resistor) and Fig. 12 (without forced imbalance).The waveforms confirm proper function of balancing control algorithm of serial IVS converters.No adverse conditions were found during other transient transients.These include abrupt dip of input voltage (Fig. 13) and load changes (Fig. 14).Attention was also paid to the efficiency measurement as the losses may limit practical application due to unacceptable temperature rise of discrete semiconductor devices.Figure 15 illustrates the efficiency curve for the nominal voltage Uin = 750 VDC.An efficiency of over 97 % is kept within the output power range of 2 kW up to approximately 20 kW.Its main characteristics involve high switching frequency, good efficiency and reasonable cost due to the use of the latest generation 1200 V discrete semiconductor components.
The converter properties were experimentally verified on a full scale laboratory prototype.The results proved that employing the latest generation of semiconductor devices in a cost effective discrete package allows the design of an IVS converter with an output power of 22 kW that is capable of reliable operation within the whole range of catenary voltage fluctuation 400 VDC -950 VDC.Achievable switching frequencies of up to 30 kHz likewise promise better passive component optimization in comparison with concepts with 1700 V devices.
Since this proposal is topologically based on a serial combination of buck converters, even voltage distribution among each section is a key functionality.The presented experimental verification under a steady state, and mainly under various transients, proved that the converter is capable of very good performance.
ELEKTRONIKA IR ELEKTROTECHNIKA, ISSN 1392-1215, VOL.21, 6,2015 The overall efficiency of the laboratory prototype which varies between 97 % and 98 % under almost all input voltage and load conditions promises feasible design for industrial application.
Comparing the existing IVS concept (1,7 kV IGBT + 8 kHz) and new IVS concept (1,2 kV IGBT + 30 kHz) we can conclude that the new IVS concept reduces the price by of 13 %, the size by 7 % and finally the weight by 15 %.

Fig. 1 a
block diagram describes one of the commonly used topologies of the light rail vehicles' electrical Manuscript received January 8, 2015; accepted April 8, 2015.This research has been supported by the European Regional Development Fund and Ministry of Education, Youth and Sports of the Czech Republic under project No. CZ.1.05/2.1.00/03.0094:Regional Innovation Centre for Electrical Engineering (RICE) and project No. SGS-2015-038.

Fig. 1 .
Fig. 1.Design concept of an auxiliary power supply.

Fig. 11 .
Fig. 11.Converter start-up with forcibly unbalanced sections (Uin = 600 VDC, Pout = 10 kW) Ch1 -Uc1 100 V/div, Ch2 -Uc2 100 V/div, Ch4 -Id 10 A/div, time base 20 ms/div.There is a minor imbalance shown on the latter picture.It is caused by asymmetries of both sections involving C1 and C2 parameters, tiny gate pulse differences and other parasitic influences.It took approximately 80 ms until the regulator fully compensated the effect.

Fig. 16 .
Fig. 16.Overall converter efficiency for various Uin, P = 10 kW.The influence of the input voltage on the efficiency is documented in Fig.16, which also validates the proper function of the converter over the whole input voltage range.It confirms the domination of switching losses over conductive losses as the value decreases with input voltage.
The size, weight and price reductions are approximately summarized in following Table I and Table II.In the new concept of IVS we are considering a serial connection of 2 BUCK converters and each active switch as a parallel combination of 3 IGBTs for accurate current density (total number of 6 IGBTs and 6 SiC diodes, both in discrete TO247 package).

TABLE I .
EXISTING IVS CONCEPT.

TABLE III .
BASIC IVS PARAMETERS.
there are 6 pcs of IGBTs and SiC diodes.The component values are summarized inTABLE IV.