Dynamic Bias-Temperature Instability Testing in SiC MOSFETs

. For power converter development in mission critical applications, the attractive performances of SiC power MOSFETs are shadowed by reliability concerns, particularly those induced by the defects at the gate dielectric. Charge trapping at the oxide-semiconductor interface can lead to threshold voltage drift, degrading the power converter efficiency and lifetime. The scope of this contribution is to show a testing methodology under development to understand SiC power MOSFET threshold voltage stability under dynamic and accelerated operating conditions. The presented testing methodology relies on switching the device under test at high-voltage and current, simultaneously applying a gate stress and extracting threshold voltage from switching transients. The paper outlines the setup description, its operating modes and intended design of experiment to assess SiC MOSFET threshold voltage stability.


Introduction
Silicon carbide (SiC) MOSFET, has superior properties than Si power modules, thanks to lower drift region resistances at the same breakdown electric field, making ideal for increasing energy efficiency in medium and high voltage applications [1].Device aging and properties drift from its data sheet specifications would reduce the system efficiency and require additional thermal designs to address increased heat dissipation, compromising the expected benefits of SiC power modules.A mitigation approach is the determination of SiC MOSFETs operating parameters stability under different mission profiles.In the case of Si-based power devices exists and established reliability assessment standards.For SiC devices, though most test methods could be inherited from the Si standards, some SiC-specific reliability issues require new test methods to be developed [2].The most prominent reliability issue of SiC MOSFET originates from its gate oxide.Though it is possible to form native SiO2 on the SiC surface via thermal oxidation, the oxide quality and especially its interface is not comparable with the native oxide on Si.Inhomogeneous oxide on SiC is a cause of early gate oxide breakdown [3] which requires proper screening of devices to reduce failure rate.Also, the SiC/SiO2 interface has larger defect density than the Si/SiO2 interface [4], [5].Points defects inside the oxide, which are near the interface can act as charge traps [6].These defects at or near the interface interact with the MOSFET channel under gate bias and shift the threshold voltage (Vth) by changing the amount of interface charge.The Vth shift of transistors under gate bias and temperature stress is terminated as bias-temperature instability (BTI).Usually, for n-channel MOSFETs, the positive drift of Vth under positive gate bias is referred as PBTI, while the negative shift under negative gate bias is called NBTI.Both PBTI and NBTI have negative effect on the power conversion system if not well handled.At constant driving voltage, the positive shift of Vth leads to less overdrive voltage and thus increases channel resistance.The increase of channel resistance because of PBTI is especially an issue for SiC MOSFETs because channel resistance composes about 50% of the onstate resistance (RON) [3].The negative shift of Vth makes the device more susceptible to parasitic turn-on and it also increases the off-state leakage current.Thus, the BTI connected effects have a negative impact on reliability and energy efficiency of power electronic systems; therefore, it is vital to understand the Vth drift behavior of SiC MOSFETs by proper measurements and modeling.Even if the physics of BTI is relatively well-known in SiC semiconductors [7] [8] [9] its magnitude and evolution during a semiconductor power module lifetime under specific mission profile is yet to be fully understood.Multiple operating parameters are expected to affect BTI.The interaction between free charges and defects at the semiconductor-insulator interface is SiC can also produce new degradation mode, such as the recently discussed Gate Switching Instability (GSI) [10], [11], [12].GSI fundamentally differs from BTI due to its dependence to the total number of switching events and weak temperature dependence.There are multiple degradation pathways that could impair SiC reliability, needing to be fully addressed for a successful adopt of this promising technology for power electronics.Those findings motivated the work here presented to identify a most suitable testing methodology to explore SiC gate reliability and threshold voltage stability under simulated application conditions.

Test Setup Description
To address the reliability concerns on SiC power MOSFETs a test methodology that accelerate application conditions has been developed.This test allows dynamic stress to the gate and on-the-fly threshold voltage extraction from the recorded transfer characteristic.Such characterization method belongs to the category of a continuous Stress & Measure approach.To include operational stresses high-VDS, -ID, and variable temperature must also be applied.With these operational conditions in mind, it was decided to base the test setup to half-bridge buck-boost convert design commonly used in evaluation board for double pulse testing.As concept demonstrator the setup is based on a commercially available half-bridge evaluation circuit with inductive load.The hardware selected is the KIT-CRD-3DD12P Buck Boost Evaluation Board by Wolfspeed.For high current tests, the on-board 650 µH magnetic-core inductor, which saturates at 8A, is replaced with an air-core coil of 500 µH rated for 150A DC.For easy exchange of devices, on the leads for the TO-247 MOSFET was soldered a high-temperature socket.
With the selected testing hardware, two operation modes have been developed: high-current switching based on double pulse mode, where the traditional double pulse test is repeated (up to 200 Hz repetition rate), and high-frequency continuous current mode, where a converter-like switching condition is emulated.Details of the setup are shown in Fig. 1.For double pulse control an arbitrary function generator is used for gate control.For continuous current mode, gate signals are sent from the microcontroller unit (MCU) LAUNCHXL-F280049C by Texas Instrument.The material selected for the setup construction are chosen to be low cost and readily available, to allow its reproduction and technical accessibility.The two modes are designed to address different questions on the assessment of SiC MOSFETs reliability.The double pulse mode allows to independently control electrical loads (VDS and ID) from device temperature thanks to the limited power dissipation in the device.The control of double pulse profile can also allow to discriminate the fast and slow defects trapping mechanism responsible for BTI.Continuous current mode enables to monitor the impact of large number of switching events and long-time stress by operating at frequencies above 5 kHz, target up to 500 kHz.The large number of switching events are required to observe GSI in the threshold voltage drift, which can be observed at number of cycles above 10 10 .
[12] Extraction of Vth from switching transients is sensitive to the processing method, which might cause discrepancies in the value extraction.Estimation method used for life monitoring of Vth drifts during long term testing is the Vg value at a target Id, commonly 1 A. This method while easy to integrate in the data collection application offers limited precision.Post-processing Vth calculation is based on transfer characteristic and determine the Vth at 0.01 A. One model is called piecewise polynomial (pwp) model, which assumes constant current below a threshold voltage level and Solid State Phenomena Vol.361 polynomial current dependence on the voltage overdrive if the voltage exceeds the threshold.The pwp model could be represented as: where D represents the degree of the polynomial.The model parameters include the bias b, and the polynomial coefficients ai.A pwp model with degree of 2 (pwp-2) is used to fit the transfer characteristics because of the square-law behavior of the MOSFETs drain current during turning ON in saturation regime.This fitting method is used for the Vth extraction in the results section.
To measure threshold instability under any operation temperature a heating element attached on the lower switch power MOSFET.With the controllable heating source is possible to obtain the temperature dependence of threshold voltage, as show in Fig 2 A. For assembly simplicity is used a TO247 packaged resistor, Fig 2 B, with a substrate used for electrical isolation.Infrared imaging, Fig 2 C, was used to verify the homogeneity of the heat distribution, while a Pt-100 thermometer attached to the test device is used during data acquisition.Alternative test design is to maintain the device under a constant high-temperature and continuously monitor the threshold voltage to observe its instability as function of number of cycles.With the selected evaluation board only VDC, ID, device temperature and switching frequency are controllable stress parameters.The control over gate voltage levels, and gate resistance change are the scope for the next test iteration, requiring the chose of different evaluation board.

Results and Discussion
We initiate the discussion comparing the difference in BTI measurement for SiC MOSFET under DC and dynamic conditions.The static transfer characteristics of devices are measured with a probe station with source measure units (SMU).The gate voltage is swept, as the drain is biased at 20 V. Multiple gate sweeps are taken consecutively between, changing gate voltage from -5V to +15V.Transfer characteristics measured sequentially on the same device are displayed in Fig. 3 A On the contrary the use of AC tests performed by the described dynamic tester results in reproducible transfer curves, show in Fig. 3 B, allowing to focus on long term BTI due to defects formation and ageing, fundamentally addressing the reliability concerns in power converters application.

Fig. 1 .
Fig. 1.Design and operation of dynamic BTI test setup.A, B) Single line diagram of the test circuit in its two operating modes: double pulse and continuous current.C, D) Operational curves as a function of time for current and voltage.Id_L in red, is the current in the lower switch DUT (Device Under Test), iL in blue, is the current in the inductor.Vgs_L is the gate voltage of the lower switch (DUT).E) Double pulse operation heating time series for upper (dark color) and lower (lighter color) switch under different pulse repetition rates.Operating voltage and current for all conditions are 800V and 50A.For the maximum rate of 100 pulses per second the device heating is limited to 3 °C.F) Continuous current devices heating as function of operating voltage and current, switching frequency fixed at 5 kHz.The repetition rage of a double pulse test is limited by the need to let the inductor current (IL) reach zero before a new charging cycle can start.With the designed test circuit and double pulse optimization a repetition rate of 200 Hz can be achieved.Device power dissipation is significantly different between double pulse and continuous current mode as shown in Fig 1 E, F. my control of double pulse switching and testing circuit design is possible to allow the independent control of the device electrical stress for its temperature.It can be seen in Fig 1.E how device temperature increases by less than 3 °C when tested at 800V and 50A pulses with a repetition rate of 100 Hz.Extraction of Vth from switching transients is sensitive to the processing method, which might cause discrepancies in the value extraction.Estimation method used for life monitoring of Vth drifts during long term testing is the Vg value at a target Id, commonly 1 A. This method while easy to integrate in the data collection application offers limited precision.Post-processing Vth calculation is based on transfer characteristic and determine the Vth at 0.01 A. One model is called piecewise polynomial (pwp) model, which assumes constant current below a threshold voltage level and

Fig. 2 .
Fig. 2. Dynamic transfer curve as function of temperature and resistive heating setup A) Consecutive transfer curves between 1 A and 5 A recorded in series at different device temperatures.B) Image of the setup joining the TO247 packaged MOSFET with a resistor.A power module substate for TO247 is used to provide additional insulation and thermal contact.C) Infrared image of the temperature benchmark experiment.
. It is evident a large hysteresis in the transfer curves.This result in a large Vth variation and during DC 62 Solid-State Power Devices: Operational Reliability and Parameters' Stability testing, due to its sensitivity to sweeping speed and interval.For the data shown, 5 gate voltage sweeps, the last measured Vth is 3.02 V with a ΔVth of 0.25 V.

Fig. 3 .
Fig. 3. Transfer characteristics A) under DC test.Consecutive gate sweeps between -5V and +15V are shown in the plot, market by their sequential acquisition number.B) AC test in the setup described in this work.The demonstration results in Fig 2.A show the temperature sensitivity of the transfer curve.Stability as function of number of cycles is shown in Fig. 4.A, beside the reproducible Vth decreases with temperature, limited degradation is observed as function of cycles up to 10 5 switching events only for the highest tested packaging temperature of 149 °C.Pulse condition is 800V, 50A.Data was also collected with Continuous Mode Test on commercial SiC MOSFETs as shown in Fig. 4.B.Switching conditions are 800V, 10A, 5 kHz.At the operational frequency 17 M switching events can be achieved within 1 h.The absolute value of the threshold voltage in Fig.4.A is sensitive to the bias that comes with the fitting model used, despite discrepancies with datasheet value, variation during ageing test is made evident, matching the intended scope of the experiment to estimate the threshold voltage stability over time ΔVth.In Fig.4.B can be observed a firth deviation of threshold voltage as expected from literature data[12].

Fig. 4 .
Fig. 4. Gate voltage threshold stability A) Double pulse switching at different temperatures B) Threshold voltage drift and device temperature during continuous current switching.