Improving the Polishing Speed and Surface Quality of 4H-SiC Wafers with an MnO2- Based Slurry

We carried out chemical mechanical polishing (CMP) on commercially available 6 inch SiC wafers (epi-ready products) with slurries containing different abrasive types and evaluated the latent scratch density from the mapping measurement of the wafers using mirror projection electron microscope (MPJ). Comparing to the wafer before polishing, the latent scratch density decreased on the wafer polished with MnO2+KMnO4, while that increased by polishing with Al2O3+KMnO4. The two-step polishing using first Al2O3+KMnO4 and then SiO2+H2O2 can reduce the latent scratch density to the same level as that with MnO2+KMnO4, but long polishing time is required because of the low polishing rate in the process with SiO2+H2O2. We investigated the reason why MnO2 slurry can suppress the occurrence of latent scratches by a polishing test on a wafer with an SiO2 film on its (0001)Si surface. The results suggest the oxidation of the SiC surface is rate-determining step for polishing with MnO2+KMnO4. It was also found that wafers without an SiO2 film could not be polished with only MnO2 abrasives. Thus the mechanical contribution to polishing by MnO2 abrasives in KMnO4-based slurry is smaller than the chemical contribution, which can suppress the occurrence of latent scratches. KMnO4-based slurry containing MnO2 abrasives performs the CMP process with low latent scratch density in a time shorter than that containing Al2O3 or SiO2 abrasives.


Introduction
Silicon carbide (SiC) is expected to be a next-generation material for power devices demanding reduced energy consumption and device miniaturization, and so on. [1]. However, since SiC has a high hardness and is chemically and thermally stable, wafer processing takes a long time. In particular, the finishing process chemical mechanical polishing (CMP) requires a high surface accuracy, low surface, scratch-free, a low latent scratch density as finished surface conditions, which is difficult to achieve with high speed polishing. In fact, linear latent scratches and dent-like latent scratches are generally observed in commercially available post-CMP wafers (epi-ready wafers) using Mirror Projection Electron Microscopy (MPJ) [2]. These latent scratches induce step bunching and epitaxial defect generation after epitaxial growth [3,4], which are also believed to impact device performance [5]. In this study, we focused on MnO2 abrasives, which have a low hardness among abrasives, and investigated a slurry for CMP that can be used to achieve a low latent scratch density in a short period of time.

Experimental
We used three commercially available n-type 4H SiC(0001) bulk wafers with an offcut angle of 4 deg (6 inch epi-ready products) (A, B, C). Two of the wafers' (A and B) Si face (0001)  polishing conditions. The wafer evaluation was performed in the following two parts: First, a scratch mapping measurement of the entire wafer was done using a differential interference microscope (Lasertec Co. SICA6X). Next, latent scratch mapping measurements of the entire wafer was conducted using MPJ (Hitachi High-Tech Co. Mirror Electron Inspection System Mirelis VM1000). Mapping measurement was conducted by arranging a 5 mm × 5 mm chip in a region excluding the outer 5-mm periphery of the wafer and setting 64 imaging points with a field of view of 80 µm × 80 µm in each chip. MPJ evaluation involved comparing each wafer before and after polishing and investigating the effect of polishing. Table 1. Polishing Conditions. Table 2 shows the results of scratch mapping measurements of the polished wafers. No scratches were detected on any of the wafers. Upon performing the latent scratch mapping measurement of the entire wafer using MPJ, the latent scratch density of the polished wafer A was observed to be lower than that before polishing ( Fig. 1(a)), whereas the same of the polished wafer B was higher than that before polishing ( Fig. 1(b)). Furthermore, comparisons of the latent scratch images between wafers A and B showed that the contrast of wafer A was relatively low, suggesting little damage under the wafer surface ( Fig. 2(a)), whereas thick dent-like latent scratches were observed in wafer B, which could impact the epitaxial film such as step bunching and formation of stacking faults [4] (Fig. 2(b)). Wafer C had the same latent scratch density as wafer A ( Fig. 1(b)), and the latent scratch contrast was lower as well ( Fig. 2(c)). However, since the polishing speed with SiO2+H2O2 is slow, the polishing process takes longer to reach the same level of latent scratch density as that with MnO2+KMnO4 (Table 2). These results show that the KMnO4-based slurry containing MnO2 abrasives results in a low latent scratch density in a shorter time than when using Al2O3 or SiO2 abrasives.

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Semiconductor Wafer Fabrication, Coatings and Tribology Table 2. Test content / results (Zygo field of view: 0.14 mm x 0.11 mm). We also studied the polishing mechanism to investigate the reason behind low latent scratches when polishing with MnO2 abrasives. First, a SiC wafer was heated at 1,000 °C for 20 hours in atmosphere to form an SiO2 film of approximately 40 nm on its Si face (0001). Next, the wafer was repeatedly polished five times with MnO2+KMnO4 for one minute. Fig. 3(a) shows the variation of polishing rate with polishing time. Fig. 3(b) shows the Fourier transform infrared attenuated total reflection (FTIR-ATR) spectrum of the wafer before polishing and after every minute during polishing. FTIR-ATR measures the total internal reflection of the irradiated infrared light penetrating the sample, which is then used to obtain the absorption spectrum of the surface layer of the sample. Referring to Fig. 3(b), the peaks near 1,070 nm and 1,220 nm corresponding to the wafer before polishing are the absorption peaks related to the transverse optical (TO) mode and the longitudinal optical (LO) mode respectively due to the asymmetric stretching vibration of Si-O-Si of SiO2 [6]. In the TO and LO modes, adjacent atoms of Si-O-Si vibrate in opposite phases along the perpendicular and parallel directions, respectively, with respect to the phonon propagation direction. The polishing rate for the first one minute, when the TO and LO peaks were observed was approximately 34 nm/min, which was high when compared to the polishing rate for a SiC wafer without an SiO2 film (red dotted line). After that polishing, since the SiO2 film was scraped off by polishing, and its thickness was not sufficient for detection, TO and LO peaks disappeared, and then the polishing rate was similar to that of a normal wafer (two minutes after start). Based on these results, (1) oxidation of the SiC surface by KMnO4 and (2) removal of the SiO2 film by MnO2 abrasives are believed to be the processes comprising the polishing mechanism of MnO2+KMnO4. Moreover, it is believed that the oxidation reaction (1) (Eqs. (1) and (2)) is the rate-determining factor for this polishing method.
Next, the above study was repeated with MnO2 abrasives (Fig. 4). Here too, in a manner similar to that with MnO2+KMnO4, (a) the polishing rate was higher and (b) the SiO2-derived TO and LO peaks were present after one minute of polishing, as shown in Fig. 3(a). However, in this case, the polishing rate approached zero after disappearance of the peaks, which implies that polishing was not possible three minutes after the start. These results thus suggest that a SiC wafer without a SiO2 film cannot be polished with only MnO2 abrasives, which may be due to the fact that MnO2 abrasives are softer than Al2O3 abrasives. The above results also suggest that the mechanical contribution of KMnO4-based slurry containing MnO2 abrasives to polishing is smaller than the chemical contribution, which is believed to be advantageous in suppressing the occurrence of latent scratches.

Summary
The present results indicate that polishing SiC wafers with a KMnO4-based slurry containing MnO2 abrasives can result in a low latent scratch density in a shorter period of time than when using Al2O3 or SiO2 abrasives. This means that by using the above slurry, the process time can be shortened, and the wafer yield can be improved, both of which, contribute to reduce the process cost.