Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture

Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture

Paul Kaufmann, Kyrre Glette, Marco Platzner, Jim Torresen
Copyright: © 2012 |Volume: 3 |Issue: 4 |Pages: 15
ISSN: 1947-9220|EISSN: 1947-9239|EISBN13: 9781466610521|DOI: 10.4018/jaras.2012100102
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MLA

Kaufmann, Paul, et al. "Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture." IJARAS vol.3, no.4 2012: pp.17-31. http://doi.org/10.4018/jaras.2012100102

APA

Kaufmann, P., Glette, K., Platzner, M., & Torresen, J. (2012). Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 17-31. http://doi.org/10.4018/jaras.2012100102

Chicago

Kaufmann, Paul, et al. "Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture," International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3, no.4: 17-31. http://doi.org/10.4018/jaras.2012100102

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Abstract

The evolvable hardware (EHW) paradigm facilitates the construction of autonomous systems that can adapt to environmental changes and degradation of the computational resources. Extending the EHW principle to architectural adaptation, the authors study the capability of evolvable hardware classifiers to adapt to intentional run-time fluctuations in the available resources, i.e., chip area, in this work. To that end, the authors leverage the Functional Unit Row (FUR) architecture, a coarse-grained reconfigurable classifier, and apply it to two medical benchmarks, the Pima and Thyroid data sets from the UCI Machine Learning Repository. While quick recovery from architectural changes was already demonstrated for the FUR architecture, the authors also introduce two reconfiguration schemes helping to reduce the magnitude of degradation after architectural reconfiguration.

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