Sorting via chip-firing

We investigate a variant of the chip-firing process on the infinite path graph: rather than treating the chips as indistinguishable, we label them with positive integers. To fire an unstable vertex, i.e. a vertex with more than one chip, we choose any two chips at that vertex and move the lesser-labeled chip to the left and the greater-labeled chip to the right. This labeled version of the chip-firing process exhibits a remarkable confluence property, similar to but subtler than the confluence that prevails for unlabeled chip-firing: when all chips start at the origin and the number of chips is even, the chips always end up in sorted order. Our proof of sorting relies upon an independently interesting lemma concerning unlabeled chip- firing which says that stabilization preserves a natural partial order on configurations. We also discuss some extensions of this sorting phenomenon to other graphs (variants of the infinite path), to other initial configurations, and to other Cartan-Killing types.


Introduction
We introduce a labeled version of the chip-firing process. The chip-firing process is a discrete dynamical system that takes place on a graph. The name "chip-firing" was coined by Björner, Lovasz, and Shor [4], but in fact this process is essentially the same as the abelian sandpile model introduced by Bak, Tang, and Wiesenfeld [2] and further developed by Dhar [10] [11]. (See also the work of Engel [12].) Here "abelian" means that the order in which certain local moves are carried out has no effect on the final state. This property is also often called "confluence" in the context of abstract rewriting systems [14]. 1 Dhar views the abelian sandpile model as a prototype for networks of communicating processors that achieve predictable results despite a lack of global synchronization; this point of view has been developed by Levine and his coauthors [5] [6] [7] [13], who introduced a broad family of such networks, called "abelian networks," to which the abelian sandpile model belongs. For more background on sandpiles, consult the short survey article [15] or the upcoming book [9].
Björner, Lovasz, and Shor were directly inspired by papers of Spencer [18] and Anderson et al. [1] that investigated chip-firing in the special case of the infinite path graph Z (which has vertex set Z with i and j joined by an edge whenever |i − j| = 1). In fact, it is in exactly this special case of the infinite path graph Z that we introduce labeled chip-firing. Here is how the labeled chip-firing process on Z works: we start with n labeled chips (1), (2), . . . , (n) at the origin; at each step we choose any two chips (a) and (b) with a < b that occupy the same vertex i and fire these chips together, moving (a) to vertex i − 1 and (b) to vertex i + 1; we keep carrying out 1 We will often use "confluent" in a slightly non-standard sense, where it might be more correct to say "confluent and terminating." See the proof of Lemma 2 for technical definitions of these properties. firings until no chips can fire. For example, suppose n = 4, so that we start from the following configuration (where we draw Z in the plane as a number line in the usual way, with i − 1 to the left of i): By firing chips (1) and (2) we reach the following configuration: Then by firing (3) and (4)  After firing (1) and (3), and then firing (2) and (4), in two more steps we reach the following configuration: Finally, by firing (2) and (3) we reach the following stable configuration, which has no more possible firings: In this process we made several arbitrary choices of which pairs of chips to fire. As it turns out, no matter what choices we made we would have always reached this same stable configuration where the chips appear in sorted order from left to right. This is a confluence result which says that the divergent paths our process can take must at some later point come back together. It is well known that confluence holds for the unlabeled chip-firing process (on any graph and for any configuration with sufficiently few chips to guarantee that stabilization is possible at all): this is one of the basic results of [4]. But confluence for the labeled chip-firing process is much subtler. Indeed, not all initial configurations are confluent in the labeled chip-firing process. This means in particular that the theory of abelian networks does not automatically apply to our situation. To see that not all initial configurations are confluent, consider the configuration that has three chips at the origin rather than four. We can fire (1) and (2), or fire (1) and (3), or fire (2) and (3); in all three cases, the result is a stable configuration, but the labeled chips end up at different vertices, so confluence does not hold in this case. More generally, if we start with an odd number of labeled chips at the origin, we can make sure that any preselected chip never moves away from the origin, so confluence does not hold. Our main result, proved in Section 2, says that the labeled chip-firing process on Z is confluent, and in particular sorts the chips, as long as the number of chips is even.
In Section 3 we discuss some extensions of this sorting phenomenon to other graphs (variants of the infinite path) and to other initial configurations. We also show how our main result can be related to Type A root systems and briefly discuss extensions of the problem to other types. Section 3 contains some results, but also many conjectures and threads of future research. We use the following notation throughout: R is the set of real numbers, Z is the set of integers, N := {0, 1, 2, . . .} is the set of natural numbers, Z >0 := {1, 2, . . .} is the set of positive integers; for a, b ∈ Z we set [a, b] := {a, a + 1, . . . , b} (which is ∅ if a > b), for n ∈ N we set [n] := [1, n]; and for x ∈ R we use ⌊x⌋ to denote the greatest integer less than or equal to x.
Acknowledgements: We thank Pedro Felzenszwalb, Pavel Galashin, Caroline Klivans, Gregg Musiker, and Peter Winkler for useful comments and discussion. We thank Richard Stanley and the Cambridge Combinatorics and Coffee Club for providing a space to present some initial experimental results related to this research. The first author was supported by NSF grant #1122374. The third author was supported by NSF grant #1001905.

Main result
One of the main ways we will understand this labeled chip-firing process is by relating it to the usual unlabeled chip-firing process. Therefore, we first review unlabeled chipfiring on the graph Z. A configuration of unlabeled chips on Z is some assignment of a finite number of indistinguishable chips to the vertices of Z. All configurations, both labeled and unlabeled, will be on Z in what follows in this section. We use lowercase letters for unlabeled configurations. Formally, we treat an unlabeled configuration c as a function c : Z → N with i c(i) < ∞ and we think of c as having c(i) chips at i. We use supp(c) to denote the support of c, i.e., supp(c) := {i ∈ Z : c(i) ≥ 1}. We write max(c) := max(supp(c)) and min(c) := min(supp(c)). As is customary, we use the convention max(∅) := −∞ and min(∅) := ∞. If c is a configuration and i ∈ Z is some vertex such that c has at least two chips at i, we may perform a chip-firing move at i, which moves one chip at i leftward one vertex and one chip at i rightward one vertex. If the resulting configuration is c ′ then in this case we also say that c ′ is obtained from c by firing at vertex i. We write c → d to mean that d is obtained from c by some sequence of (zero or more) chip-firing moves. We say c is stable if we cannot perform any chip-firing moves on c, that is, if c → d implies that c = d. Of course, the map c → supp(c) is a bijection between stable configurations of n chips and subsets of Z of size n.
We now define some useful statistics of configurations: Proposition 1. Suppose c ′ is obtained from c by firing at vertex j ∈ Z; then: Proof. These are routine to verify.
The following confluence property of the chip-firing process is well-known; for instance, it can be deduced from the main results of [4]. It was also proven in a special case by Anderson et al. [1], but the proof in general is more or less the same as that special case. We include a short proof, based on Newman's lemma [16] It easy to see that F − → is locally confluent. Indeed, suppose d is obtained from c by firing at vertex i and d ′ is obtained by firing at vertex j. If i = j then d = d ′ and so we can take d ′′ := d. On the other hand, if i = j then j remains fireable in d and we can let d ′′ be the result of firing j in d.
Now we prove that F − → is terminating. To show F − → is terminating it suffices to show the following: , for any c there are only finitely many d with c → d. Let c be a configuration of n chips. If n = 0 there is nothing to show, so suppose that n > 1. To see that there cannot be a cycle of firings from c to itself, recall from Proposition 1 that c So any purported cycle at configuration c of length k ≥ 1 would lead to ϕ 2 ∞ (c) = ϕ 2 ∞ (c)+2k, a contradiction. Now let us show that there are only finitely many d with c → d. Recall from Proposition 1 that c → d implies ϕ ∞ (d) = ϕ ∞ (c). This in particular implies that there is some B 1 ∈ N such that min(d) ≤ B 1 and max(d) ≥ −B 1 for any c → d. Also recall from Proposition 1 that c → d implies γ(d) ≤ γ(c). This in particular implies that there is B 2 ∈ N such that max(d) − min(d) ≤ B 2 for all c → d. Altogether, we can conclude that there is some B 3 ∈ N such that max(d) ≤ B 3 and min(d) ≥ −B 3 for all c → d.
Clearly there are only finitely many configurations d of n chips satisfying max(d) ≤ B 3 and min(d) ≥ −B 3 so indeed there can only be finitely many d with c → d.
That F − → is terminating directly implies that for each c there exists some stable d with c → d. Finally, the confluence of F − → implies that this d must be unique.
We use c to denote the stabilization of c, i.e. the unique stable d with c → d guaranteed by Lemma 2. A fact (which follows immediately from Lemma 2) that we will use over and over again is that if c → d then d = c. Let us introduce some notation for specific configurations of unlabeled chips. For two configurations c and d, let us use c + d to denote their sum, i.e., the configuration For n ∈ N and a configuration c, we use the shorthand nc := n terms c + c + · · · c. For i ∈ Z we let δ i denote the configuration that has a single chip at i and no other chips; in other words, δ i is the unique stable configuration with supp(δ i ) = {i}. For i, j ∈ Z, we let δ [i,j] denote the configuration that has one chip at vertex k for all i ≤ k ≤ j and no other chips; in other words We now describe some formulas for specific stabilizations that will be needed later.
Applying the inductive hypothesis again gives The unlabeled configuration we are most interested in is nδ 0 . The following description of the stabilization of nδ 0 is also well known, appearing for instance in the original paper of Anderson et al. [1]. For completeness we provide a short proof of this lemma using the previous proposition.
Proof. The proof is by induction on n. The case n = 1 is clear; so suppose n > 1 and the result is known for n − 1. Set c := (n−1)δ 0 . We have nδ 0 = c + δ 0 . If n = 2m is even then by induction [1,m] and so clearly we Not only is it the case that for any configuration c, its stabilization c is unique, but also, all stabilization sequences c → c have the same total number of vertex firings; and what is more, the number of times any given vertex j ∈ Z fires in a stabilization sequence c → c is also determined. Indeed, it is easy to see from Proposition 1 that the total number of vertex firings in a stabilization sequence c → c is 1 , and the number of times j ∈ Z fires is ϕ j+1 (c) − ϕ j+1 ( c). Again, for the infinite path, these facts were more or less established in [1]. These facts continue to hold for chipfiring on arbitrary graphs, as was first established in [4]. More generally, that the "run time" and "local run times" do not depend on the particular way the system evolves is true for all abelian networks; see [5, §2]. In the following proposition we record these run times and local run times for the initial configuration nδ 0 we are interested in. (We will not use these run times or local run times in what follows, except to point out that the labeled chip-firing sorting algorithm takes cubic time and is thus highly infeasible.) Proposition 5. Let n ≥ 1 and set m := ⌊n/2⌋. Then in any stabilization sequence nδ 0 → nδ 0 , the total number of vertex firings is m(m + 1)(2m + 1)/6 and the number of times that vertex j ∈ Z fires is (m + 1 − |j|)(m − |j|)/2 if |j| < m and 0 otherwise.
Proof. As just mentioned, it follows from Proposition 1 that the total number of vertex firings in a stabilization sequence c → c is 1 , and the number of times that j ∈ Z fires is ϕ j+1 (c) − ϕ j+1 ( c). Thus the proposition follows from the description of nδ 0 in Lemma 4. Now let us describe labeled chip-firing. A labeled configuration of chips on Z is some assignment of a finite number of distinguishable chips, labeled by positive integers, to the vertices of Z. We use uppercase calligraphic script for labeled configurations and use (i) to denote the chip labeled i. Formally, we treat a labeled configuration C as a function C : X → Z for some X ⊆ Z >0 , and we think of chip (i) as being at the vertex C(i) in C for all i ∈ X. Normally we will take X = [n] and thus study labeled configurations of the n chips (1), (2), . . . , (n). If a < b and chips (a) and (b) are at the same vertex in C, we may fire (a) and (b) together in C by moving (a) leftward one vertex and (b) rightward one vertex. (The important point is that chips with lesser labels move leftward.) We write C → D to mean that D is obtained from C by a sequence of labeled chip-firing moves of this form. If C is a labeled configuration we use [C] to denote the underlying unlabeled configuration: thus [C](i) := #C −1 (i) for all i ∈ Z. We say that D is stable if [D] is stable. As mentioned, our strategy in understanding labeled chip-firing will be to relate it to unlabeled chip-firing. To that end, here are some very basic facts relating labeled and unlabeled chip-firing, which we will use without even citing specifically from now on. Proposition 6. • Consequently, for any C there is some stable D with C → D, and we have There need not be a unique stable D with C → D: the previous proposition only determines [D] but not the way that the chips are labeled in D. Nevertheless we are interested in cases where we do have a unique labeled stabilization. In particular, we will consider the labeled analog of nδ 0 , which has chips (1), (2), . . . , (n) at vertex 0 and no other chips; we denote this configuration by ∆ n . In other words, ∆ n (i) := 0 for all i ∈ [n]. Of course, [∆ n ] = nδ 0 . Note, as mentioned in Section 1, that ∆ 3 already does not have a unique stabilization. On the other hand, our main result is that when n is even, ∆ n does have a unique stabilization.
First let us observe that there is a useful global symmetry in this labeled chip-firing process when we start from the configuration ∆ n . If C is a configuration of n labeled chips, define its dual C * as follows: first reflect C horizontally about the origin, then replace chip (i) by chip (n Proof. It is easy to see that the duality operation respects labeled chip-firing moves, meaning that if D is obtained from C by a labeled chip-firing move then D * is obtained from C * by a labeled chip-firing move. The lemma then follows since (∆ n ) * = ∆ n .
Very roughly speaking, to prove confluence of the labeled chip-firing process we study how far we can move chips via chip-firing. The following is obvious but important.
Proof. Each chip-firing move preserves or decreases the minimum occupied vertex, so Applying Proposition 8 to our situation of interest tells us that if ∆ n → C then we have min([C]) ≥ −⌊n/2⌋ and, by Lemma 7, max([C]) ≤ ⌊n/2⌋. This puts some constraint on the movement of chips during the labeled chip-firing process, but is not really so useful because it says nothing about the position of chips with particular labels. We want to strengthen this conclusion about how far chips can move to take into account chip labels. Let us establish some notation for restricting labeled configurations to a subset of chips. For a labeled configuration C with label set X and Y ⊆ Z >0 , we use C \ Y to denote the restriction of C to the chips with labels in X \ Y . For any labeled configuration C and any k ∈ N, we use the shorthand C| ≥k := C \ [k − 1]. We want some way to describe how the largest-labeled chips evolve in the labeled chip-firing process. So let us say that an unlabeled configuration d is rightward-reachable from an unlabeled configuration c, written c R − → d, if d is obtained from c by a sequence of (zero or more) moves of the forms: • perform a chip-firing move; • move one chip rightward one vertex. This notion precisely captures the way the largest-labeled chips evolve under labeled chip-firing. Namely, we have the following.
Proof. Suppose we fire two chips (a) and (b) in C: if a, b < k, that firing does not affect [C| ≥k ]; if k ≤ a, b, that firing corresponds to a firing in [C| ≥k ]; and if a < k ≤ b, then that firing corresponds to moving a chip rightward in [C| ≥k ].
We want a strengthening of Proposition 8 that applies to rightward-reachability.
To that end, we define a partial order on unlabeled configurations of n chips that can informally be thought of as "c ≤ d means d is obtained from c by moving chips rightward"; it is defined formally as follows. If c and d are configurations of n unlabeled chips on Z, we write c ≤ d if and only if i≤j c(i) ≤ i≤j d(i) for all j ∈ Z. Observe that c ≤ d implies that max(c) ≤ max(d) and min(c) ≤ min(d). We write c ⋖ d to mean that d covers c according to this partial order ≤. In other words, c ⋖ d means that d is obtained from c by moving one chip rightward one vertex.
An important property of this partial order is that it is preserved under stabilization, as we establish right now. In fact, something even stronger is true: stabilization preserves the cover relations of this partial order. (Note that ϕ ∞ is a rank function for ≤, where ϕ ∞ (c) := i∈Z i · c(i) is the statistic defined earlier in this section. By Proposition 1, chip-firing moves preserve ϕ ∞ . So in fact stabilization being order-preserving is easily seen to be equivalent to it preserving cover relations.) Proof. That c⋖d means there is some c ′ and i ∈ Z such that c = c ′ +δ i and d = c ′ +δ i+1 . Define a := max{j ≤ i : j / ∈ supp( c ′ )} and b := min{j ≥ i + 1 : j / ∈ supp( c ′ )}. Thus there exists a configuration c ′′ such that In particular, c ′ + δ i ⋖ c ′ +δ i+1 . But c = c ′ + δ i and d = c ′ +δ i+1 , so the claim is proved.
Lemma 10 is the key lemma which allows us to establish confluence of labeled chipfiring. It is also interesting in its own right as a result purely concerning unlabeled chip-firing. We now apply Lemma 10 to give a strengthening of Proposition 8 which applies to rightward-reachability. We are now ready to prove the main theorem, which says that when the number n of chips is even, the labeled chip-firing process on Z necessarily sorts these chips. Recall that, according to Proposition 5, the number of firings in this process is Θ(n 3 ), so this procedure is not being offered as a practical way to sort. Theorem 13. Suppose n := 2m is even and ∆ n → D where D is stable. Then for all 1 ≤ k ≤ m we have that D(k) = −(m + 1) + k and D(m + k) = k.
Proof. Let n = 2m be even and let ∆ n → D with D stable. For all 1 ≤ k ≤ m, the assertion that D(m + k) = k follows from D(m + 1 − k) = −k by Lemma 7. Thus we prove only that D(k) = −(m + 1) + k for all 1 ≤ k ≤ m.
The proof is by induction on k. So let us first address the base case k = 1. Lemma 12 says that D(i) > −m for all 2 ≤ i ≤ n. (Here we use crucially that n = 2m is even.) But on the other hand, we know thanks to Lemma 4 that vertex −m is occupied in D. So in fact it must be occupied by chip (1). Now assume k ≥ 2 and the result holds for all smaller values of k. We will use some internal lemmas in the proof ("internal" because they assume the inductive hypothesis).
Proof. Suppose that D(k) > −(m + 1) + k. And suppose to the contrary that chip (k) did fire together with chip (j) for some 1 ≤ j ≤ k − 1 at some point in the labeled chipfiring process ∆ n → D. Let us concentrate on the last moment when this happened: let C ′ be the step before chip (k) fired with some chip (j) with 1 ≤ j ≤ k − 1 for the last time (and thus define j to be the label of this other chip). Let C be the result of firing (k) and (j) together in C ′ . So ∆ n → C ′ , C is obtained from C ′ by firing (k) and (j) together, and D is obtained from C by a sequence of firings that either do not involve (k), or fire (k) together with a chip with a greater label. It is The upshot of the previous paragraph is that if the lemma is false then we can find a configuration D ′ with ∆ n → D ′ and [−m, −(m + 1) + k − 1] ⊆ supp([D ′ \ {j}]) for some 1 ≤ j ≤ k−1. Let us show that this is impossible. For an unlabeled configuration c and ℓ ∈ Z, recall the statistic ϕ ℓ (c) := i≤ℓ (i − ℓ − 1) · c(i) defined at the beginning of this section. It follows from Proposition 1 that ϕ ℓ weakly decreases with each chip-firing move, and so we always have ϕ ℓ ( c) ≤ ϕ ℓ (c); moreover, it follows from Proposition 1 that if ϕ ℓ (c) = ϕ ℓ ( c) then vertex ℓ + 1 never fires during the stabilization process c → c. Now, we claim that (j) is strictly to the right of vertex −(m + 1) + k − 1 in D ′ : indeed, otherwise ϕ −(m+1)+k−1 ([D ′ ]) < ϕ −(m+1)+k−1 ( nδ 0 ), and of course [D ′ ] = nδ 0 . If chip (j) is strictly to the right of vertex −(m + 1) + k − 1 in D ′ , as it must be, then ϕ −(m+1)+k−1 ([D ′ ]) = ϕ −(m+1)+k−1 ( nδ 0 ). So if we continue to stabilize, that is, if we let D ′′ be such that D ′ → D ′′ and D ′′ is stable, then the vertex −(m + 1) + k never fires during the labeled chip-firing process D ′ → D ′′ . Consequently, chip (j) always remains strictly to the right of −(m + 1) + k − 1 during the process D ′ → D ′′ . So chip (j) is strictly to the right of −(m + 1) + k − 1 in the stable configuration D ′′ . But this contradicts our inductive hypothesis since 1 ≤ j ≤ k − 1. Proof. Note that in the labeled chip-firing process, chips (k) and (k − 1) interact in the same way with all chips (j) for j = k, k − 1. So if chip (k) and chip (k − 1) never fire together in the labeled chip-firing process ∆ n → D, we can swap the roles of (k) and (k − 1) to reach a stable configuration D ′ where (k) and (k − 1) have swapped places. This contradicts our inductive hypothesis which says that there is only one vertex (k − 1) could end up at in a stable configuration.
Remark 16. Caroline Klivans pointed out the following to us. For C a labeled configuration and k ∈ Z >0 , define Suppose C ′ is obtained from C by firing chips (i) and (j) with i < j; then it is easy to see that Thus for any k ∈ Z >0 , in any labeled stabilization process C → D the number of times that a chip (i) with i ≤ k fired with a chip (j) where k < j is ψ k (C) − ψ k (D). So as a consequence of Theorem 13 we arrive at the following global invariant of the labeled chip-firing process with initial configuration ∆ n for n even, which can be compared to Proposition 5. In fact, Corollary 17 is easily seen to be equivalent to Theorem 13. But we know no simpler reason why Corollary 17 should be true, beyond the proof of Theorem 13 we have given above.

Other graphs.
An obvious question is if the labeled chip-firing process can be extended to other graphs beyond Z. Ideally any such extension would have unique labeled stabilizations for many of its initial configurations. While we are far from being able to propose an interesting extension of labeled chip-firing to arbitrary graphs, we have found that several minor variants of the infinite path (apparently) continue to exhibit confluence of certain initial configurations.
Let G be a directed graph with vertex set V . We allow parallel edges and loops. There is a well-known notion of unlabeled chip-firing on G (see e.g. [9, §6]). Briefly, we study the evolution of a configuration c of n indistinguishable chips on V under the following chip-firing moves: we may fire a vertex v ∈ V as long as it has as many chips as its outdegree outdeg G (v); firing at v transports one chip from v to u along each outgoing edge (v, u) from v. (Transporting a chip along a loop (v, v) keeps that chip at v, but loops do affect the dynamics of the system because they force there to be more chips at a vertex before it can fire.) In this context, we consider an undirected graph to be a directed graph where each undirected edge {u, v} corresponds to two directed edges (u, v) and (v, u); however, we will always treat loops (v, v) as directed loops even on otherwise undirected graphs. In the examples that follow we will always have V = Z or N and we will draw these graphs in the plane as a number line in the usual way. Consequently, we can consider δ [a,b] and δ i to be configurations on G for appropriate values of a, b, i. For clarity we say things like "c is G-stable" to mean that c is stable when considered as a configuration on G. We write c G − → d to mean that d is obtained from c by a series of G-chip-firing moves, and we use c G to denote the G-stabilization of c (which will exist and be unique for all graphs under consideration). Now let us describe one framework for labeled chip-firing on G. A labeled configuration C on G is some assignment of a finite number of distinguishable chips, labeled by positive integers, to V . Suppose that each vertex v ∈ V has been given a total order e 1 < e 2 < . . . < e outdeg G (v) on its outgoing edges. Then a labeled chip-firing move at v consists of choosing outdeg G (v) chips (i 1 ), (i 2 ), . . . , (i outdeg G (v) ) which all occupy v, with i 1 < i 2 < · · · < i outdeg G (v) , and transporting (i 1 ) along e 1 , (i 2 ) along e 2 , et cetera. The graphs we consider here all have the same local structure: at any vertex v ∈ V , there are ℓ v directed edges from v to the vertex immediately to its left, m v directed loops at v, and r v directed edges from v to the vertex immediately to its right; i.e., each v ∈ V looks like the following: The order we give to the outgoing edges at v will always be: all the left edges are less than the loops, which in turn are less than the right edges. Thus, firing at v consists of choosing ℓ v + m v + r v chips occupying v, moving the ℓ v of them with the smallest labels to the left, the r v of them with the largest labels to the right, and keeping the m v "middle" chips at v. We use notation for labeled configruations on G in a predictable way: we write [C] to denote the underlying unlabeled configuration of C; we say C is − → D to mean that D is obtained from C by a series of labeled chip-firing moves on G. Since the origin will belong to V in all graphs we consider, we can still consider ∆ n to be a labeled configuration on G. We are interested in confluence, of course, so let us say that G sorts ∆ n if there is a unique G-stable D with ∆ n G − → D, and for all 1 ≤ i ≤ j ≤ n, we have D(i) ≤ D(j). First let us describe some "one-way infinite" paths for which it is quite easy to see that sorting always occurs.
Proposition 18. Let G be the undirected graph with vertex set N and with a single edge {i, i + 1} for each i ∈ N. Then G sorts ∆ n for any n ≥ 1.
Proof. It is easy to check inductively that nδ 0 G = δ [1,n] . Then we can apply a very simple "reachability" argument. Note that chip (1) can never make it to vertex 2 (or any vertex right of 2) because to do so it would have to fire with a smaller-labeled chip at vertex 1. Similarly, chip (2) can never make it to vertex 3 because it would have to fire with a smaller-labeled chip at vertex 2, and (1) will never be at vertex 2. And thus (3) can never make it to vertex 4, and so on.
Proposition 19. Let G be the directed graph with vertex set N which has a single directed edge (i, i + 1) and a loop (i, i) for each i ∈ N. Then G sorts ∆ n for any n ≥ 1.
Proof. The proof is the same as the proof of Proposition 18: we can check inductively that nδ 0 G = δ [0,n−1] ; but chip (1) can never it make it to vertex 1, so chip (2) can never make it to vertex 2, and so on.
The directed graph appearing in Proposition 19 is noteworthy because unlike the other undirected graphs we have been studying, it takes only Θ(n 2 ) firings to stabilize. Indeed, the labeled chip-firing process on this graph basically caries out "bubble sort," or one of the other well-known Θ(n 2 ) sorting algorithms, depending on the order in which we fire the vertices. To our knowledge, this is the best you can do with labeled chip-firing in terms of run time: we know of no graph that sorts in time Θ(n log n).
Next, we will consider some variants of the two-way infinite path Z, specifically, graphs obtained from Z by adding loops or parallel edges. Here we mostly offer conjectures, except for the following minor modification of Theorem 13.
Theorem 20. Let G be the graph obtained from the infinite path Z by adding ℓ loops at the origin. Then G sorts ∆ n whenever n ≡ ℓ mod 2.
Proof. The proof is basically the same as the proof of Theorem 13 we gave in Section 2. Let us sketch how to modify that proof to accommodate loops at the origin. First of all, one can compute inductively that It is easy to see that the symmetry lemma, Lemma 7, remains true in this context: we have ∆ n G − → C ⇒ ∆ n G − → C * . It is also easy to see that Proposition 9 remains true in this context: we have C for all k ≥ 1. Moreover, the key lemma, Lemma 10, also remains true: we have c ⋖ d ⇒ c G ⋖ d G ; we should modify the proof of Lemma 10 given above by considering a := max{j ≤ i : c(j) ≤ outdeg G (j) − 2} and b := min{j ≥ i + 1 : c(j) ≤ outdeg G (j) − 2} instead. Altogether, this means we the following generalization of Lemma 12: suppose ∆ n G − → C; then, for all 1 ≤ k ≤ n, With this set-up, how do we prove that sorting occurs? Set n := 2m + ℓ and suppose that ∆ n G − → D where D is G-stable. It suffices to prove that D(k) = −(m + 1) + k for all 1 ≤ k ≤ m. This is because the symmetry lemma will then imply D(k) = k −(m+ℓ) for all m + ℓ + 1 ≤ k ≤ 2m + ℓ; and then, since we know what nδ 0 G looks like, we will For S ⊆ Z, let us use Z S to denote the graph obtained from the infinite path Z by adding a single loop at each i ∈ S.
Conjecture 21. Let S ⊆ Z. Suppose n ∈ N is such that: Then Z S sorts ∆ n .
Remark 22. Any two of the following three implies the third: Thus, Conjecture 21 only really applies to S which are "balanced" around the origin. Some special cases of Conjecture 21 are worth pointing out specifically. The case S = ∅ of Conjecture 21 is just Theorem 13, and the case S = {0} follows from Theorem 20. The case S = Z of Conjecture 21 says that Z Z sorts ∆ n as long as n ≡ 3 mod 4.
Remark 23. It is natural to consider also graphs obtained from Z by adding multiple loops at vertices. Indeed, with Theorem 20 above we have already seen that some such graphs sort ∆ n for infinitely many values of n. However, one has to be careful in trying to generalize too much, because, for instance, the graph obtained from Z by adding two loops at every vertex does not sort ∆ n for any n ≥ 5.
For r ≥ 1, we use rZ to denote the graph obtained from Z by replacing each edge by r parallel edges.
In fact, Conjectures 21 and 24 can be simultaneously generalized. Let us use r(Z S ) to denote the graph obtained from Z S by replacing each edge with r parallel edges, including replacing each loop by r loops.
Conjecture 25. Let S ⊆ Z. Suppose n ∈ N is such that: ). Then r(Z S ) sorts ∆ rn for each r ≥ 1.

3.2.
Other configurations. We use the notation C := {D : C → D and D is stable}. Another natural problem is to understand C for more configurations C on the infinite path Z. For example, for n = 1, 3, 5, 7, 9, . . . we have # ∆ n = 1, 3, 12, 54, 232, . . . (a sequence which is unfortunately not in the OEIS [17]). We understand the even case, so let us concentrate on this odd case; thus set n := 2m + 1. Since [D] = [−m, m] for D ∈ ∆ n , we may identify elements of ∆ n with permutations. Completely describing the permutations in ∆ n seems hard, but there are at least a few nontrivial things we can say. First of all, Lemma 12 applies equally when n is odd and puts some restrictions on ∆ n . We can also say the following: for any injective, order-preserving map ι : [n] → [n + 1], if we relabel a configuration D ∈ ∆ n according to ι, add a new chip (j) to the origin where {j} := [n + 1] \ im(ι), and then stabilize the resulting configuration, the chips have to appear in sorted order. Indeed, this is a consequence of our main theorem, Theorem 13, because one possible way to stabilize ∆ n+1 is to ignore chip (j) for as long as possible and instead first stabilize the chips with labels in im(ι). Even these two conditions (Lemma 12 and the "add a chip and stabilize to sort" condition) together fail to completely characterize ∆ n , however, because for instance the permutation 23154 satisfies both of these conditions but does not belong to ∆ 5 . We can at least offer the following attractive conjecture about ∆ n , which has been verified for n ≤ 9 odd.
Conjecture 26. For n = 2m + 1, the maximum number of inversions among all permutation in ∆ n is exactly m.
A different way to understand configurations for which there is not unique labeled stabilization would be probabilistically. There are at least three reasonable ways to carry out labeled chip-firing randomly: (1) at each step choose a chip-firing move uniformly at random among all possible moves; (2) at each step choose an unstable vertex uniformly at random and then choose a pair of chips at that vertex uniformly at random; or (3) choose a stabilization sequence uniformly at random among all (labeled) stabilization sequences. Based on some limited computer simulations, it appears that when m is large, random labeled chip-firing applied to ∆ 2m+1 leads to all chips ending up sorted with probability around .33 under all three protocols. We have no intuition for why this probability should not converge to 0. It is clear that it cannot converge to a limit greater than 1/3, since 2/3 of the time the "last move" fails to put the chips in sorted order. (It is not hard to see that the last move necessarily involves firing a vertex that has three chips on it, and so only one of the three possible labeled firings of these three chips will locally sort them.) Conjecture 27. With respect to any of the three protocols for random labeled chipfiring described above, the probability that ∆ 2m+1 sorts converges to 1/3 as m → ∞.
What Conjecture 27 would mean is that, in the limit, any of these random chip-firing protocols sorts ∆ 2m+1 , except that with probability 2/3 the protocol does not locally sort the three chips which occupy the vertex it fires on its last move.
3.3. Other types. In this subsection we describe a "Type B" analog of our main result, which follows in a straightforward way from our main result via symmetry. Consider the following moves applied to a labeled configuration C on Z: (I) if chips (a) and (b) with a < b are both at vertex i ∈ Z, move (a) leftward one vertex and (b) rightward one vertex (this is the usual labeled chip-firing move); (II) if chip (a) is at vertex i ∈ Z and chip (b) is at vertex −i, move both (a) and (b) rightward one vertex; (III) if chip (a) is at the origin, move (a) rightward one vertex.
Theorem 28. For any n ≥ 1, starting from the configuration ∆ n and applying the moves (I), (II), and (III) in any order for as long as we can, we always arrive at the configuration that has chip (i) at vertex i for all 1 ≤ i ≤ n.
Proof. The proof follows from Theorem 13 by considering a symmetric version of the labeled chip-firing process. Suppose we carry out the labeled chip-firing process on Z, starting from 2n chips at the origin with labels −n, −(n − 1), . . . , −1, 1, 2, . . . , n. Also, suppose that whenever we fire (a) and (b) together, where a = −b, we also immediately fire (−a) and (−b) together. This will mean that at all times in the process, if chip (a) is at vertex i then chip (−a) must be at vertex −i (i.e., the configuration will always be symmetric about the origin). Moreover, we claim that the way the positive labeled chips evolve in this process is exactly according to the moves (I), (II) and (III) above. Specifically, move (I) corresponds to firing (a) and (b) together (and (−a) and (−b) together). Move (II) corresponds to firing (a) and (−b) together, and (−a) and (b) together. Finally, move (III) corresponds to firing (a) and (−a) together, which because of the symmetry we maintain during the process, can only happen if (a) and (−a) are both at the origin. The claimed result then follows from Theorem 13, which says precisely that chip (i) ends at vertex i for all 1 ≤ i ≤ n.
Why do we call the process in Theorem 28 a Type B analog of labeled chip-firing? First let us explain why the ordinary labeled chip-firing process is "Type A." Suppose that C is a labeled configuration on Z with label set [n], and consider the vector v(C) in R n which records the positions of chips: v(C) := (C(1), C(2), . . . , C(n)). How does v(C) evolve as we cary out the usual labeled chip-firing process? Firing chips (i) and (j) with i < j corresponds to adding the vector e j − e i (where e i is the standard basis vector), and we are allowed to perform such a move whenever C(i) = C(j), i.e., whenever (v(C), e j − e i ) = 0 (where (·, ·) denotes the standard inner product on R n ).
The collection of vectors {e j − e i : 1 ≤ i < j ≤ n} is (one choice for) the set of positive roots of the root system of Type A n−1 . (Consult Bourbaki [8] for the basic theory of root systems.) Theorem 13 says that, if n is even, starting from the origin v := (0, 0, ..., 0) ∈ R n and repeatedly updating our vector v by v → v + α whenever we have (v, α) = 0 for some positive root α of Type A n−1 , we always terminate at the same final vector no matter what choices we make along the way. Theorem 28 is the exact same statement, except that we take our α's to be the positive roots of Type B n and the conclusion now holds for all values of n.