An Input-Series-Output-Parallel Cascaded Converter System Applied to DC Microgrids

: Direct current transformer (DCT) is a key piece of equipment in direct current (DC) microgrids, and the mainstream topologies mainly include LLC resonant converter (LLC) and dual active bridge (DAB). In this paper, a novel bi-directional buck/boost + CLLLC cascade topology is proposed for the input-series-output-parallel cascade converter system of a DC microgrid. To solve the problem that frequency variation causes the converter to deviate from the optimal operating point, resulting in low eﬃciency, and the inability to achieve a soft switching function. The CLLLC converter operates near the resonant frequency point as a DCT, only providing electrical isolation and voltage matching, while the buck/boost converter controls the output voltage and the voltage and current sharing of each module. Compared to other cascaded converter systems, the cascaded converter proposed in this paper has high eﬃciency, simpliﬁes the parameter design, and is suitable for wide input and wide output operating conditions. The system adopts a three-loop control strategy, establishes the small-signal modeling of the system, and its stability is veriﬁed by theoretical analysis and simulation. The simulation and experimental results verify the correctness of the proposed cascaded converter based on buck/boost + CLLLC and the eﬀectiveness of the control strategy.


Introduction
In recent years, with the development of power electronics technology, the technical problems faced by DC transmission and distribution have gradually been solved. With be er compatibility with distributed renewable energy sources, higher efficiency, and higher system reliability, DC microgrids have a broad development prospect. Distributed renewable energy (DER) is connected to the microgrid through power electronic converters (PEC) [1]. This paper presents a comprehensive literature review of DC-DC converter topologies used in DC microgrids [2,3]. Due to the existence of a buck-to-back process inside the converter, it is inevitable to add more switch tubes and energy storage components. Due to the pursuit of power density in converters, high-frequency converters usually need to solve switching losses and other issues. Therefore, high-frequency switches must achieve soft switching, and DC/DC converters with soft switching characteristics are gradually receiving a ention [4,5]. Converters with bi-directional energy flow topologies are numerous while the topologies that guarantee high efficiency are limited. Several topologies will be described below.
The most widely used is the DAB converter, which has been widely studied by scholars due to its ability to achieve bi-directional power flow and soft switching technology, Figure 1 shows the topology of the DAB converter. Due to the presence of auxiliary inductor L, the DAB converter can achieve soft switching and zero voltage switching (ZVS) during operation, which also enables the efficiency of the DAB converter to reach over 97% in high-power applications [25,26]. In order to solve the problem of ZVS changing with load in DAB converters, LLC resonant converters have a racted widespread a ention for their superior comprehensive performance. The LLC topology is shown in Figure 2. The LLC resonant converter has natural soft-switching characteristics and can achieve ZVS for the primary inverter switch tubes and ZCS for the secondary rectifier diodes over a wide range of input voltages and full loads, without an auxiliary network and with simple control. In order to solve the problems of forward and reverse differences and the complex design of LLC converters, a CLLLC resonant converter topology is proposed, as shown in Figure 3.   Figure 4 shows the buck/boost converter topology. The buck-boost converter has the advantages of wide-range voltage conversion and bi-directional power transfer. It has received wide a ention from scholars at home and abroad in recent years and is used in DC microgrids [27][28][29][30][31]. Figure 4. Synchronous switching topology. Figure 5 shows the DC transformer composed of a bi-directional buck/boost + CLLLC cascade converter; this new topology input side is connected in series and the output side in parallel, wherein the buck/boost converter works in voltage regulation mode [32] and the CLLLC converter works near the resonant frequency, through parameter design to achieve the role of DCX. A modular multi-converter series-parallel combination structure has been proposed, which is characterized by not only the normal operation of a single converter module but also the ability to achieve voltage/current sharing between multiple standardized modules through bus connection, achieving a modular combination structure of the system. Compared to other topologies, it has higher efficiency and fast dynamic response, which is suitable for high-power DC microgrids. ... Figure 5. Schematic diagram of system structure and topology.

SubsectionAnalysis of Cascaded Converter Model
In this paper, we first establish the independent mathematical model of each module converter separately to obtain the equivalent circuit model. By cascading the circuit models of each level, we obtain the equivalent circuit model of the cascaded converter system so that we can establish the mathematical model of the cascaded converter system based on this circuit model. According to the buck/boost converter mathematical model and the CLLLC converter mathematical model, the steady-state equivalent circuit diagram of the buck/boost + CLLLC converter cascaded system can be obtained, as shown in Figure 6. According to the above equivalent circuit diagram, the DC voltage gain M of the buck/boost + CLLLC cascaded converter is: The state space averaging model of the buck/boost converter is obtained by averaging the modes over one switching cycle: where R is the buck/boost converter output impedance where V  is buck/boost converter output voltage. Taking input variables S U V   , output variables o V V  1 , the steady-state output voltage gain is: According to Figure 5, the input and output transfer functions of the CLLLC resonant converter are: When the converter is operating at the resonant operating point, the imaginary part of the transfer function is zero, and the expression ωr of the resonant frequency containing the resonant network can be found in Equation (8): Defining the normalized frequency, the characteristic impedance of the resonant network, the system figure of merit, and in Equation (8), the reduced transfer function is: The voltage gain of the CLLLC resonant converter is then obtained: When the tube is operating at resonance, Equation (11) is substituted into (13), and the converter gain in the quasi-resonant operating state is: Substituting Equations (5) and (14) into Equation (1) to find the dc voltage gain M of the buck/boost + CLLLC cascaded converter is: According to the equivalent circuit diagram shown in Figure 5, the input-output transfer function G of the buck/boost + CLLLC cascaded converter is: Status variables s X and input variables s U the transfer function is: Substituting Equations (6) and (18) into Equation (16) gives the input-output transfer function G of the buck/boost + CLLLC cascaded converter as:

Parametric Design
In order to make the ISOP system automatically achieve intermediate bus voltage equalization, the key is to ensure that the CLLLC converter presents DC transformer characteristics, and the converter parameters are designed based on this requirement. The resonant converter resonant network gain is approximately equal to 1, so the transformer transformation ratio is 1.5. The switch tube used in the CLLLC converter experiment is FGH40N60SFD, and its junction capacitance size is 2.3 nF. The maximum excitation inductance can be calculated to be 187 µH. In order to reduce the volume of the converter and reduce the influence of stray parameters on the resonant network, the transformerintegrated leakage inductance is used as the resonant inductance in the resonant network, and the leakage inductance affects the design of the transformer, so the k value is selected as 15, the excitation inductance Lm is 172 µH, and the resonant inductance L1 is 11.53 µH. Since the converter is designed to work at the resonance point, the resonant capacitance of 220 nF can be found according to the resonant inductance sought. According to the original secondary side, resonance parameters should be equivalent and equal, and the secondary side resonance parameters can be obtained. In summary, the parameter design of the system converter is shown in Table 1. As the converter operates in buck mode, the output voltage is V1 on the low voltage side, so at this point let The transfer function Gid(s) from the current loop d(s) to iL(s) can be obtained as: The transfer function Gvi(s) from the voltage outer loop d(s) to iL(s) can also be obtained as: The transfer function Gvi(s) from the outer loop of the voltage to iL(s) to V1(s) is: Draw the Bode diagram of the loop voltage and current loop transfer function based on the parameters and Equations (23) and (24) of the buck/boost converter.
Define the PI controller expression as: Figure 7 shows the Bode diagram of the controlled object of the voltage loop. The system gain in the low-frequency band is small and the slope is 0. The dynamic performance of the system is poor and there are steady-state errors, so a PI controller needs to be introduced to increase the gain of the system in the low-frequency band and increase the slope of descent. After system compensation, the system has a low-frequency slope of 20 dB/dec, a cutoff frequency of 100 Hz, and a phase margin of 120°, which is in line with the design criteria, and the PI controller parameters are reasonably designed. As can be seen from the Bode diagram of the current loop-controlled object in Figure  8, the system gain in the low-frequency band is 40 dB, but the slope is 0. This makes the converter output have a steady-state error, and the PI controller needs to be introduced to increase the system slope down in the low-frequency band. After system compensation, the slope of the system in the low-frequency band is 20 dB/dec, the end frequency is about 1 kHz, the phase margin is 80°, which corresponds to the design standard, and the PI controller parameters are reasonably designed.

Simulation Results and Analysis
In order to verify the correct parameter design, dynamic performance, and stability of the proposed control strategy of the system, an ISOP system with two identical module parameters was built based on Matlab/Simulink to simulate load and input voltage sudden changes [33]. The simulation results verify that the system can naturally achieve voltage and current sharing of the intermediate bus under different load conditions. When the input voltage suddenly changes, the voltage of the intermediate busbar and the system output voltage change very li le, and have a fast adjustment speed, achieving a good dynamic voltage-sharing effect.
The ISOP topology adopts a series structure on the input side and a parallel structure on the output side. The CLLLC converter in the submodule is equivalent to a wire. The buck/boost converter operates in buck mode, which controls the output voltage and equalizes the voltage and current of each module. The operation of the combined converter in buck mode is analyzed and Figure 9 shows a structural diagram of the three-loop control of an ISOP system. Figure 10 is the topology and control block diagram.  For the ISOP system, the key issue is to ensure that each module shares voltage on the input side and current on the output side. In recent years, many scholars have proposed various control schemes, which can be summarized into two categories: three-loop control and double-loop control. This system adopts three-loop control, which refers to the control system including the system output voltage loop, input voltage sharing loop of each module, and current inner loop of each module. Superposition of the output signal of the system output voltage loop and the output signal of the input voltage equalizing loop of each module as the given signal of the corresponding module current inner loop. The output of the current inner loop is compared with the sawtooth wave and processed accordingly to obtain the drive signal for each module's switching tubes. Finally, the stability of the system output voltage and the input voltage equalization of each module is achieved. If the inner current loop of each module in the three-loop control strategy is removed and only the input voltage sharing loop and output voltage loop are retained, a dual loop control strategy can be obtained. All modules in the system share a voltage loop to ensure stable output voltage. The input voltage sharing ring directly adjusts the duty cycle of each module, increasing the duty cycle of modules with high input voltage. The duty cycle of modules with low input voltage is reduced, thereby achieving input voltage equalization.

Module 1 Drive circuit
Whether there is coupling between two control loops and whether the buck/boost converter operates in buck or boost mode, it will not affect the coupling relationship of the control loop. In order to ensure the stability of the system, an input voltage-sharing control strategy was adopted, which can be equivalent to the same input power for each module. Due to the consistent parameters of each module, the output current of each module is balanced and equal. Figure 11 is the main circuit simulation model. Figure 12 is the control circuit simulation model. Figure 11. Main circuit simulation model.  The sudden load change is set to rise from 2.304 Ω to 9.216 Ω at 0.3 s and then fall to 2.304 ohms at 0.6 s. The output voltage and current waveforms of the system when the output load changes suddenly at full load and light load are shown in Figure 14. From the simulation results, it can be seen that when the system load power changes abruptly, the proposed control strategy can control the output voltage fluctuation of the converter to be less than 10%, and the adjustment time is within 100 ms.  Figure 15 shows the current waveform of the module resonant network. The simulation results show that changes in load can also cause changes in the current value of the resonant network. This is because the resonant current decreases under light load conditions, and the efficiency of the converter slightly decreases. However, under full load conditions, it can be seen that the CLLLC converter operates near the optimal operating point. Whether under light load or full load, the peak current of the excitation inductance remains basically unchanged, indicating that the conditions for achieving the ZVS of the switch under different loads are the same, which verifies the effectiveness of the resonant parameter design.

Simulation Experiment of Voltage Sudden Change
Defined ① in Figures 16-18 as an input voltage of 266 V, ② input voltage of 226 V, ③ input voltage of 266 V. Figure 16 shows the waveform of the input voltage and intermediate stage voltage of each module in the system during a sudden voltage change. Due to the different values of input and output capacitance, the simulation results show that when the input voltage changes, the transient voltage distribution is not uniform due to the difference in capacitance between the input and intermediate stage voltages of each module.

Iutput voltage 226V
Iutput voltage 266V  Figure 17 shows the waveform of the system output voltage and current when the input voltage of the system undergoes a sudden change. The simulation results show that the proposed control strategy can control the output voltage fluctuation of the converter to be less than 2.4%, the adjustment time is within 40 ms, and the output voltage can be stable at 48V. The ISOP system not only has a fast-dynamic response speed but also achieves good dynamic voltage equalization.  Figure 18 shows the current waveform of the resonant network when the voltage suddenly changes. The simulation results show that the change in input voltage has no effect on the resonant current, and the converter is still in the optimal working state. The ISOP system can only operate stably under input voltage-sharing control and adopts a three-loop control strategy. We designed the PI parameters of the buck/boost converter and determined the range of parameter values.

Experimental Results and Analysis
In order to verify the feasibility and effectiveness of the proposed automatic input voltage and output current sharing method, this chapter designed and completed a 1 kW ISOP system prototype consisting of two basic modules of buck/boost + CLLLC resonant converters.
The experimental results show that under the three-loop control strategy, it can respond quickly no ma er when the load and voltage suddenly change. The CLLLC and buck/boost converter parameters are designed to use these submodules to form a buck ISOP system. We built an experimental platform based on the design parameters and conducted experimental analysis on the transient and steady-state characteristics of the ISOP system composed of submodules and multiple modules. The experimental platform and submodule physical platform are shown in Figure 19a,b.
The physical platform uses TMS320F28335 as the submodule control circuit, combined with a touch-screen display to form a system output display.

Steady-State Experiment of Sub-Moodle Voltage Reduction
The measured module drive signal, steady-state resonant current, and output voltage waveforms are shown in Figure 20 when operating in buck mode when the module input voltage is 134 V. The simulation results show that the output voltage of the CLLLC converter is 48 V and the resonant frequency is 100 kHz. The resonant current is in sinusoidal form, which means that the converter is located near the resonant operating point, where it is most efficient.  Figure 21 shows the waveform of the driving signal, resonant current, and output voltage during output load switching. The load mutation of the submodule was set at t1, and the load suddenly changed from 4.608 Ω to 18.432 Ω. The resonant current changes from a sine wave to a delta wave, the current value decreases and the efficiency of the converter is reduced. At t2, the load suddenly changed from 18.432 Ω to 4.608 Ω, and the working point of the CLLLC converter returned to the resonance point. When the input voltage suddenly changes from 134 V to 120 V at time t1, the waveform of the module output voltage and resonant current is shown in Figure 22a. The experimental results show that it cannot return to the rated input voltage of 48 V, and there is a deviation, but it is within 10%, meeting the indicator requirements. Similarly, when the input voltage suddenly changes to 145 V at t2, the output voltage also meets the indicator requirements, as shown in Figure 22b. There is no significant change in the amplitude of the resonant current in the resonant network under two operating conditions, and the CLLLC converter is always in the optimal working state.

Steady State Experiment of ISOP System
The two modules are connected in series on the high-voltage input side and in parallel on the low-voltage output side to form an ISOP system. Figure 23 shows the ISOP system input and output voltage and current waveforms. At this time the system input voltage is 266 V, the two modules have approximately equal input voltage, module 1 input voltage is 130 V, module 2 input voltage is 135 V, the parallel output voltage is 48 V and the output current is approximately 19 A.  Figure 24a,b show the waveform of the input voltage and system output voltage and current of each module when the output load suddenly changes between 2.304 Ω and 9.216 Ω, respectively. The experimental results show that the input voltage of each module can be considered almost unchanged when the load suddenly changes, and the output voltage is stable at 48 V, which verifies the effectiveness of the control strategy.  Figure 25a,b show the waveform of the input voltage and system output voltage and current of each module when the input voltage suddenly changes between 266-226 V, respectively. From the experimental waveform, it can be seen that when the input voltage suddenly increases or decreases, the output voltage will slightly increase and decrease in a steady state. This is because the given reference value of the system output voltage changes, and under voltage mutation conditions, each module can evenly share the input voltage in a steady state. The efficiency curve of the submodule and ISOP system is shown in Figure 26. When the output power is less than the rated power, the efficiency of the submodule and ISOP system tends to increase as the output power increases. However, when the output power reaches about 70-80% of the rated power, the efficiency is the highest, and it will decrease later, but overall, the efficiency is over 96%. In addition, the efficiency of the submodules is be er than that of the ISOP system. The comparison of the theoretical and experimental results is shown in Table 2.

Conclusions
For a medium-power DC microgrid situation with high voltage input and low voltage output, we propose a new topology with a CLLLC+ buck/boost converter as a submodule of the ISOP system. This system adopts three-loop control, and the proposed control strategy can control the output voltage fluctuation of the converter to less than 10% when the system load power changes abruptly with a control time of less than 100 ms under the case of ±10% difference of input and output capacitance values. When the input voltage of the system changes abruptly, the proposed control strategy can control the output voltage fluctuation of the converter to less than 2.4%, the regulation time is within 40 ms, and the output voltage can be stabilized at 48 V. The proposed new topology has a quick dynamic response and an efficiency of more than 96%, which verifies the effectiveness of the adopted control strategy.