Crosstalk Analysis of a CMOS Single Membrane Thermopile Detector Array

We present a new experimental technique to characterise the crosstalk of a thermopile-based thermal imager, based on bi-directional electrical heating of thermopile elements. The new technique provides a significantly simpler and more reliable method to determine the crosstalk, compared to a more complex experimental setup with a laser source. The technique is used to characterise a novel single-chip array, fabricated on a single dielectric membrane. We propose a theoretical model to simulate the crosstalk, which shows good agreement with the experimental results. Our results allow a better understanding of the thermal effects in these devices, which are at the center of a rising market of industrial and consumer applications.

Thermopiles are typically made of a series of thermocouples [18], each comprising two conductors (e.g., p + /n + doped polysilicon [14,19,20], or silicon [13,20]) with dissimilar Seebeck coefficients (typically ∼300 µV/K [20]), where one "hot junction" can be heated while the opposite "cold junction" is thermally bonded to a heat-sinking substrate [21]. The thermocouple generates a voltage V T = α∆T [18] when a temperature gradient ∆T is present across its junctions, where α is the Seebeck coefficient (a measure of the material's efficiency to thermally generate a voltage [17]). Thermopile-based FPAs are composed of an array of thermopile-based pixels located at the focal plane of a lens [4], and produce a thermal image by detecting ∆Ts between pixel elements. The hot junctions of each pixel's thermocouples are typically thermally isolated by a thin dielectric membrane [21,22]. A voltage V T = Nα∆T (proportional to the number of thermocouples N), is generated when the membrane is IR irradiated [18]. We recently demonstrated a low-cost (<1$) and low-power-consumption (∼mW) CMOS-based thermopile FPA fabricated on a single dielectric membrane, employing standard CMOS tungsten (W) metallization layers for heat-sinking of the thermopile cold junctions, and exemplified its potential by applying it to gesture recognition and people-counting [13].
An important figure of merit of a FPA is the pixel-to-pixel crosstalk (C) (i.e., the unwanted transfer of signals between pixels [23]), which can affect the spatial resolution of the detector and thus complicate the reconstruction of the desired image [24]. For a thermopile array, C is defined as the ratio between the V T signal generated by an optically irradiated pixel (V T1 ) and that of an adjacent non-irradiated pixel (V T2 ), i.e., C = V T2 /V T1 [6]. In thermal FPAs, C is dependent on inter-pixel heat diffusion [6], and is typically measured by optically irradiating (e.g., by a laser source [6]) a pixel and comparing its V T signal to that of adjacent pixels [6,19]. However, imperfections in the laser focusing can lead to optical leakage from the laser spot, which can be challenging to control and/or quantify [6,19]. A different approach for C-measurement is to use an on-chip heater for thermal excitation [6]. However, this additional structure increases the fabrication complexity and may compromise the thermal performance of the device.
Here we introduce a novel approach for measuring the crosstalk of a thermopile-based FPA without using a laser source, or an on-chip heater. Our approach uses bi-directional electrical biasing of the thermopile elements themselves to obtain the thermoelectric voltages needed for crosstalk calculations. Moreover, we propose a numerical model to simulate the crosstalk of a single membrane thermopile array design, which we use to better understand the crosstalk formation of these devices.

Device Fabrication
The thermopile detector array is fabricated on a single membrane using a commercial 1 µm silicon on insulator (SOI)-CMOS process on 6 inch Si wafers. The pixels are formed by highly doped p + and n + single-crystal Si layers formed within the SOI layer. The interconnection between the p + and n + elements, and the heatsinking tracks between the pixels are formed by three W interconnect layers, with 20 µm track widths, and ∼1 µm total thickness. W is an interconnect metal which can be employed in standard high-temperature CMOS processes [25] and it is implemented for heatsinking due to its much higher thermal conductivity (∼80 W/mK) when compared to that of silicon dioxide (SiO 2 , ∼0.8 W/mK) which forms the membrane of our device. Figure 1a shows the optical image of our device, with the inset showing the zoomed-in structure of a single pixel. The SiO 2 membrane is ∼5 µm thick and has an area of 1200 µm × 1200 µm (150 µm × 150 µm for a single pixel), see Figure 1b. The layers are grown on a 380 µm thick Si substrate, back-etched using deep reactive ion etching (DRIE) to form the membrane, with the first SiO 2 layer acting as an etch stop. A device, with array sizes of 8 × 8 pixels, is fabricated as a proof-of-concept. Each pixel consists of a thermopile with 52 thermocouple pairs. The thermopiles have their cold junctions placed adjacent to the surrounding heatsinking tracks, formed by the three W layers.

Experimental Results
To evaluate the crosstalk, we use a bi-directional electrical biasing approach to obtain the voltage V T generated by a thermopile (pixel) under thermal stress, as shown in Figure 2. The pixel is thermally stressed by Joule heating [26], i.e., by applying a range of biasing currents (from I ∼ 10 µA to 200 µA in our case) to the thermopile elements, resulting in a heat load (RI 2 ) proportional to the track resistance (R). This gives rise to a ∆T across its thermocouple's junctions and thus a V T . To extract V T , we apply a current in both negative and positive directions, as shown in Figure 2. When the p + and n + Si elements of the pixel are I-biased, the total generated voltage will then contain an ohmic drop (V = IR) contribution, caused by the thermocouple track's R, added to V T . The measured respective voltages, for the applied positive (I + ) and negative (I − ) electrical currents, will therefore be V + = I + R + V T (step 1) and V − = I − R + V T (step 2), as shown in Figure 2. When added, the voltage due to the electrical resistance (created by the opposing current flows) cancels out, resulting in V T = (V + + V − )/2 (step 3). The V T generated by an adjacent pixel is then directly measured and finally the crosstalk is calculated as the ratio between the two. Three chips were tested to check consistency, with the results presented in Table 1 (measurements with current source), showing ∼2.69% crosstalk. These values are comparable to current state-of-the-art thermopile FPAs [6,13,14], with our novel method being significantly simpler to apply. A comparison with the simulation results, also shown in Table 1, is discussed in the next section.  Table 1. Comparison between experimental and simulation results. Numerical simulations were implemented using both a current source and an uniform heat source across the thermopile elements.

Numerical Simulations
To better understand the thermal behaviour of our device, we perform numerical simulations based on a finite elements method (FEM) model. For a comprehensive depiction of the thermopile's behaviour, we use the heat transfer module, and the electric current module of the commercial software package COMSOL Multiphysics [27]. We reduce the complexity of our model by making the following two simplifications (a comparison between the structure of the real chip and that of our model is shown in Figure 3): we remove the metal pin pads around the membrane (Figure 3a,b), considering their negligible effect on both the electrical and thermal behaviour of the chip [20]; and, we simulate only 9 pixels at the centre of the membrane, and the metal tracks surrounding them (Figure 3b), considering the device contains 64 identical thermopiles (thus reducing the computation time). The 3-dimensional (3D) view of our model (Figure 3c), shows an air cube placed on top of the chip to account for heat losses in the air. We compare the simulation and experimental results in Figure 4, showing good agreement for V T generated by a pixel as a function of input power. The corresponding crosstalks are 2.7% and 2.69% respectively for the simulations and experiments. We also compare the simulated temperature distribution (∆T) across the heated pixel, to that measured using an IR thermal microscope, both obtained with a heating I ∼ 200 µA ( Figure 5). The respective 26 • C (simulations) and 25.5 • C (experiment) ∆Ts show good agreement. It is expected that T-induced changes in the thermal properties of the materials, which would cause any distortion [16], will be limited here as T changes due to electrical heating are limited.
We then consider the effect of a uniform heat source across the pixel, as shown in Figure 6. We thus replace the current biasing with a boundary heat source, across the pixel, to define a constant power dissipation per unit area (a scenario mimicking a laser source illuminating a single pixel). In this case, the pixel is solely heated by the uniform boundary heat source (no current being applied); with the heating power being equivalent to that for the Joule heating scenario. Table 1 shows a comparison of simulated crosstalk values obtained for both heating approaches. The pixel's responsivity, defined as the change in voltage response due to incident optical power [16], is also included.   The crosstalk simulated with the uniform heat source (3.02%) is slightly higher than that simulated with Joule heating (2.7%), while the responsivity shows an opposite trend, i.e., 13% lower. This is expected, as a non-uniform heat distribution across the pixel enhances ∆T, while inter-pixel heat diffusion is limited by the localised thermopile tracks.

Conclusions
In conclusion, we report a bi-directional electrical biasing method for crosstalk measurements of a thermopile-based IR detector array fabricated on a single dielectric membrane. The use of the thermopile itself as a heater, significantly simplifies the experimental setup, compared to the use of a laser source. We propose a theoretical model to further investigate crosstalk effects in these devices, which shows good agreement with the experimental results. Our results open new perspectives for these novel thermal devices.