Design of a 900 MHz Dual-Mode SWIPT for Low-Power IoT Devices

This paper presents a duty cycle-based, dual-mode simultaneous wireless information and power transceiver (SWIPT) for Internet of Things (IoT) devices in which a sensor node monitors the received power and adaptively controls the single-tone or multitone communication mode. An adaptive power-splitting (PS) ratio control scheme distributes the received radio frequency (RF) energy between the energy harvesting (EH) path and the information decoding (ID) path. The proposed SWIPT enables the self-powering of an ID transceiver above 20 dBm input power, leading to a battery-free network. The optimized PS ratio of 0.44 enables it to provide sufficient harvested energy for self-powering and energy-neutral operation of the ID transceiver. The ID transceiver can demodulate the amplitude-shift keying (ASK) and the binary phase-shift keying (BPSK) signals. Moreover, for low-input power level, a peak-to-average power ratio (PAPR) scheme based on multitone is also proposed for demodulation of the information-carrying RF signals. Due to the limited power, information is transmitted in uplink by backscatter modulation instead of RF signaling. To validate our proposed SWIPT architecture, a SWIPT printed circuit board (PCB) was designed with a multitone SWIPT board at 900 MHz. The demodulation of multitone by PAPR was verified separately on the PCB. Results showed the measured sensitivity of the SWIPT to be −7 dBm, and the measured peak power efficiency of the RF energy harvester was 69% at 20 dBm input power level. The power consumption of the injection-locked oscillator (ILO)-based phase detection path was 13.6 mW, and it could be supplied from the EH path when the input power level was high. The ID path could demodulate 4-ASK- and BPSK-modulated signals at the same time, thus receiving 3 bits from the demodulation process. Maximum data rate of 4 Mbps was achieved in the measurement.


Introduction
Energy-limited wireless devices in Internet of Things (IoT) and wireless sensor networks (WSN) are typically powered by batteries with limited lifetime. Although their replacement and recharging can extend the operation of the system for a certain amount of time, it usually results in high costs. In recent times, radio frequency (RF) energy harvesting (EH) has potentially overcome the need for Figure 1 shows the concept of SWIPT. The hybrid access point (HAP) transmits the energy signal s(t), which carries modulated data information. The channel fading is represented by he jθ . At the receiver side, y(t) is the received signal containing the channel noise z(t) (W ant (t)). The received signal is used for both EH and ID processing [4][5][6][7][8][9][10][11]. For the SWIPT system, a transmitter generates single-tone and multitone waveforms. The transmitter selects a waveform depending on the received power and feedback information from the receiver. The transmitter and receiver are jointly designed based on single-tone transmission with M-ary amplitude-shift keying (ASK) and multitone transmission with PAPR modulation. At the receiver, the received signal is decoded jointly using both coarse and fine amplitude paths. The former maps to coarse energy levels (e.g., high/low amplitude levels), while the latter maps to fine constellation points associated with the energy level. By virtue of the nonlinear rectification process, the PCE can be enhanced using multitone waveforms. Furthermore, the PAPR-based information transmission facilitates low-power ID using simple PAPR measurements [18]. signal s(t), which carries modulated data information. The channel fading is represented by ℎ . At 98 the receiver side, y(t) is the received signal containing the channel noise z(t) (Want(t)). The received 99 signal is used for both EH and ID processing [4][5][6][7][8][9][10][11]. For the SWIPT system, a transmitter generates 100 single-tone and multitone waveforms. The transmitter selects a waveform depending on the 101 received power and feedback information from the receiver. The transmitter and receiver are jointly 102 designed based on single-tone transmission with M-ary amplitude-shift keying (ASK) and multitone 103 transmission with PAPR modulation. At the receiver, the received signal is decoded jointly using 104 both coarse and fine amplitude paths. The former maps to coarse energy levels (e.g., high/low 105 amplitude levels), while the latter maps to fine constellation points associated with the energy level. 106 By virtue of the nonlinear rectification process, the PCE can be enhanced using multitone 107 waveforms. Furthermore, the PAPR-based information transmission facilitates low-power ID using 108 simple PAPR measurements [18]. 109 110 Figure 1. The concept of simultaneous wireless information and power transceiver (SWIPT).

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A receiver architecture comprises three paths-EH, ID, and PAPR paths-and a power 112 management (PM)-ID control module, as shown in Figure 2. To harvest energy and decode 113 information from the same signal at the receiver with self-powering, the duty cycle operation and 114 the APS are adopted. The APS in front of the three paths splits the received signal with ρ, where 0 < ρ 115 ≤ 1. The EH path is first activated to charge the battery. When the harvested energy is sufficient for 116 self-powering and energy-neutral operation, either the ID path or the PAPR path is used, depending 117 on the selected single-tone or multitone communication mode. We assume that infinitesimally small 118 ρ is enough to achieve the required signal-to-noise ratio (SNR) for ID because of the property of the 119 integrated receiver. Then, most of the signal power can be harvested at the EH circuit. The received 120 signal after power splitting at the EH path can be expressed as 121 where s(t) is the transmitted signal, h is the complex-valued channel gain with magnitude |h|, and 122 n(t) is the channel noise modeled as additive white Gaussian noise (AWGN) with variance . The 123 received signal passes through the EH path during the EH block, which is described as 124 ( ) = ( ), t ∈ 0, , where Dn is the duty ratio of EH to ID, and Tn is the frame time 125 during one duty cycle operation at the nth channel block. The harvested power is evaluated as 126 where = | ( )| = (1 − )|ℎ| .
(energy harvested from the noise power is ignored) is 127 used for charging the battery and decoding information at the ID path as well. The received signal 128 for ID is of the form ( ) = |ℎ| ( ) + ( ) = ( ), t ∈ , . Note that the time duration 129 of the ID block is different from that of the EH block. The ID path is used to decode a single-tone 130 waveform of the received signal with distinct energy levels. As the single-tone waveform is very 131 A receiver architecture comprises three paths-EH, ID, and PAPR paths-and a power management (PM)-ID control module, as shown in Figure 2. To harvest energy and decode information from the same signal at the receiver with self-powering, the duty cycle operation and the APS are adopted. The APS in front of the three paths splits the received signal with ρ, where 0 < ρ ≤ 1. The EH path is first activated to charge the battery. When the harvested energy is sufficient for self-powering and energy-neutral operation, either the ID path or the PAPR path is used, depending on the selected single-tone or multitone communication mode. We assume that infinitesimally small ρ is enough to achieve the required signal-to-noise ratio (SNR) for ID because of the property of the integrated receiver. Then, most of the signal power can be harvested at the EH circuit. The received signal after power splitting at the EH path can be expressed as where s(t) is the transmitted signal, h is the complex-valued channel gain with magnitude |h|, and n(t) is the channel noise modeled as additive white Gaussian noise (AWGN) with variance σ 2 . The received signal passes through the EH path during the EH block, which is described as y EH (t) = y R (t), t ∈ 0, D n D n +1 T n , where D n is the duty ratio of EH to ID, and T n is the frame time during one duty cycle operation at the nth channel block. The harvested power P EH is evaluated as where P R = E y EH (t) 2 = (1 − ρ)|h| 2 .P R (energy harvested from the noise power is ignored) is used for charging the battery and decoding information at the ID path as well. The received signal for ID is of the form y ID (t) = √ ρ|h|s(t) + n(t) = y R (t), t ∈ D n D n +1 T n , T n . Note that the time duration of the ID block is different from that of the EH block. The ID path is used to decode a single-tone waveform of the received signal with distinct energy levels. As the single-tone waveform is very sensitive to channel fading, we assume that channel estimation is performed before decoding, which consumes more circuit power relative to that of PAPR-based SWIPT. The exact energy level can be extracted by two steps. First, coarse and fine amplitudes are estimated from the EH and ID paths, respectively. After that, the exact energy level is jointly decoded such that the coarse amplitude saves the information during the EH block, and the ID path reads the information during the ID block. The phase can be measured through a low-power circuit injection-locked oscillator (ILO)-based demodulator. The phase information can be decoded once the energy level of the signal constellation is acquired. Hence, energy, coarse/fine amplitude, and phase paths are jointly combined for the proposed single-tone SWIPT.

161
The proposed APS distributes the incoming RF power between the EH and ID paths based on 162 the input power level. As the input RF signal is not a constant quantity and its power level varies 163 with time, the APS splits the received power between the EH and ID paths depending on the input 164 power level. The proposed adaptive APS is shown in Figure 3. The APS deploys a large value 165 capacitor on the EH path to transfer more power to the PM components, i.e., RF-DC converter, 166 buck-boost converter, and low-dropout (LDO) regulator. In Figure 2, the distribution of RF input 167 power is ρ to the EH path and (1 − ρ) to the ID path [9,10,19,20]. Dual-mode operation enables the 168 proposed SWIPT system to work over a wide input power range while harvesting energy with 169 higher PCE and conveys information simultaneously. Recent works on optimum signal design has 170 revealed that using multitone waveforms [21,22] can bring considerable gain in the PCE compared 171 to single-tone waveforms. These improvements result from building on a nonlinear model of the 172 rectifier for energy harvesting, as clearly shown later in Figure 12a. In particular, multitone 173 waveforms with higher PAPR increase the DC output of the rectifier [22]. However, the problem is 174 that a simple modulation used for single-tone cannot be used on multitone waveforms. To 175 circumvent this difficulty, a PAPR technique was proposed in the SWIPT system [15] to yield higher 176 PCE and low-power ID. The PM-ID module, as shown in Figure 2, is implemented to monitor the ID 177 and PAPR paths when single-tone and multitone waveforms are used. In the proposed architecture 178 for dual-mode (single-tone and multitone) SWIPT, multitone transmission with high PAPR yields 179 higher PCE than single-tone transmission when the received input power is low. In contrast, the 180 latter yields higher PCE than the former when the received input power is high. The cross-over 181 behavior of single-tone and multitone transmissions at different RF input power levels is discussed 182 later. The cross-over point of PCE is shown to be −3 dBm. 183 The PAPR path is used for PAPR-based ID. For this, the PAPR estimator simply measures the PAPR of the received signal envelope. The received PAPR can be evaluated as Note that the symbol time of a multitone waveform is T m = T n /(D n + 1). It consumes less power compared to the ID path because PAPR-based modulation does not require power-hungry devices, such as a mixer, voltage-controlled oscillator (VCO), and analog-to-digital converter (ADC), as well as channel estimation. Furthermore, the PCE in the low-power region is enhanced thanks to multitone waveforms. Thus, the PAPR path is suitable for a low-power consumption circuit while increasing the operational range with a lower rate. The PM-ID control module monitors the received power and controls the communication mode according to the PM-ID algorithm. For example, when the receive power is greater than the PM-ID threshold, the module feeds back the control message to the transmitter, and it activates the ID path for single-tone mode; otherwise, it activates the PAPR path for multitone mode [18][19][20]. Figure 2 shows a block diagram of the proposed SWIPT. The proposed architecture is mainly divided into two paths: EH and ID paths. An antenna receives information carrying RF signals from the ambient environment and inputs to a matching network. As the signal strength of incoming RF signals varies, an adaptive impedance matching network was designed using the switches being controlled by field-programmable gate array (FPGA) to ensure maximum power transfer from the antenna to the power splitter, as shown in Figure 3.

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The APS, shown in Figures 2 and 3, splits the incoming power between the EH and ID paths. 187 The EH path harvests the maximum energy and stores it in a supercapacitor that is later used to 188 supply the ID path during duty cycle operation. The dual-mode controller turns on the RF switch for 189 the amplitude path and phase path. Amplitude and phase detection in the ID path demodulates the 190 information from the single-tone waveform and inputs to the information combiner block. 191 The PAPR path remains off during single-tone operation. When the input power is low, 192 multitone waveforms are used to boost up the PCE. During multitone operation, the EH path 193 harvests energy from them and inputs to the coarse amplitude path. The harvested signal with 194 information in it eventually reaches the adaptive dual-mode controller. As the signal strength of this 195 waveform is limited, it is not sufficient to turn on devices of the amplitude and phase paths. Thus, 196 the adaptive dual-mode controller turns on the single-pole, double throw (SPDT) switch for only the 197 PAPR path. The PAPR path demodulates the multitone waveforms and inputs to adaptive 198 dual-mode controller. The backscattering block inputs the measured data information to the antenna 199 for uplink transmission. 200 To check the feasibility and the proof of concept, a board-level circuit for the proposed SWIPT 201 system architecture was designed. This printed circuit board (PCB) uses commercial devices. 202 OrCAD was used to design the schematic and PCB for the proposed architecture. It is a dual-mode 203 SWIPT board operation operating at 900 MHz. Moreover, an off-chip (external) 5.2 GHz rectenna, 204 shown in Figure 2, is connected to a buck-boost converter by a power metal-oxide-semiconductor 205 (MOS) switch to check the operation of the RF EH receiver [23]. 206 The RF energy harvester is implemented on the RF35-type board using commercial devices in 207 order to maximize the power efficiency. A 6-stage rectenna is used, and its configuration is 208 automatically selected depending on the input power level. The input range of the RF energy 209 harvester is from 0 to +30 dBm, and the measured peak efficiency is 67% when the RF input power 210 level at the RF-DC converter input node with respect to the air losses is +20 dBm at the frequency of converter, a buck-boost converter, and LDO blocks. The RF-DC converter is the first block at the 216 input of the RF EH receiver to rectify the RF signal. A reconfigurable energy harvester is used, where 217 The proposed APS distributes the incoming RF power between the EH and ID paths based on the input power level. As the input RF signal is not a constant quantity and its power level varies with time, the APS splits the received power between the EH and ID paths depending on the input power level. The proposed adaptive APS is shown in Figure 3. The APS deploys a large value capacitor on the EH path to transfer more power to the PM components, i.e., RF-DC converter, buck-boost converter, and low-dropout (LDO) regulator. In Figure 2, the distribution of RF input power is ρ to the EH path and (1 − ρ) to the ID path [9,10,19,20]. Dual-mode operation enables the proposed SWIPT system to work over a wide input power range while harvesting energy with higher PCE and conveys information simultaneously. Recent works on optimum signal design has revealed that using multitone waveforms [21,22] can bring considerable gain in the PCE compared to single-tone waveforms. These improvements result from building on a nonlinear model of the rectifier for energy harvesting, as clearly shown later in Figure 12a. In particular, multitone waveforms with higher PAPR increase the DC output of the rectifier [22]. However, the problem is that a simple modulation used for single-tone cannot be used on multitone waveforms. To circumvent this difficulty, a PAPR technique was proposed in the SWIPT system [15] to yield higher PCE and low-power ID. The PM-ID module, as shown in Figure 2, is implemented to monitor the ID and PAPR paths when single-tone and multitone waveforms are used. In the proposed architecture for dual-mode (single-tone and multitone) SWIPT, multitone transmission with high PAPR yields higher PCE than single-tone transmission when the received input power is low. In contrast, the latter yields higher PCE than the former when the received input power is high. The cross-over behavior of single-tone and multitone transmissions at different RF input power levels is discussed later. The cross-over point of PCE is shown to be −3 dBm.
The APS, shown in Figures 2 and 3, splits the incoming power between the EH and ID paths. The EH path harvests the maximum energy and stores it in a supercapacitor that is later used to supply the ID path during duty cycle operation. The dual-mode controller turns on the RF switch for the amplitude path and phase path. Amplitude and phase detection in the ID path demodulates the information from the single-tone waveform and inputs to the information combiner block.
The PAPR path remains off during single-tone operation. When the input power is low, multitone waveforms are used to boost up the PCE. During multitone operation, the EH path harvests energy from them and inputs to the coarse amplitude path. The harvested signal with information in it eventually reaches the adaptive dual-mode controller. As the signal strength of this waveform is limited, it is not sufficient to turn on devices of the amplitude and phase paths. Thus, the adaptive dual-mode controller turns on the single-pole, double throw (SPDT) switch for only the PAPR path. The PAPR path demodulates the multitone waveforms and inputs to adaptive dual-mode controller. The backscattering block inputs the measured data information to the antenna for uplink transmission.
To check the feasibility and the proof of concept, a board-level circuit for the proposed SWIPT system architecture was designed. This printed circuit board (PCB) uses commercial devices. OrCAD was used to design the schematic and PCB for the proposed architecture. It is a dual-mode SWIPT board operation operating at 900 MHz. Moreover, an off-chip (external) 5.2 GHz rectenna, shown in Figure 2, is connected to a buck-boost converter by a power metal-oxide-semiconductor (MOS) switch to check the operation of the RF EH receiver [23].
The RF energy harvester is implemented on the RF35-type board using commercial devices in order to maximize the power efficiency. A 6-stage rectenna is used, and its configuration is automatically selected depending on the input power level. The input range of the RF energy harvester is from 0 to +30 dBm, and the measured peak efficiency is 67% when the RF input power level at the RF-DC converter input node with respect to the air losses is +20 dBm at the frequency of 5.2 GHz. It can charge the IoT devices at a distance of 5.5 m with 48-array antenna charging station of transmit power 3.6 W [24]. Figure 4 shows a block diagram of the EH path. The EH receiver comprises an RF-DC converter, a buck-boost converter, and LDO blocks. The RF-DC converter is the first block at the input of the RF EH receiver to rectify the RF signal. A reconfigurable energy harvester is used, where multiple RF-DC converter circuits are implemented in parallel at high-input power level and in series at low-input power level. This brings higher PCE than the energy harvester with fixed multiple RF-DC converter circuits.

Energy Harvesting Path
In this case, we have to divide the high-input power between the RF-DC converter circuits such 224 that 225 where NEH is the number of RF-DC converter circuits depending on the received power. We need to 226 design the RF-DC converter in a parallel structure. 227

•
Case II: Low-input power level ( ≪ , . ) 228 In this case, we have to power up the low-input power or use low Vth devices such that 229 We need to design the RF-DC converter in a series structure. In this study, to avoid PCE 230 degradation, the proposed structure was made reconfigurable so that it could be controlled by FPGA 231 both in parallel and in series. For example, in parallel structure, to find the optimal value of 232 NEH, based on the measurement performance of a single RF-DC converter circuit, , . should be 233 first determined. Then, based on the two conditions below, the optimum NEH can be determined as 234

•
Case I: High-input power level (P R > P R,opt. ) In this case, we have to divide the high-input power between the RF-DC converter circuits such that where N EH is the number of RF-DC converter circuits depending on the received power. We need to design the RF-DC converter in a parallel structure.
• Case II: Low-input power level (P R P R,opt. ) In this case, we have to power up the low-input power or use low V th devices such that We need to design the RF-DC converter in a series structure. In this study, to avoid PCE degradation, the proposed structure was made reconfigurable so that it could be controlled by FPGA both in parallel and in series. For example, in parallel structure, to find the optimal value of N EH , based on the measurement performance of a single RF-DC converter circuit, P R,opt. should be first determined. Then, based on the two conditions below, the optimum N EH can be determined as follows: Therefore, the PCE can be written as follows: where C i is the coupling loss factor proportional to the number of RF-DC converter circuits (N EH ). It can change the slope of the PCE curve and P sat a little bit. As a result, the simplified optimization problem for maximum PCE over the two factors P R and N EH can be formulated as follows: Based on the peak PCE of a single-stage RF-DC converter and the above equation, we can compute To obtain the optimal PCE, we first determine f (x), which is proportional to P R,opt. and N EH . N EH can be determined by Equation (6). Also, to find the coupling loss factor value, which is proportional to N EH , the peak PCE of a single-stage RF-DC converter in a measured point is needed. Similarly, the series structure can be described with the necessary changes. A capacitor at the output of the RF-DC converter is also used as the low-pass filter to remove ripples at the output. Fast-switching transistors or diodes need to be used for the input signal of 900 MHz. The output of the RF-DC converter is fed to a buck-boost converter and variable gain amplifier (VGA1). In order to eliminate voltage variation, we used a buck-boost converter to get constant output voltage. When the input voltage level reduces due to the weak RF signals, the boosting operation of the buck-boost converter is performed to maintain the output voltage level and vice-versa. LDO is used to keep constant output voltage. A supercapacitor is connected at the output of the LDO to store energy and provides power for the ID transceiver and the charger of the battery.
Self-powering and energy-neutral operation in the SWIPT is very essential to provide power to the ID transceiver through the EH receiver, but this task is challenging. Energy harvested through the EH path is small compared to energy required for the continuous operation of the device, especially in batteryless applications. To overcome this situation, two device operational modes were designed: harvesting mode and active mode. During the harvesting mode, sufficient amount of energy is stored in the supercapacitor. All devices in the ID path are inactive during this mode. When harvested energy crosses the harvesting threshold voltage, the SWIPT system switches it to active mode. In the active mode, the SWIPT system will continue with its normal communication operation. When the stored energy drops below the operation threshold voltage, the ID path is disabled, and the SWIPT system is switched to the harvesting mode. This device operation and the voltage across the supercapacitor are shown in Figure 5.

290
The phase detection path includes two parallel demodulators to extract ASK and binary 291 phase-shift keying (BPSK) message signals. A low-power ILO-based demodulator is used to 292 demodulate BPSK message signals. It consists of a RF power divider, ILOs that have two 293 inductor-capacitor (LC) oscillators (ILO#1 and ILO#2), and a power detector (PD) stage, including a 294 combiner and the envelope detector. The power divider performs two main tasks. The first is to 295 provide the same signal power to both oscillators, and the second is to provide isolation between the 296 two oscillators. For correct demodulation, ILOs must be tuned to nearly half of the input RF signal, 297 and Equation (10) must be satisfied. 298 where fOSC1 and fOSC2 are free-running frequencies of the two oscillators in the ILOs. fRFIN is the 299 frequency of the RF input signal. Figure 7 shows the operating principle of the phase detection path. 300 The phase changes in the input signal, S(t), are detected through ILOs. In the following equation, the 301 power divider at the Vcombiner node shows that the input signal has 0° phase shift: 302 Switching the frequency between these two modes depends on the amount of RF energy available in the ambient source and the amount of energy required for the operation of the device. Higher ambient RF energy ensures quick charging of the supercapacitor and hence provides harvesting energy during the active mode. This will reduce the time when voltage across the supercapacitor goes below the operation threshold voltage, and the SWIPT system switches to the harvesting mode. Thus, it reduces the overall device switching frequency between the two modes.
The amount of energy required for the operation of the device is also very critical in reducing mode-switching frequency. An increase in the required energy will quickly discharge the supercapacitor, forcing the SWIPT system to switch to the harvesting mode. Devices that require low operational energy draw a very small amount of energy from the supercapacitor. If the required amount of energy for the device operation is equal to or less than the amount of energy being harvested, then the device can operate continuously without switching to the harvesting mode.

Information Decoding Path and PAPR Path
The ID path consists of four main paths-coarse amplitude detection, fine amplitude detection, phase detection, and PAPR path-as shown in Figure 6. The coarse amplitude detection path includes the RF-DC converter of the EH path, a VGA1 with a 1-bit quantizer. With the fine amplitude detection path, the signal is passed through the envelope detector (ED). It consists of a diode used for rectification and a RC low-pass filter to recover the message signal. The message signal gain is then adjusted through VGA2. A 2-bit ADC is used to convert the message signal into binary form. The output of the 2-bit ADC in the fine amplitude path is combined with the output of the 1-bit quantizer in the coarse amplitude path and delivered to the decoders after adjusting the delay between the paths.  The phase detection path includes two parallel demodulators to extract ASK and binary phase-shift keying (BPSK) message signals. A low-power ILO-based demodulator is used to demodulate BPSK message signals. It consists of a RF power divider, ILOs that have two inductor-capacitor (LC) oscillators (ILO#1 and ILO#2), and a power detector (PD) stage, including a combiner and the envelope detector. The power divider performs two main tasks. The first is to provide the same signal power to both oscillators, and the second is to provide isolation between the two oscillators. For correct demodulation, ILOs must be tuned to nearly half of the input RF signal, and Equation (10) must be satisfied.
where f OSC1 and f OSC2 are free-running frequencies of the two oscillators in the ILOs. f RFIN is the frequency of the RF input signal. Figure 7 shows the operating principle of the phase detection path. The phase changes in the input signal, S(t), are detected through ILOs. In the following equation, the power divider at the V combiner node shows that the input signal has 0 • phase shift:

304
When the phase of the input signal changes in "π", the output phase of ILO#1 changes in + 305 (due to higher free-running frequency), while the output phase of ILO#2 changes in − (due to 306 lower free-running frequency). Thus, the output of the combiner is given as follows: 307 By comparing Equations (11) and (12), the phase change in the injected BPSK signal is 308 manifested at the combiner output as the amplitude changes from 2A. cos to 2A. sin . It can be 309 demonstrated using the above discussion that the later phase shift of the BPSK signal leads to the 310 amplitude flipping between these two statuses. Therefore, the BPSK signal is converted to the ASK 311 signal by these two ILOs. After that, an ED is added to demodulate the ASK signal to baseband so 312 that BPSK demodulation is accomplished. 313 A PAPR-based modulator/demodulator provides a simple and efficient way to transmit/receive 314 information [18][19][20]. A block diagram of a PAPR demodulator is shown in Figure 8. When the phase of the input signal changes in "π", the output phase of ILO#1 changes in + π 2 (due to higher free-running frequency), while the output phase of ILO#2 changes in − π 2 (due to lower free-running frequency). Thus, the output of the combiner is given as follows: By comparing Equations (11) and (12), the phase change in the injected BPSK signal is manifested at the combiner output as the amplitude changes from 2A. cos 2 . It can be demonstrated using the above discussion that the later phase shift of the BPSK signal leads to the amplitude flipping between these two statuses. Therefore, the BPSK signal is converted to the ASK signal by these two ILOs. After that, an ED is added to demodulate the ASK signal to baseband so that BPSK demodulation is accomplished.
A PAPR-based modulator/demodulator provides a simple and efficient way to transmit/receive information [18][19][20]. A block diagram of a PAPR demodulator is shown in Figure 8. The PAPR value of a received multitone signal is calculated by the PAPR calculation block, as explained in detail in the system model description. The PAPR value of a symbol can be calculated as follows: A PAPR-based modulator/demodulator provides a simple and efficient way to transmit/receive 314 information [18][19][20]. A block diagram of a PAPR demodulator is shown in Figure 8. The PAPR value 315 of a received multitone signal is calculated by the PAPR calculation block, as explained in detail in 316 the system model description.

Backscatter Modulator
Backscatter modulation is used to transmit the message signal back to the transmitter when power is limited to power up the ID transceiver. The PM-ID module will control the switch, which shunts the antenna output to perform modulation to transmit message data. Using a modulator with backscatter technique, the signal is transmitted without any oscillators. Therefore, the power consumption is considerably less and equal to 260 nW.

Simulation and Experimental Results
To validate our proposed SWIPT architecture, SWIPT PCB (31 mil Rogers RO4003C substrate) was designed, as shown in Figure 9, with multitone SWIPT board at 900 MHz.

Backscatter Modulator 322
Backscatter modulation is used to transmit the message signal back to the transmitter when 323 power is limited to power up the ID transceiver. The PM-ID module will control the switch, which 324 shunts the antenna output to perform modulation to transmit message data. Using a modulator with 325 backscatter technique, the signal is transmitted without any oscillators. Therefore, the power 326 consumption is considerably less and equal to 260 nW. 327

Simulation and Experimental Results 328
To validate our proposed SWIPT architecture, SWIPT PCB (31 mil Rogers RO4003C substrate)  329 was designed, as shown in Figure 9, with multitone SWIPT board at 900 MHz. 330 331 Figure 9. Measurement board of 900 MHz dual-mode SWIPT system. 332 Figure 10 shows the experimental setup. Adaptive matching network was used in the PCB to 333 match the point. The S11 (reflection coefficient or return loss) of −15.73 dB was measured at 334 900 MHz. Figure 11 shows the measured results of a single-stage RF-DC converter of the EH path. In 335 Figure 11a, the PCE was measured against the RF input power with respect to the number of tones. 336 For low-input power level, multitone had a better PCE performance compared to single-tone. As the 337 input power level increased, single-tone became more dominant with better performance than 338 multitone. At −10 dBm input power level, 16-tones had the maximum PCE of 12.8% for the 339 single-stage RF-DC converter. On the other hand, single-tone had the maximum power PCE of 69% 340 at 15 dBm input power level. All tones tended to have the same PCE at −3 dBm input power level, 341  Figure 10 shows the experimental setup. Adaptive matching network was used in the PCB to match the point. The S11 (reflection coefficient or return loss) of −15.73 dB was measured at 900 MHz. Figure 11 shows the measured results of a single-stage RF-DC converter of the EH path. In Figure 11a, the PCE was measured against the RF input power with respect to the number of tones. For low-input power level, multitone had a better PCE performance compared to single-tone. As the input power level increased, single-tone became more dominant with better performance than multitone. At −10 dBm input power level, 16-tones had the maximum PCE of 12.8% for the single-stage RF-DC converter. On the other hand, single-tone had the maximum power PCE of 69% at 15 dBm input power level. All tones tended to have the same PCE at −3 dBm input power level, which is called the PCE cross point. Figure 11b shows the output voltage V OUT versus input power level with respect to a number of tones. Figure 9. Measurement board of 900 MHz dual-mode SWIPT system. 332 Figure 10 shows the experimental setup. Adaptive matching network was used in the PCB to 333 match the point. The S11 (reflection coefficient or return loss) of −15.73 dB was measured at 334 900 MHz. Figure 11 shows the measured results of a single-stage RF-DC converter of the EH path. In 335 Figure 11a, the PCE was measured against the RF input power with respect to the number of tones. 336 For low-input power level, multitone had a better PCE performance compared to single-tone. As the 337 input power level increased, single-tone became more dominant with better performance than 338 multitone. At −10 dBm input power level, 16-tones had the maximum PCE of 12.8% for the 339 single-stage RF-DC converter. On the other hand, single-tone had the maximum power PCE of 69% 340 at 15 dBm input power level. All tones tended to have the same PCE at −3 dBm input power level, 341

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which is called the PCE cross point. Figure 11b shows the output voltage VOUT versus input power 342 level with respect to a number of tones. 343 348 Figure 12a-c shows the measured results of a single-stage RF-DC converter for different PS 349 ratios (CEH/CID) between the EH path and the ID path. CEH and CID are the capacitors used on the EH 350 path and the ID path, respectively. Figure 12a,b shows the PCE and the output voltage of the rectifier 351 (VRECT) versus the power-splitting ratio at 13 and −7 dBm input power level, respectively. By 352 increasing the PS ratio, PCE and VRECT increased constantly. Figure 12c shows the PCE and data rate 353 versus the PS ratio at different input power levels. After converting the input RF signal into DC 354 through a RF-DC converter, a buck-boost converter was used to provide a stable output voltage. 355 The measured output voltage of the buck-boost converter was 5.19 V. Also, LDO was used to 356 maintain an output voltage of 3.29 V. For ID, a multilevel BPSK RF signal was generated through a 357 vector signal generator. To extract the amplitude-modulated information, a signal was applied at the 358 input of the envelope detector at the amplitude path. The gain of input signal was adjusted to make 359 it suitable for applying at the input of 2-bit ADC. 360 Figure 12a-c shows the measured results of a single-stage RF-DC converter for different PS ratios (C EH /C ID ) between the EH path and the ID path. C EH and C ID are the capacitors used on the EH path and the ID path, respectively. Figure 12a,b shows the PCE and the output voltage of the rectifier (V RECT ) versus the power-splitting ratio at 13 and −7 dBm input power level, respectively. By increasing the PS ratio, PCE and V RECT increased constantly. Figure 12c shows the PCE and data rate versus the PS ratio at different input power levels. After converting the input RF signal into DC through a RF-DC converter, a buck-boost converter was used to provide a stable output voltage. The measured output voltage of the buck-boost converter was 5.19 V. Also, LDO was used to maintain an output voltage of 3.29 V. For ID, a multilevel BPSK RF signal was generated through a vector signal generator. To extract the amplitude-modulated information, a signal was applied at the input of the envelope detector at the amplitude path. The gain of input signal was adjusted to make it suitable for applying at the input of 2-bit ADC.
(VRECT) versus the power-splitting ratio at 13 and −7 dBm input power level, respectively. By 352 increasing the PS ratio, PCE and VRECT increased constantly. Figure 12c shows the PCE and data rate 353 versus the PS ratio at different input power levels. After converting the input RF signal into DC 354 through a RF-DC converter, a buck-boost converter was used to provide a stable output voltage. 355 The measured output voltage of the buck-boost converter was 5.19 V. Also, LDO was used to 356 maintain an output voltage of 3.29 V. For ID, a multilevel BPSK RF signal was generated through a 357 vector signal generator. To extract the amplitude-modulated information, a signal was applied at the 358 input of the envelope detector at the amplitude path. The gain of input signal was adjusted to make 359 it suitable for applying at the input of 2-bit ADC. (c) The measured PCE and data rate with respect to the power-splitting ratio at different input power levels. Figure 13a,b shows the output of the ED after the RF-DC converter operation. Signal gain was controlled through VGA2. The output of ED was applied at the input of 2-bit ADC, which consisted of three comparators with reference voltages of 157.5, 148.5, and 145.2 mV, respectively. Three comparator outputs were encoded into a 2-bit ADC code by applying a logical operation in LabVIEW. Comparator output was read through NI 6555 high-speed digital input/output (I/O) module. Encoding was performed through one XOR and two AND gates to generate a 2-bit ADC code.  Figure 13a,b shows the output of the ED after the RF-DC converter operation. Signal gain was controlled through VGA2. The output of ED was applied at the input of 2-bit ADC, which consisted of three comparators with reference voltages of 157.5, 148.5, and 145.2 mV, respectively. Three comparator outputs were encoded into a 2-bit ADC code by applying a logical operation in LabVIEW. Comparator output was read through NI 6555 high-speed digital input/output (I/O) module. Encoding was performed through one XOR and two AND gates to generate a 2-bit ADC code.
(a) (b)  Figure 14 shows a 2-bit encoding process. These encoded 2-bit symbols were verified through a constellation used for modulating digital data. Each symbol consisted of three bits, with two bits representing the amplitude variation, and the other one indicating 180° phase change in a modulated signal. The 3-bit symbol was recovered by combining the output of a 2-bit ADC along  Figure 14 shows a 2-bit encoding process. These encoded 2-bit symbols were verified through a constellation used for modulating digital data. Each symbol consisted of three bits, with two bits representing the amplitude variation, and the other one indicating 180 • phase change in a modulated signal. The 3-bit symbol was recovered by combining the output of a 2-bit ADC along with phase variation information through ILOs. 388 Figure 14. Measured digital encoding waveforms using LabVIEW (The meaning of the Korean is the same as they are in Figure 13). Figure 15 shows a modulated signal through a constellation symbol map that recovered 2-bit amplitude information according to the transmitted symbols. Phase change in the input signal was detected through ILOs. It consisted of two oscillators-ILO#1 and ILO#2-free-running at 458 MHz and 441 MHz, respectively. Phase changes in the input signal as per constellation are shown in Figure 16a,b, respectively. ILOs output single-bit information for about 180 • with a change in the input signal.  Figure 13).
This change in the output of ILOs is shown in Figure 17. By combining this ILO output along with the 2-bit ADC output, we successfully demodulated transmitted information. For measuring PAPR value, multitone signal was generated through a vector signal generator. The peak and average power values of the input signal were calculated through the peak and average power detection circuit.

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This change in the output of ILOs is shown in Figure 17. By combining this ILO output along 391 with the 2-bit ADC output, we successfully demodulated transmitted information. For measuring 392 PAPR value, multitone signal was generated through a vector signal generator. The peak and 393 average power values of the input signal were calculated through the peak and average power 394 detection circuit. 395 Figure 18 shows the peak and average power values of 2.3 V and 540 mV, respectively, for a 396 2-tone input signal. The PAPR value was calculated through linear and logarithmic formula, giving 397 PAPR values of 4.259 and 6.293 dB, respectively. To date, there has mostly been theoretical research 398 on SWIPT. Table 1 Figure 17. Measured output data of phase detection path (The meaning of the Korean is the same as they are in Figure 13). Figure 18 shows the peak and average power values of 2.3 V and 540 mV, respectively, for a 2-tone input signal. The PAPR value was calculated through linear and logarithmic formula, giving PAPR values of 4.259 and 6.293 dB, respectively. To date, there has mostly been theoretical research on SWIPT. Table 1 summarizes the performance of the proposed state-of-the-art SWIPT with hardware implementation and experiments. To the best of our knowledge, this is the first time it has been done.

Conclusions
This paper proposes a self-powered SWIPT architecture relying on RF energy harvesting in low-power IoT devices. The proposed architecture enables self-powering for energy-neutral operation and adopts the power-splitting scheme to ensure duty cycle-based, dual-mode operation with adaptive PM-ID operation. This will lead to sustaining a battery-free IoT sensor network for self-powered devices.
The architecture employs a high-efficiency RF-DC converter to convert RF energy into DC voltage. A buck-boost converter and LDO both secure further stable output voltages for self-powering. The information decoding path comprises amplitude, phase, and PAPR estimation. The envelope detector along with a 2-bit ADC decodes amplitude-modulated information, while an ILO-based BPSK demodulator is used to extract phase-encoded information. To validate the SWIPT architecture, the PAPR value of incoming signal was measured through its peak and average power values. The results showed high performance of −7 dBm sensitivity with 69% efficiency.
This design provides a promising solution for future IoT devices while extending the operational range via the dual-mode operation.