A Faster Half Subtractor Circuit Using Reversible Quantum Gates

. Quantum computers base their operations on optimized circuit designs. These quantum circuits, unlike classic circuits, follow the set of rules determined by quantum mechanics. Currently, one of the main problems to solve in Quantum Computation is Shor’s algorithm, which consists in factoring large numbers. It is based on arithmetic operations, therefore to optimize such operations is hence relevant. In this work, a novel half subtractor circuit is presented; it is referred to as FGE ∗ and it has demonstrated to be a 25 % faster than the state-of-the-arts reversible circuits. It is based on reversible quantum gates and it does not have any garbage output. Moreover, a robust metric is considered for comparing, in terms of resources and speed, the proposed circuit with other circuits in the literature.


Introduction
Quantum Computation and quantum information are the study of the informationprocessing tasks that can be accomplished using quantum mechanical systems.One of the goals of them is to develop tools which improve our intuition about quantum mechanics, and make its prediction more transparent to our minds.It is well-known that quantum mechanics, which is a mechanical framework for the construction of physical theories, is counterintuitive in spite of the fact that its rules are simple (Nielsen et al., 2017).Nevertheless, it gives some improvements that classical computation cannot offer (Heilmann et al., 2015).
The Church-Turing thesis says that any algorithmic process can be simulated efficiently using a Turing machine (Goldin et al., 2005).However, randomized algorithms and other problems cannot be efficiently solved on a deterministic Turing machine (Papadimitriou et al., 2003).Inspired by this idea, David Deutch was able to define a class of computing machines that was capable of efficiently simulating an arbitrary physical system.These machines are the quantum generalization of the Turing machines (Deutsch, 1985).So, the idea is that there are several problems which can be efficiently solved on these quantum computers, but not in classical computers.Quantum Computation is used in a wide variety of situations such as optical computation (Nielsen et al., 2004), coloring images using encryption/ decryption methods (Yang et al., 2014) and machine learning (Lloyd et al., 2017).Currently, the best examples on which Quantum Computation supplies a more powerful model for computation than classical computers are Shor's algorithm for integer factorization (Shor et al., 1999) and Grover's algorithms for searching an unsorted database with N entries (Grover, 1996).
Following the idea that quantum computers are more efficient than classical ones solving several problems, their applicability in supercomputing is of great interest.Quantum computers take advantage of the quantum mechanics in order to get features like parallel superposition, which gives the possibility of efficiently computing parallel and distributed programs (Back et al., 1992).With the superposition of n qubits, the quantum version of a bit, 2 n possibilities can be represented and computed at the same time, making possible new ways for solving problems.Nowadays, it is not clear what classes of problems can be efficiently solved using quantum computers.Nevertheless, the problems studied in (Shor et al., 1999, Grover, 1996) have shown to obtain better performance -in terms of runtime-on them (Nielsen et al., 2017).
Quantum computers work with a special kind of circuits: quantum circuits.Quantum circuits are based on basic operations with quantum gates, and they are in consonance with the quantum features like the superposition.Even complex operations are based on a set of basic operations (Möttönen et al., 2004), such as additions and subtractions.Therefore, the use of optimized basic operations is important to design circuits which have a suitable exploitation of the available resources (Orts et al., 2018).In the literature, there are several papers about quantum addition and quantum subtraction of two positive integers (Gidney, 2018, Murali et al., 2002, Takahashi et al., 2008, Takahashi et al., 2017, Thapliyal, 2016, Thapliyal et al., 2009), which are the most important basic operations.All these works are focused on getting faster circuits to be used as part of greater circuits, such as a module in Shor's algorithm.Since Shor's discovery, lots of works have investigated ways of building quantum circuits for this algorithm (Beauregard, 2002, Fowler et al., 2004, Proos et al., 2003, Takahashi et al., 2006, Vedral et al., 1996, Zalka et al., 1998).It is noteworthy that these basic operations are optimized to implement efficient algorithms.For instance, the subtraction is a basic operation for constructing quantum circuits for Shor's algorithm.Thus, to develop an efficient subtraction circuit will also benefit a high-performance Shor's algorithm.A half subtractor circuit computes the subtraction of two digits, and there are several works which address it in terms of Quantum Computation (Murali et al., 2002, Thapliyal et al., 2009, Montaser et al., 2017, Theresal et al., 2015, Das et al., 2017, Sarma et al., 2018, Thapliyal, 2016).
The main contribution of this work is the description of a novel and optimized quantum half subtractor circuit of integers, which improves the delay of the other state-ofthe-arts half subtractor circuits, being faster than them.The half subtractor circuit is based on reversible gates, and it does not have any garbage output.Moreover, it has been analyzed and compared with other state-of-the-art approaches using a fair metric.
The rest of this work is presented as follows: Section 2 contains a description of quantum circuits and the quantum gates involved in the half subtractor circuits.Section 3 speaks about the state-of-the-art reversible half subtractor circuits.Section 4 presents the proposed circuit.Finally, Section 5 summarizes the main conclusions.

Concepts of quantum circuits
A quantum circuit works similarly to a classical one.However, it uses its own gates which have to follow several quantum rules.One of them is that all gates must be reversible.That means that knowing the output of a gate (which is a quantum state), must be possible to obtain the previous quantum state.Such a situation is different in classical computers, which have irreversible behavior like the XOR gate.Irreversibility is not possible on quantum computers as the superposition needs to be maintained among the circuit.Quantum circuits could have extra costs in several classical operations if they had to transform non-reversible procedures into reversible ones (Shor, 1999).
Another important issue is the fact that quantum circuits do not allow loops.Feedback from one part of the quantum circuit to another is not possible, so new ways of working should be found in order to solve some classical problems.By the other hand, classical circuits allow joining wires, resulting in a single wire which has the bitwise of the inputs wires.However, this operation is not reversible so it cannot be done on quantum circuits.Moreover, a qubit cannot be duplicated, so copies of a quantum state are not allowed (Nielsen et al., 2017).The value can be copied in several cases.For instance, if a qubit is set to 1, another can be set to 1, but this concept is different from to copy a quantum state.

Quantum gates
Quantum gates are specifically designed to be used in quantum computers.There are quantum gates which perform the same operations than any classical gates, but there are also quantum gates which do not have an equivalent gate in classical circuits.These gates can be seen as reversible matrices, which operate on a qubit or a set of qubits, transforming their initial states into others.This section briefly describes the gates used in this work.

2.1.1
The Pauli-X gate For single qubits, there are three gates, called Pauli gates, which are especially useful and widely used (Williams, 2010).In this work, one of them is used, the Pauli-X gate (shown in Fig. 1).Such gate consists of a 2×2 (2 inputs and 2 outputs) matrix which permutes the computational basis states of a qubit.The Pauli-X gate is the equivalent in quantum terms of the classical NOT gate.Negating a qubit state is more complicated than to negate a bit.However, in this work only the standard bases are used, so it can be seen in a similar way than a classical negation.

A
Ā 0 1 1 0 Fig. 1: Symbol used to denote the Pauli-X gate and its matrix form.

2.1.2
The controlled-NOT gate The controlled-NOT (CN OT ) gate performs an operation with two qubits, a control qubit and a target qubit.Its effect is similar to the Pauli-X on the target qubit, with the difference that if the control qubit takes the value 0 then the target qubit is unaltered (Deutsch et al., 2000).That is, the operation is only performed if the control qubit is set to 1. Controlled gates in quantum circuits are built attaching an identity matrix to the top-left corner of the matrix of the original gate.The gate representation and its matrix form are shown in Fig. 2. The CN OT gate is similar to a generalization of the XOR classical gate (Nielsen et al., 2017).
Fig. 2: Symbol used to denote the CN OT gate and its matrix form.
2.1.3The V and V + gates The V gates were developed in (Hung et al., 2006).
The V gate is a 1×1 gate which applies the operation V = 1+i 2 1 −i −i 1 to the input value.On the other hand, the V + gate (which is also a 1×1 gate) applies the operation . Representations and matrix forms are shown in Fig. 3.Only the standard bases 0 and 1 are used in this work, so there are four possibilities: V (0), V (1), V + (0) and V + (1).The results of each possibility are shown below: Taking into account such possibilities, there are three very important properties that can be derived from the V and V + gates: (1) These properties are widely used in several works in order to simplify and reduce quantum circuits (Thapliyal, 2016, Thapliyal et al., 2009, Maslov et al., 2003).

2.1.4
The Controlled-V and Controlled-V + gates These gates are similar to the previous V and V + gates, but adding a controller qubit as it has been explained in the CN OT gate (Hung et al., 2006).So, such gates are 2×2 gates.They maintain the properties of the V and V + gates, but they can be activated or deactivated using the control qubit conveniently.Their symbol and matrix forms are shown in Fig. 4.
2.1.5The Toffoli gate The Toffoli gate (Toffoli, 1980) is similar to the CN OT gate.However, it has two control qubits.So, the gate only operates on the target qubit if the other 2 qubits are set to 1.If only the standard (orthonormal) basis |0 and |1 are considered, the Toffoli gate can be used to simulate the classical N AN D gate (Fig. 6a) and also to do FANOUT (Fig. 6b) (Nielsen et al., 2017).Taking into account that this work is about integer subtraction, such consideration is always true.However, in any other situation on which |α = β |0 + γ |1 with β = 0 and γ = 0 that is not true due to negate a quantum state is not as simple as to negate a bit.The truth table for the standard basis of the Toffoli gate is shown in Table 1.Nowadays, the design presented in (Thapliyal, 2016) is the most optimized: it uses 2 Controlled-V gates, 1 Controlled-V + gate and 2 CN OT gates.Its symbol and matrix form are shown in Fig. 5. Inputs Outputs i1 i2 i3 o1 o2 o3 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 1 1 1 1 1 1 0

Measures in a quantum circuit
It is necessary to take into account several important factors to analyze a quantum circuit.One of them is the number of involved qubits.One of the most important issues quantum computers must face nowadays is the lack of resources.Qubits are scarce, so it is important to reduce the number of involved qubits.Firstly, the inputs of a problem and also the auxiliary qubits should be reduced to make possible to compute it in a current quantum computer/ simulator.Secondly, the circuit should not have any garbage outputs (that is, qubits which cannot be used at the end of the circuit as it is impossible to know their value), so it is necessary to reverse the outputs which are not useful.Unless these garbage outputs are reversibly removed (uncomputed), such outputs (qubits) cannot be used later, which would result in a waste of resources.If they are entangled with inputs of other circuits, they will produce uncertain results (Nielsen et al., 2017).
In terms of efficiency, the most important parameter is the delay (Thapliyal, 2016).Delay represents the speed of a circuit.Several metrics can be used.One of the most popular metrics is to consider any gate has a unit delay (1 ) (Biswas et al., 2008).Following this metric, a Toffoli gate (which involves five 2×2 gates) has the same delay that a 1×1 Pauli-X gate.In (Mohammadi et al., 2009), a more realistic metric is proposed, where each gate is relatively weighed depending on the size.Such a metric considers the delay of all 1×1 and 2×2 gates to be 1 .Moreover, the delay of a N ×N gate can be calculated as its depth when is designed using 1×1 and 2×2 gates.For example, the Toffoli gate has a delay of 5 as it is conformed by 2 Controlled-V gates, 1 Controlled-V + gate and 2 CN OT gates, and none of them can be computed in parallel with another (Thapliyal, 2016).Furthermore, it defines the concept of Quantum Cost of a circuit as the number of gates with delay 1 which it includes.The Quantum Cost of the Toffoli gate is also 5.
This work considers the metric presented in (Mohammadi et al., 2009).

A half subtractor as a quantum circuit
As it was aforementioned, a half subtractor is a circuit used to compute the subtraction of two digits.In the quantum case, it performs the subtraction of two digits A (the minuend) and B (the subtrahend) using qubits, which are set into the states |0 or |1 , so their values can be considered as a normal bits.There are two outputs: the difference D = A ⊕ B, and the borrow B out = AB.The truth table is shown in Table 2.
Several previous works have approached the design of half subtractors in terms of quantum circuits.Their contributions were focused on reducing the required resources to construct a subtractor circuit and also decreasing the delay of the circuits.As it was mentioned in the previous section, qubits are limited and also the more depth of a circuit is, the more runtime to compute it.Moreover, quantum circuits must be reversible, which can imply that quantum circuits could have extra costs than classical ones to compute some kinds of problems.Due to this limitation, circuits must be optimized in order to avoid waste of resources and to reduce their computation time.
A design of a subtractor was introduced in (Murali et al., 2002).It has a Quantum Cost of 7 and a delay of 7 .It needs two input qubits and a auxiliary one, and it produces no garbage outputs.The design of the circuit consists of 2 CN OT gates and 1 Toffoli gate.The difference D is calculated using only one CN OT gate, and the remaining gates are used to compute the borrow.
Another reversible half subtractor was introduced in (Thapliyal et al., 2009), which improves the previous one.This circuit has a Quantum Cost of 6 and a delay of 6 .As the previous one, it uses three qubits as input (A, B and an auxiliary one), and there are not any garbage output.It implements the half subtractor by benefiting from the described principles of the V and V + gates.
A new reversible half adder/subtractor using R gate was presented in (Montaser et al., 2017).The authors affirm that the quantum cost of this circuit is 4 as they consider each gate as 1 .Due to the fact that it consists of 2 CN OT gates, 1 Pauli-X gate and 1 Toffoli gate, its quantum cost would be 8 (delay would be also 8 ) following the metrics of (Mohammadi et al., 2009).Because this half subtractor can be also used as an adder, so this extra cost is justified.In (Theresal et al., 2015) another half adder/subtractor is presented, with a quantum cost of 7, delay of 7 and 4 inputs.The extra inputs of (Montaser et al., 2017) and (Theresal et al., 2015) are used to switch between addition and subtraction.A similar proposal is presented in (Sarma et al., 2018) with a quantum cost of 5, delay of 5 and 3 inputs.
In (Thapliyal, 2016) was presented the fastest half subtractor currently available.It has a delay of 4 .Moreover, it reduces the quantum cost to 4, maintaining 3 inputs qubits and no garbage outputs.It is an optimized version of the circuit of (Thapliyal et al., 2009), using the design of a new gate called T R as a reversible half subtractor.Such gate is shown in Fig. 7.After (Thapliyal, 2016), (Das et al., 2017) proposed a reversible half-subtractor using a DG gate (Dehgan et al., 2014) and a Pauli-X gate, as it is shown in Fig. 12 of (Das et al., 2017).DG gate has a quantum cost of 5 and a delay of 4 .Adding the Pauli-X gate, the half-subtractor has a quantum cost of 6 and a delay of 5 .(Thapliyal, 2016).

Proposed half subtractor
The T R gate presented in (Thapliyal, 2016) is able to compute the half subtraction with a delay of 4 .This delay cannot be improved as the operations contained in the gate cannot be computed in parallel.Taking into account that the A ⊕ B operation and the first Controlled-V gate cannot be computed in parallel since there are two read operations over the same qubit (simultaneous read operations are not allowed by the rules of quantum mechanics), in this work we have designed a new gate to sort the operations of T R gate, postponing the A ⊕ B operation.This will be extremely useful to reduce the delay.This new gate is called F GE, and it is shown in Fig. 8.
Fig. 8: Quantum implementation of a reversible half subtractor based on a F GE gate.F GE gate has a delay of 4 , the same delay of the T R gate presented in (Thapliyal et al., 2009).
F GE gate has similar Quantum Cost and delay to T R gate.However, it allows to improve the delay if a new auxiliary qubit is added.Steps 2 and 3 of the Fig. 8 cannot be computed in parallel for the same reason as it was mentioned in the previous paragraph.Nevertheless, if the value of A is moved into the new auxiliary qubit Q in the first step, the A ⊕ B operation can be supplied by Q ⊕ B, which can be computed in parallel with the Controlled-V + of the step 2.Then, the obtained circuit, called F GE * , has a delay of 3 .It is necessary to reverse Q avoiding a garbage output, but this can be done in the last step in parallel with the last Controlled-V gate.The circuit of F GE * is shown in Fig. 9.

Evaluation of half subtractor circuits
A full comparison between the studied half subtractors is shown in Table 3 in terms of delay, quantum cost, auxiliary inputs and garbage outputs.This table shows that the proposal presented in (Thapliyal, 2016) is the most competitive among the half subtractor circuits currently available.Focusing on (Thapliyal, 2016), our proposal has two disadvantages.Firstly, the number of gates.The proposed circuit needs two extra gates: one gate to copy the value of A to the new auxiliary qubit, and another to reverse such a qubit.On the other hand, it needs two auxiliary qubits, whereas the circuit of (Thapliyal, 2016) only needs one.However, our proposed circuit shows better results in terms of delay with respect to the other designs of the table.The percentage of improvement of F GE * gate over the remaining designs in terms of delay, quantum cost, auxiliary inputs and garbage outputs is shown in Table 4.The table shows that F GE * implies the use of more quantum gates than (Das et al., 2017, Sarma et al., 2018, Thapliyal, 2016).Moreover, F GE * needs an extra input qubit with respect to (Montaser et al., 2017, Murali et al., 2002, Thapliyal et al., 2009, Das et al., 2017, Sarma et al., 2018, Thapliyal, 2016) to improve the delay.Also, in a similar way to the other approaches, the number of garbage outputs is 0. If we focus our attention in the delay column of Table 4, it can be observed that F GE * overcomes even the fastest one (Thapliyal, 2016).This means that our proposal can be seen as the fastest half subtractor in the literature, and it is the best option when speed is the most important factor to be considered.

Conclusions
In this paper, a quantum half subtractor circuit has been presented, called F GE * .It is a 25% faster than other state-of-the-arts half subtractor circuits.Its depth is only 3 , and it does not have any garbage output.The design of the circuit has been explained and studied in detail.Moreover, a robust metric to evaluate the proposed circuit in comparison to the currently available circuits to compute reversible half subtractors has been followed.

Fig. 3 :
Fig.3: Symbol used to denote the V and V + gates and their matrix forms.

Fig. 5 :
Fig. 5: Symbol used to denote the Toffoli gate and its matrix form.

Fig. 6 :
Fig. 6: (a) A N AN D gate using a Toffoli gate.(b) FANOUT using a Toffoli gate.

Fig. 9 :
Fig. 9: Our proposal F GE * , which is the optimization of F GE gate.It has a delay of 3 .It requires an auxiliary qubit to improve the delay in 1 .

Table 1 :
Truth table of the Toffoli gate.i1/o1 and i2/o2 are the control qubits, and i3/o3 is the target qubit.

Table 2 :
Truth table of a half subtraction circuit.A is the minuend, B the subtrahend, D the difference and Bout the borrow.

Table 3 :
A comparison of the different designs of half subtractor circuits in terms of delay, quantum cost, auxiliary inputs and garbage outputs.

Table 4 :
Rate of improvement of F GE * gate (in %) over the remaining designs, in terms of delay, quantum cost, auxiliary inputs and garbage outputs.