A Novel Superjunction MOSFET with Ultralow Reverse Recovery Charge and Low Switching Loss

— A novel superjunction MOSFET (SJ-MOSFET) for ultralow reverse recovery charge (Q RR ) and low switching loss is proposed and investigated. This device features a P-type Schottky diode and a source field-plate. The P-type Schottky diode consists of Schottky contact and P-base, which is reverse series-connected with body P-N junction diode. And the source field-plate is formed by implementing a polysilicon field-plate electrically coupled to the source, which is on the top of N-pillar. During the reverse conduction state, the P-type Schottky diode is reverse biased, which dramatically suppresses minority carriers injecting into the drift region. Simultaneously, electron accumulation layer formed under the source field-plate, which provides a path for the reverse current. Consequently, compared with the conventional SJ-MOSFET (Conv-SJ-MOSFET), the proposed SJ-MOSFET achieves an 84.0% lower Q RR with almost no sacrifice in other characteristics. Moreover, the proposed device also exhibits 47.4% and 66.0% lower gate charge (Q G ) and gate to drain charge (Q GD ), respectively. The significantly reduced Q G , Q GD , and Q RR contribute to an overall improvement in switching losses and resultant over 54.8% decrease in total power losses with operation frequency higher than 50 kHz, demonstrating great potential of the proposed SJ-MOSFET used in power conversion systems.


INTRODUCTION
The superjunction MOSFET (SJ-MOSFET) is now a dominator in power switch for the voltage range of 500 ~ 650 V [1][2]. By utilizing the charge balance concept, the SJ-MOSFET has broken through the well-known silicon limit for unipolar power devices [3].
However, because of the excess minority carriers in the drift region, its body P-N junction diode suffers from large reverse recovery charge (QRR). This causes high switching losses on the bridge circuit application where the body P-N junction diode is required to conduct in the freewheeling period [4][5]. Lifetime killing processes such as irradiation by electrons, protons or helium and heavy metal doping with gold or platinum are used in most commercial products to reduce QRR [6][7][8]. Nevertheless, these methods tend to cause contamination and degrade both ON-resistance and leakage current. Integrating Schottky diode in parallel with body P-N junction diode is effective in reducing QRR [9][10][11][12]. However, leakage current increases dramatically, and device long-term reliability is weakened. Integrating built-in MOS channel diode has been used to reduce the minority carrier injection of the body P-N junction diode of SJ-MOSFET [13][14]. Unfortunately, the thin oxide or the lowly doped P-base of the MOS channel diode causes an increase in leakage current and steps of fabrication process. Besides, a relatively high QRR still exists to some extent due to the conduction of body P-N junction diode.
In this study, an ultralow reverse recovery charge and low switching loss SJ-MOSFET which features a P-type Schottky diode and a source field-plate is proposed. During the reverse conduction state, the conduction of the body P-N junction diode is dramatically suppressed by the reverse-biased P-type Schottky diode which is composed of Schottky contact and P-base. And an electron accumulation layer under the source field-plate is formed with the augment of reverse voltage, which provides a path for the reverse current. Consequently, the minority carrier injection is suppressed dramatically, leading to a superior reverse recovery performance.
Furthermore, the introduction of source field-plate reduces the area of gate electrode, gate charge is thus decreased, resulting in an improved switching performance.

II. STRUCTURE AND MECHANISM
The schematic cross-sectional structures of the conventional SJ-MOSFET (Conv-SJ-MOSFET) and the proposed SJ-MOSFET are shown in Fig. 1(a) and (b). The proposed SJ-MOSFET is distinguished from the Conv-SJ-MOSFET in the sense that a Schottky contact is introduced on the top of the P-base forming a P-type Schottky diode, and a polysilicon field-plate electrically coupled to the source is implemented forming a source field-plate. It's should be pointed out that the P-type Schottky diode is reverse series-connected with the body P-N junction diode, and the potential of P-base region is clamped by the P-type Schottky diode because the anode of the P-type Schottky diode is connected to the source electrode. In the Conv-SJ-MOSFET, a highly doped P + region is used in the P-base region to suppress the conduction of parasitic NPN transistor (N + source/P-base/ N-pillar), while in the proposed SJ-MOSFET a buried P + layer is used as a replacement.
The simplified circuits of the two studied SJ-MOSFETs are shown in Fig. 1(c) and (d), and the distributions of current in reverse conduction state are shown in Fig. 2. As shown in Fig. 1(d), the P-type Schottky diode is reverse series-connected with the body P-N junction diode, thus the conduction current of body P-N junction diode (IPN) is dramatically reduced by the reverse-biased P-type Schottky diode during the reverse conduction state, which suppresses the injection of minority carrier greatly. Simultaneously, electron accumulation layer under the source field-plate is formed with the augment of reverse voltage, providing a path for reverse current (IM2). Besides, electron accumulation layer under the gate is also formed when VGS = 0 V, conducting partial reverse current (IM1).
Only a small part of the reverse current (i.e., IPN) flows through the body P-N junction diode due to the leakage current induced by the reverse-biased P-type Schottky diode as revealed in Fig 2(b). While in the Conv-SJ-MOSFET, there is no electron accumulation layer formed during the reverse conduction state, coupled with a low turn-on voltage of the forward-biased body P-N junction diode, the reverse current is thus fully conducted by the body P-N junction diode (i.e., IPN) as shown in Fig. 2(a). Because both IM1 and IM2 are majority carrier current, only IPN contains minority carrier current. Hence, compared with the Conv-SJ-MOSFET, ultralow minority carriers in the drift region of the proposed SJ-MOSFET are obtained as a result of the significantly reduced current component IPN, which induces an ultralow QRR and a resultant better reverse recovery performance. Besides, the introduction of source field-plate reduces the area of gate electrode, gate charge is thus reduced, resulting in an improved switching performance.

III. RESULTS AND DISCUSSION
The performance of the proposed SJ-MOSFET is investigated by both single device and mixed-mode simulations using MEDICI [15]. The optimized parameters as listed in Table 1. Unless otherwise specified, oxide thickness under the source field-plate (tox′) is set to 80 nm, which is the same as the thickness of gate oxide (tox), and the Schottky barrier height to P-base (ΦBP) is set to 0.5 eV, which can be realized by aluminum-silicon contact [16].

Schottky contact
Prop.       Fig. 5(b) and (d). Nevertheless, compared with the Conv-SJ-MOSFET, hole current density of the proposed SJ-MOSFET is dramatically reduced since the injection of hole carrier is suppressed by the reverse-biased P-type Schottky diode as shown in Fig. 5(a) and(b), and all the electron current is conducted through the electron accumulation layers, leading to significantly reduced minority carrier density in the drift region.
The Schottky barrier height to P-base (ΦBP) is critical to reverse recovery performance. Fig. 6(a) shows that ultralow QRR and relatively high VF are obtained when ΦBP is higher than 0.4 eV. A higher ΦBP is more effective to reduce the current component IPN by lowering the leakage current of the reverse-biased P-type Schottky diode, and consequently leads to a better reverse recovery. Fig. 6(b) depicts the dependences of minority carrier distributions on ΦBP. The minority carrier density along the depth of N-pillar is sufficiently low when ΦBP is higher than 0.4 eV, leading to an ultralow QRR. An optimized 0.5 eV is used in this study due to its excellent reverse recovery characteristic and process feasibility [16]. Fig. 7(a) shows the tradeoff relationship between VF and QRR with varying oxide thickness of the source field-plate tox′. A smaller tox′ induces a lower reverse turn-on voltage, which increases the current component IM2 and decreases the current components IPN, leading to both lower VF and QRR. Thus, the tradeoff relationship between VF and QRR in the proposed SJ-MOSFET could be significantly improved by decreasing tox′. On the other hand, Fig. 7(b) shows that a smaller tox′ induces a higher peak electric field in the oxide and a larger forward leakage current (IDSS), which is detrimental to the long-term reliability of the device. With tox′ larger Prop. Conv.
Prop. Conv. than 30 nm, the IDSS and peak electric field in the oxide of the proposed SJ-MOSFET is close to those of the Conv-SJ-MOSFET, so tox′ larger than 30 nm is preferred. Additional process steps need to be introduced if tox′ is different from tox, thus in this study, the proposed SJ-MOSFET has identical tox′ and tox of 80 nm, whose QRR is still 84.0% lower than that of the Conv-SJ-MOSFET as labeled in Fig. 7(a).
The influence of carrier lifetime (τ) on QRR and IDSS is depicted in Fig. 8. Obviously, the reduced τ leads to a decreased QRR.
Nevertheless, the reduced τ also results in the augment of the IDSS. Hence, there is a trade-off between QRR and IDSS. Besides, lifetime killing process causes the degradation of ON-resistance, contamination and aging problems [6][7][8]. Thus, the proposed SJ-MOSFET with ultralow QRR and no additional carrier lifetime killing process is a candidate for replacement.
The forward I-V characteristics are shown in Fig. 9(a). Similar static avalanche breakdown characteristics are observed between the two studied devices. Since the forward voltage is supported by the PN junction in the drift region, the introduction of P-base  6 nC/cm 2 and QGD = 53 nC/cm 2 ), reducing by 47.4% and 66.0%, respectively. The reduced gate electrode area accounts for this improvement [17][18][19]. Consequently, compared with the Conv-SJ-MOSFET, the proposed SJ-MOSFET achieves much better figures of merit including 44.7% lower QG • RON and 64.2% lower QGD • RON, which is conducive to improving the switching performance.
The switching characteristics of the two studied devices in the half-bridge circuit application are investigated as shown in Fig. 10(a) and (b), the equivalent switching losses are shown in Fig. 10(c) and the test circuit is shown in Fig. 10(d). It is clearly shown that, compared with the Conv-SJ-MOSFET, the turn-on (EON), turn-off (EOFF) and reverse recovery (ERR) losses of the proposed SJ-MOSFET are reducing by 83.0%, 51.3% and 79.9%, respectively, benefiting from its lower QG, QGD and QRR as shown in Fig. 10(a) and (b). The total power losses of the devices M0 and D0 are composed of the conduction losses and the switching losses, and can be calculated by PM = d × RON ID 2 + f × (EON + EOFF) and PD = d × VF ID + f × ERR, respectively, where d is the duty cycle and f is the switching frequency. The comparison of the total power losses as a function of f between the studied devices is shown in Fig. 11.
Owing to the relatively large conduction losses, the total power losses of the proposed SJ-MOSFET are higher than Conv-SJ-MOSFET when f ≤ 10 kHz. The outstanding switching performance of the proposed SJ-MOSFET becomes appreciable with the augment of f.
When operating under higher f, the total losses of the proposed SJ-MOSFET decreases significantly, reducing by 54.8% ~ 74.4% at 50 kHz ~ 300 kHz with comparison to the Conv-SJ-MOSFET, demonstrating its great potential to boost the operation frequency in power conversion systems, such as uninterruptible power supply (UPS), solar and server [20].   By decreasing carrier lifetime τ, the improved reverse recovery performance of both studied SJ-MOSFETs leads to lower power losses, as depicted in Fig. 12(a). The decreased τ results in significant improvement of the Conv-SJ-MOSFET, nevertheless, its total power losses is still higher than that of the proposed SJ-MOSFET at high f. For the proposed SJ-MOSFET, decreasing tox′ is a better choice to achieve lower power losses. The decreased tox′ results in both lower QRR and VF, thus the improvement is more pronounced as shown in Fig. 12(b).
During the operation of SJ-MOSFET, the conduction of the parasitic NPN transistor (N + source/P-base/ N-pillar) should be completely suppressed. The parasitic NPN transistor may turn on in reverse recovery state or unclamped inductive switching (UIS) state. In the proposed SJ-MOSFET, the reverse recovery current is dramatically reduced, and nearly all of it is majority carrier current, thus it is difficult for the parasitic NPN transistor to be triggered in the reverse recovery state. Besides, with the implementation of a highly doped buried P + layer in the P-base of the proposed SJ-MOSFET, a similar static avalanche breakdown current between the two studied SJ-MOSFETs is obtained as shown in Fig. 9(a). This results in a similar UIS characteristic between the two studied SJ-MOSFETs as shown in Fig. 13, where the parasitic NPN transistor is not triggered when the avalanche current is up to 200 A/cm 2 .

IV. CONCLUSION
An ultralow reverse recovery charge and low switching loss SJ-MOSFET with P-type Schottky diode and source field-plate is proposed and demonstrated by numerical simulations. The simulation results show that the introduction of P-type Schottky diode is effective in preventing the conduction of body P-N junction diode, simultaneously, the electron accumulation layer formed under the source field-plate providing a path for reverse current. As a result, compared with the Conv-SJ-MOSFET, the injection of minority carrier is dramatically reduced and up to 84.0% reduction in the QRR is achieved. Besides, the introduction of source field-plate accounts for the significantly reduced gate charge of the proposed SJ-MOSFET. Hence, benefiting from its lower QRR, QG and QGD, the proposed SJ-MOSFET shows an overall improvement in switching losses. The proposed device also exhibits similar specific ONresistance, static breakdown voltage and dynamic avalanche breakdown. As a result, the proposed SJ-MOSFET shows its great potential used in power conversion systems. to this article. This paper has not been submitted to any other journal, nor been published before. It is the authors' original work. Yun Xia developed the idea of the study, participated in its design and coordination and helped to draft the manuscript. Wanjun Chen contributed to the acquisition and interpretation of data. Zhaoji Li and Bo Zhang provided critical review and substantially revised the manuscript. All authors read and approved the final manuscript. All authors approved the publication of this manuscript in Journal of Computational Electronics.