Load Insensitive , Low Voltage Quadrature Oscillator Using Single Active Element

In this paper, a load insensitive quadrature oscillator using single differential voltage dual-X second generation current conveyor operated at low voltage is proposed. The proposed circuit employs single active element, three grounded resistors and two grounded capacitors. The proposed oscillator offers two load insensitive quadrature current outputs and three quadrature voltage outputs simultaneously. Effects of non-idealities along with the effects of parasitic are further studied. The proposed circuit enjoys the feature of low active and passive sensitivities. Additionally, a resistorless realization of the proposed quadrature oscillator is also explored. Simulation results using PSPICE program on cadence tool using 90 nm Complementary Metal Oxide Semiconductor (CMOS) process parameters confirm the validity and practical utility of the proposed circuit.


Introduction
Nowadays, research in analog signal processing has gone in the direction of low-voltage and low-power design.In addition, many new applications continue to emerge where new analog topologies have to be designed to ensure the trade-off between power and speed requirements.Finally, the modern development towards miniaturized circuits has given a strong and significant enhancement towards the implementation of low-voltage and low-power analog circuits.Ever since the introduction of analog signal processing, the need of new active devices has always been very signifi-cant.Recently, with the increasing demand of lowvoltage and low-power circuits, current conveyors have achieved popularity [1], [2] and [9].With the use of current conveyors, a number of applications can be realized such as: differentiators, integrators‚ impedance simulators, impedance converters‚ biquadratic filters‚ instrumentation amplifiers‚ oscillators, etc.The realizations of oscillators using different variation of current conveyors have received significant attention due to their numerous advantages.In the literature a number of quadrature oscillators based on different active elements are also reported.The quadrature oscillators in [3], [4], [5] and [6] produced voltage-mode signals and the ones in [7], [8], [9], [10] and [11] produced current-mode signals.Although some of the quadrature oscillators in [12], [13], [14] and [15] generated both voltage-mode signals as well as current-mode signals.Moreover, few of them are based on single active element [7], [8], [10] and [15].
The idea behind this paper is to propose a new load insensitive, low voltage quadrature oscillator using a single Differential Voltage Dual-X Second generation Current Conveyor (DV-DXCCII) along with five grounded passive components (three grounded resistors and two grounded capacitors).The proposed circuit design offers many advantages such as the use of single active element, the use of all grounded passive components, operated at low voltage, simultaneous availability of quadrature voltage and load insensitive quadrature current outputs, low active and passive sensitivities and resistorless realization.

Proposed Circuit
Differential Voltage Dual-X second generation Current Conveyor (DV-DXCCII) is an analogue building block [16] which is characterized by Eq. (1).The schematic symbol and CMOS realization of DV-DXCCII are shown in Fig. 1, where the CMOS realization comprises of Differential Voltage Current Conveyor (DVCC), i.e.M 21 -M 30 , with unused Z stages and dual-X second generation current conveyor (DX-CCII), i.e.M 1 -M 20 .In the realization of DV-DXCCII, X terminal of DVCC will drive the Y terminal of the DXCCII.The output terminals Z 1+ and Z 1− are realized from the joint drains of M 14 , M 15 and M 12 , M 20 transistors, respectively.The features of both DVCC [2] and DXCCII [9] are combined together in this single active element.However, additional Z+ stages (Z 2+ and Z 3+ ) have been implemented by taking the extra cascaded structures of transistors (M 31 -M 32 and M 33 -M 34 ).
The proposed circuit of load insensitive, low voltage quadrature oscillator is shown in Fig. 2. The proposed circuit employs a single DV-DXCCII, three grounded resistors, and two grounded capacitors.The proposed oscillator provides two quadrature current outputs and three quadrature voltage outputs simultaneously.Since both the current outputs (I O1 and I O2 ) are directly available at the high output impedance terminals (Z 1− and Z 3+ ) without any load thus the proposed circuit enjoys the benefit of load insensitive current outputs.The characteristic equation of the proposed quadrature oscillator using Eq. ( 1) is given as: Condition of Oscillation (CO) is given as: and the expression of Frequency of Oscillation (FO) is given as: The phasor diagrams for the three quadrature voltage outputs (V O1 , V O2 , and V O3 ) and two quadrature current outputs (I O1 and I O2 ) are shown in Fig. 3(a) and Fig. 3(b), respectively.The three voltage and two current outputs of Fig. 3 are related as: It is apparent from Eq. ( 5) and Eq. ( 6) that all the voltage and current outputs are in quadrature relationship.

Non-Ideal Analysis
By considering the non-ideal voltage and current transfer gains (α i , where i = 1, 2 and β j , where j = 1, 2, 3, 4) of DV-DXCCII, the modified voltage and current terminals relationship can be rewritten as: Here, β 1 and β 2 are the voltage transfer gains from Y 1 and Y 2 terminals, respectively to the X+ terminal.Similarly β 3 and β 4 are the voltage transfer gains from Y 1 and Y 2 terminals, respectively to the X− terminal.α 1 , α 2 , α 3 are the current transfer gains from X+ terminal to Z 1+ , Z 2+ , Z 3+ terminals, respectively.α 4 is the current transfer gain from X− terminal to Z1− terminal.The ideal value of these voltage and current transfer gains is unity depending upon selected operating frequency.
Using Eq. ( 7), the proposed quadrature oscillator is reanalyzed.The non-ideal characteristic equation is obtained as: The non-ideal CO and FO are given as: The active and passive sensitivities with respect to ω 0 are given below Equation (11) shows that the active and passive sensitivities with respect to frequency of oscillation are within unity in magnitude.Therefore, the proposed quadrature oscillator enjoys good active and passive sensitivity performance.

Parasitic Study
The performance of the proposed quadrature oscillator by considering the effects of various parasitic of DV-DXCCII is explored in this section.The parasitic model of DV-DXCCII is shown in Fig. 4, which shows various ports parasitic.These various parasitic are port Y parasitic in the form of R Y //1/(sC Y ), port Z parasitic in the form of R Z //1/(sC Z ), and port X parasitic in the form of R X .It is also worth mentioning that in the non-ideal case the parasitic resistances and capacitances appearing at the high input impedance terminal (Y) and high output impedance terminal (Z) are absorbed into the external grounded resistors and grounded capacitors as they are shunt with them.Thus, all grounded passive components based circuits are more suitable for monolithic integration.Moreover, the parasitic resistances at low impedance terminals (X+ and X−) are negligible (ideally they are zero).The parasitic impedances appearing at the X terminals would be connected between virtual grounds and actual ground and thereby eliminating their effect.However, the circuit with only capacitor at X terminal would show performance deterioration at higher frequencies [17].In practice, to alleviate the effects of the parasitic impedances, the impedances should be chosen as: where: where:

Simulation Results
PSPICE simulations of the proposed circuit of quadrature oscillator of Fig. 2 (a) (a)

Resistorless Load Insensitive, Low Voltage Quadrature Oscillator
In this section, the integration and tuning aspects of the proposed circuit of Fig. 2 have been explored in the form of resistorless realization of load insensitive, low voltage quadrature oscillator.As far as active elements are concerned, its realization in CMOS technology is available.The passive components in form of resistors and capacitors can also be made compatible in CMOS technology [18] and [19].The resistors can be replaced by active-MOS resistors with added advantage of tunability through external voltage [20].The resistorless realization of the proposed circuit of load insensitive, DV-DXCCII low voltage quadrature oscillator is shown in Fig. 7.The resistorless load insensitive, low voltage quadrature oscillator is realized by replacing all the resistors with the two n-MOS transistors based active resistors [20].
The characteristic equation for the resistorless load insensitive, low voltage quadrature oscillator is given as: The CO and FO are found as: All active resistors, R M OSk (where, k = 1, 2, 3) is the equivalent resistance of the n-MOS transistors which is defined as: where k, l = 1, 2, 3, where, µ, C OX , W/L and V t are the carrier mobility, gate capacitance per unit area, aspect ratio of n-MOS and threshold voltage.
Next, the resistorless quadrature oscillator is designed for frequency 55 MHz.The transistor aspect ratios for the MOS based active resistors are selected as

Conclusion
A novel load insensitive, low voltage quadrature oscillator has been presented in this paper.The proposed circuit consists of single DV-DXCCII as active element and all grounded passive components, which is ideal for IC implementation.The proposed circuit of quadrature oscillator provides three quadrature voltage outputs and two quadrature current outputs simultaneously from the same configuration.The proposed quadrature oscillator also offers good active and passive sensitivities.Furthermore, the resistorless realization of the proposed circuit is also explored.Simulations results are given to support the presented theory.

where, R Y 1
, and R Y 2 are the parasitic resistances and C Y 1 , and C Y 2 are the parasitic capacitances at the Y 1 and Y 2 terminals, respectively, R Z1+ and R Z2+ are the parasitic resistances and C Z1+ and C Z2+ are the parasitic capacitances at the Z 1+ and Z 2+ terminals, respectively, and R X+ and R X− represent the parasitic resistances appearing at the X+ and X− terminals, respectively.
have been performed using the CMOS realization of DV-DXCCII of Fig. 1(b) with 90 nm CMOS parameters as given in Tab. 1.The dimensions of MOS transistors used in DV-DXCCII are given in Tab. 2. The supply voltages and bias voltage are taken as ± 1 V and V BB = −0.4V, respectively.Therefore, the proposed circuit is benifitted with the feature of low operating voltage.The proposed circuit of quadrature oscillator is designed at frequency of oscillation of 39.8 MHz by choosing the passive component values as C 1 = 1 pF, C 2 = 2 pF, R 1 = 4 kΩ, R 2 = 2 kΩ and R 3 = 2 kΩ.The frequency of oscillation as obtained from simulation is 39.63 MHz which is 0.42 % in error with the designed value.The three voltage outputs and two current outputs along with their Fourier spectrums are shown in Fig. 5 and Fig. 6, respectively.Total Harmonic Distortion (THD) is found to be within 1 %.
re voltage outputs (b) Fourier spectrum at 39.63MHz.