Realization of OFCC based Transimpedance Mode Instrumentation Amplifier

The paper presents an instrumentation amplifier suitable for amplifying the current source transducer signals. It provides a voltage output. It has a high gain, common mode rejection ratio and gain independent bandwidth. It uses three Operational Floating Current Conveyors (OFCCs) and four resistors. The effect of nonidealities of OFCC on performance of proposed Transimpedance Instrumentation Amplifier (TIA) is also analyzed. The proposal has been verified through SPICE simulations using CMOS based schematicThe paper presents an instrumentation amplifier suitable for amplifying the current source transducer signals. It provides a voltage output. It has a high gain, common mode rejection ratio and gain independent bandwidth. It uses three operational floating current conveyors (OFCCs) and four resistors. The effect of nonidealities of OFCC on performance of proposed Transimpedance Instrumentation Amplifier (TIA) is also analyzed. The proposal has been verified through SPICE simulations using CMOS based schematic.


Introduction
The Operational Floating Current Conveyor (OFCC) [1], [2] is a versatile active building block which provides flexibility to the circuit designer.It inherits the features of current conveyor and the current feedback op-amp with additional current output terminal.The availability of both high and low impedance ports at input and output provides flexibility to circuit designer.
An Instrumentation Amplifier (IA) is invariably used as an input block in applications such as automotive transducers [14], industrial process control [15], [16], [17], linear position sensing [18] and bio-potential acquisition systems [19], [20], [21], [22], [23], [24] to amplify differential signals and to suppress unwanted common mode signals.Generally the operational amplifier based IA are classified as Voltage Mode IA (VMIA) whereas current mode building block based IA are referred as Current Mode IA (CMIA).Another way to classification is based on the type of input and output signal on which IA is working.The Transimpedance IA (TIA) is one among such classification where the sensed current is amplified and converted into a voltage.There is limited literature available on TIAs [25], [26], [27], and no OFCC based TIA is available in open literature to the best of author's knowledge.The details of available TIAs are comprehended in Tab. 1 according to the number and type of active and passive elements used along with the impedance presented at input and output.The following points are observed from Tab. 1: • The opamp based topology [26] uses excessive number of resistors.
• The input impedance is low for [27] which is ideal for current sensing whereas a high input impedance is presented for [25], [26].
• The output impedance of [26], [27] is proper i.e. low in contrast to the one provided by [25].
Tab It is clear from the above discussion that only topology [27] provides proper input and output impedance levels and does not require additional circuitry for impedance matching.
The aim of this paper is to present an OFCC based TIA offering proper input/output interface.It uses three active blocks and four resistors i.e. same number of active blocks as [27] and the lesser passive components than [27].Both input and output impedances of proposed topology are low.
The paper is organized in five sections as follows: Section 2. briefly discusses the basic characteristics of OFCC and detailed description of proposed TIA structure.Section 3. describes behavior of proposed TIA in presence of nonidealities.The simulation results are presented in Section 4. followed by conclusions in Section 5.

Proposed Circuit
The key component of the proposed circuit is the OFCC block as shown in Fig. 1.It has two inputs (X, Y) and three outputs (W, Z+, Z-).
The port X is a low impedance current input while the port labeled Y is a high impedance voltage input.The ports Z+ and Z-are high impedance current outputs, where Z+ has positive polarity and Zhas negative polarity.The terminal marked W is the low impedance output voltage terminal.The terminal characteristics of the OFCC are characterized by the matrix given in Eq. ( 1): where open loop transimpedance gain Z t is impedance between the ports X and W and other symbols have their usual meanings.
Figure 2 shows the proposed TIA circuit.It consists of three OFCCs and four resistances.The third OFCC block in Fig. 2 is simply used as a current to voltage convertor which converts the amplified difference of currents that has been received as an input to OFCC1 and OFCC2, into voltage.The differential transimpedance gain of the instrumentation amplifier for an ideal case is computed as follows.
The currents (i w1 , i w2 ) flowing out of W terminals of OFCC1 and OFCC2 respectively, are: The output voltage is computed as: Using Eq. ( 4), the differential gain (A d ) is obtained as: c 2016 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING

Non Ideal Analysis
Practically, there are two kinds of OFCC non-idealities.The first type of nonidealities comes from tracking errors between port voltages and currents and their effect depend strongly on topology.As the Y terminal in proposed topology is grounded the performance is unaffected due to voltage tracking errors.Considering the current tracking error, the currents at Z+ and Zterminals are represented as: where α and γ are non ideality constants.
Therefore, Eq. ( 4) modifies to: Assuming α = γ = 1 in Eq. ( 8) the differential gain (A d ) is written as: Considering i in1 = i in2 = i cm in Eq. ( 8) for common mode operation, the common mode gain (A cm ) is obtained as: Therefore the CMRR of the final circuit is: The second nonideality comes due to finite transimpedance gain Z t and its frequency dependence which is approximated as Z t = 1/(sC p ) at high frequencies.The value of C p is (Z to ω tc ), where Z to and ω tc represent open loop transimpedance gain and its cut off frequency respectively.
Considering finite Z t , Eq. ( 4) is recalculated as Assuming 1 (s) = 2 (s), differential gain is calculated as: where and is uncompensated error function.
Taking i in1 = i in2 = i cm the common mode gain is given by: Therefore the CMRR becomes:

Simulation Results
The CMOS based OFCC implementation [12] as shown in Fig. 3, is used for verifying functionality of proposed TIA.The transistor aspect ratios are given in Tab. 2. SPICE simulations are carried out using supply voltages of ±1.5 V and bias voltages of ±0.8 V.The simulated differential gain response of the proposed TIA is depicted in Fig. 4 for R G = 1 kΩ, R 1 = 5 kΩ and R 2 is varied from 1 kΩ to 3 kΩ in step of 1 kΩ in order to obtain different gains.The CMRR frequency response is shown in Fig. 5.It may be noted that CMRR is independent of gain and has a bandwidth of 112 kHz. Figure 6 shows the noise spectral analysis of the proposed TIA using the same component values as those taken for obtaining differential gain response.It is observed that the output noise level has small magnitude.The power consumption of the proposed OFCC based TIA is found to be 1.5 mW.

Conclusion
In this paper, an OFCC based TIA is presented and simulated.The circuit requires only three OFCCs,   three feedback resistors and one grounded resistor.It works with current mode of input in order to produce an amplified output without using complex designs.The AC analysis proves the efficiency of this new circuit and the huge bandwidth it possesses.The proposed topology offers advantages over the existing operational amplifiers based TIAs, in terms of a wider bandwidth that stays independent of the finite open loop gain of the TIA.The proposed circuit also offers low component count as compared to the existing OTRA based design.

Fig. 5 :
Fig. 5: CMRR of the proposed TIA for different gain values.

Fig. 6 :
Fig. 6: Noise spectral density for different values of gain.
Tab. 2: Characteristics of available instrumentation amplifiers.Fig. 4: Frequency response of the proposed TIA.