Compherensive Design of a 100 kW / 400 V High Performance ACDC Converter

In this paper, a comprehensive design for a 100 kW/400 V, three-phase pulse-width modulated (PWM) AC-DC converter is presented that serves as the front-end power supply for wide-range varying active load. This power supply includes two series stages; a six-switch AC-DC boost converter and a DC-DC buck converter to regulate 400 VDC at load side. The design of all inductors and capacitors is fulfilled using mathematical expressions. In addition, small signal modelling and controller design are presented in order to raise the design efficiency of the proposed converter. Also, due to the high power application, improved softswitching techniques are applied. Furthermore, systematic approach to design an input EMI filter for DCDC converter is explained. The simulation results performed by PSCAD software show that high performance of the proposed power supply is obtained in terms of stability, high power factor, high efficiency and low total harmonic distortion (THD).


Introduction
Three-phase AC-DC electric power conversion is widely employed in diverse applications such as adjustablespeeds drive, uninterruptible power supplies, HVDC systems, etc. [1], [2], [3].Conventionally, AC-DC converters known as rectifiers are developed using diodes and thyristors to provide uncontrolled and controlled DC power.They have poor power quality, low power factor, high THD and low efficiency.Besides, they need large size of AC and DC filters.Nowadays, it is a common concern to use converters which provide reduced size, high power factor, high efficiency, low THD and well controlled DC voltage to present flexible system operation.Therefore, with the advent of new solid-state self-commutating devices such as IGBTs, MOSFETS, GTOs, etc., new converters are known as switch-mode rectifiers (SMRs), power factor correctors (PFCs), PWM rectifiers, multilevel and multi-pulse rectifiers [4], [5].
Appropriate modeling and control of PWM converters are increasingly being regarded in high power applications.As design of inductors and capacitors in power converters are based on the requirements of application, proper analytical expressions should be fulfilled.Also, in most cases of converters' controller design, there are two steps: selection of modulation strategy, which corresponds to open-loop control, and design of dynamic closed-loop control.Therefore, development of converters' small signal models is the best well-known approach to design proper controller [6], [7], [8].
High-power converters suffer considerably from low switching frequency due to the high switching losses.Thus, adverse control bandwidth and large passive components are achieved by low switching frequency.On the other hand, since high switching noise is more intense in high power converters, soft switching techniques are the best options to improve switching noise as well as switching frequency.In high power converters, zero-current-transition (ZCT) technique is a pleasing method, where the IGBTs are power devices [9], [10].The topology of the presented 100 kW/400 V AC-DC converter is shown in Fig. 1.It includes two stages: a six-switch AC-DC boost converter equipped with soft switching technique in series with a soft switched DC-DC buck converter.The proposed converter is connected to a three-phase, 50 Hz utility grid with V rms = 220 V.This paper is organized as follows: Section 2. gives mathematical expressions to design passive components of the proposed topology which are essential to extract converters' small signal model and then to design controller.Section 3. presents theoretical expressions to design auxiliary circuits of improved soft switching techniques for both stages.Also, Section 4. includes the details of designed EMI filters for DC-DC buck converter.Simulation results are shown in Section 5. .Finally, in Section 6. the conclusion is drawn.

Small Signal Modelling and Controller Design
In this section, firstly passive components of both AC-DC boost and DC-DC buck converters are designed based on the requirements of the presented application.Then, small signal models of both converters are extracted to design proper controllers.

1) Six-Switch AC-DC Boost Converter
To obtain optimal value of boost inductor and DC-link capacitor, single-input-single-output (SISO) model of six-switch AC-DC boost converter by separating the daxis and the q-axis dynamics is used [11].Being nonminimum phase as an inherent feature in mentioned converter is revealed by a simple right-half-plane zero (RHPZ) in the small signal control-to-output transfer function v dc (s)/ d(s).The desirable performance of converter is largely affected by RHPZ which completely depends on the boost inductor value.Since the location of the RHPZ is closest to imaginary axis in the complex s-plane under the worst operating conditions, the main aim is to design boost inductor to achieve favorable performance.On the other hand, the value of DC-link capacitor depends on the value of the boost inductor.High values of boost inductors results in low values of DC-link capacitors.Thus, there is a tradeoff between selection of boost inductor and DC-link capacitors. of the system in the synchronous rotating d-q frame are as follows: where e d and e q are source voltages and i d and i d represent the input currents in d−q frame.Also, the control inputs v d and v q are related to the d dc by Eq. ( 4).
where u d and u q are switching functions.Decoupling of i d and i d in Eq. ( 1) and Eq. ( 2) is achieved by defining v d and v q as Eq.(5).
c 2015 ADVANCES IN ELECTRICAL AND ELECTRONIC ENGINEERING In normal conditions, the term v q2 i q can be ignored, due to zero value of i q created by control system.By substituting 6) and Eq. ( 8), small signal and dc models can be written as Eq. ( 9), Eq. ( 10), Eq. ( 11), Eq. ( 12) and Eq.(13).
Therefore, small signal model of Fig. 2 in d-axis frame is shown in Fig. 3. Equation (12) and Eq. ( 13), express the relation between V dc and I d with steady state duty cycle D, R L , R dc and E d .Using Eq. ( 12), the minimum and maximum amount of output voltage is provided by D min = 0 and Therefore, the boundaries of V dc can be defined by Eq. (14).
The output-to-control transfer function v dc (s) d s is calculated based on Fig. 3 as following.
To calculate boost inductor value, suppose that the voltage drop across the inductor at full load is x % of the source voltage E d , and then using Eq. ( 16) the value of L is obtained.
In Eq. ( 16), to have real values for L, the term under radical must be positive.Thus, voltage drop on the boost inductor has a minimum value presented in Eq. (17).
Also, the value of D in Eq. ( 16) can be acquired by quadratic Eq. ( 18) obtained from Eq. ( 12).
To solve Eq. ( 18), the constraint ∆ ≥ 0 must be satisfied.Consequently, the value of boost inductor resistance has a maximum value given in Eq. ( 19).
To dictate desirable performance to the proposed converter, the capacity od DC-link capacitor is selected such that corner frequency (f p ) of complex poles in the transfer function v dc (s) d(s) to be approximately three of four times less than the frequency of RHPZ.The complex poles of Eq. ( 15) which are as and damping factor ξ written by Eq. ( 20) and Eq. ( 21).
Therefore, Eq. ( 22) gives the value of C.
In this paper, the reference output voltage for sixswitch AC-DC boost converter is considered V dc = 650 V. Therefore, for R dc = 4 Ω and E d = 311.1 V, the maximum permissible value of boost inductor resistance is R L ≤ 0.343 Ω. Suppose that R L = 0.1 Ω, then D max = 0.74 or D min = 0.26.Also, using Eq. ( 18), D can be found as (2600)D 2 −(2488.8)D+173.33 = 0 ⇒ D = 0.88.Consequently using Eq. ( 17), the minimum acceptable value of x would be 8 %.Finally, considering x = 12 %, the designed value of boost inductor by Eq. ( 16) is L = 350 µH.With this inductor value, the frequency of RHPZ is 485 Hz.Considering f p = f RHP Z /3 and R C = 0.1, the selected value for C would be 860 µF.

2) DC-DC Buck Converter
Evaluating DC-DC buck converter circuit in Fig. 4 during time intervals 0 < t ≤ DT (position 1, switch on) and DT < t ≤ T (position 2, switch off), the maximum peak-to-peak ripple current of inductor L is as follows [12]: where T is switching period, D is duty cycle, f S = 100 kHz is switching frequency and V O = 400 V is converter output voltage.
The minimum inductance required to maintain the continuous conduction mode operation for the duty cy- cle with the range of [D min , D max ] is given by Eq. ( 24).
where R 0max corresponds to the lowest level of converter load which is considered to be 1.5 kW.The peakto-peak ripple voltage is independent of the voltage across C and will be determined only by the ripple voltage across the equivalent series resistance if Eq. ( 25) is satisfied.
Usually, V r is allowed to be 1 % of output voltage.In the proposed topology, the input and output voltage of the buck converter is set to be 650 V and 400 V, respectively.Therefore, considering 100 V input voltage ripple and 90 % efficiency, minimum and maximum value of duty cycle is as: Suppose, r c = 0.1 Ω, finally, the obtained minimum values for inductor and capacitor of buck converter are 217.6 µH and 40.35 µF.In this paper, selected passive components for DC-DC buck converter are 250 µH and 100 µF.

1) Six-Switch AC-DC Boost Converter
The first step to design a proper controller for AC-DC converters is the extraction of differential equations in the d-q frame to form converter's average model.Then, small signal analysing should be fulfilled to obtain converter's small signal model.Next, various transfer functions should be calculated using small signal model.The control method used in this paper is based on the reference [6]. Figure 5 shows standard control scheme of the converter in d-q frame.Therefore, Eq. ( 27), Eq. ( 28) and Eq. ( 29) which represent the average model of a six-switch AC-DC boost converter based on line-to-line quantities are used to small signal modelling.
where i d , i q are line-to-line currents, d d1 , d q1 are duty cycles in d-q frame, V d is input line-to-line voltage in d-axis and V ref is desired output voltage.In these equations, cross-coupling between i d and i q currents is reduced by term  27), Eq. (28) and Eq. ( 29), small signal and dc models are written by Eq. (30), Eq. (31), Eq. (32), Eq. (33) and Eq.(34). (30) (31) After small signal modelling, in this control method two main transfer functions l q (s) ) should be acquired.According to Fig. 5, the first transfer function is used to design a PI controller for power factor correction.The designed gains for PI controller are K P =40 and K i =1 • 10 5 .The second transfer function is obtained to design voltage compensator.Equation (35) and Eq.(36) represents the main transfer functions.
Figure 6 illustrates the control diagram used to design current and voltage compensators.The control gains are determined in a way that control loops in Fig. 6 present stable performance with adequate phase and gain margins.In this paper, a three-pole one-zero compensator (H V (s)) is used to regulate output voltage.
The gain K V should be sufficiently large to have proper phase margin.On the other hand, to have fast transient response, Z V is determined based on Eq. (38).
Also, pole P V is relatively placed close to Z RHP after the crossover frequency, which leads to proper damping and gain margin in control system.In addition, l q (s) to compensate the effect of capacitor equivalent series resistance.All control gains of designed controller for three different levels of output power are depicted in Tab. 1. Tab

2) DC-DC Buck Converter
A typical way to generate small signal model of DC-DC converters is the state-space description, which writes the differential equations that describe the converter [8].Generally, the state equations of a system can be written in the compact matrix form of Eq. (39).
Considering Fig. 4 as our system, x(t) is a vector containing 39) is written with index "1" when switch is on, and with index "2" when switch is off.Afterward, Eq. (40) and Eq.(41) represent small signal model of the system. where In these equations, D is steady state duty cycle and D = 1 − D. The value of state vector and output variables in steady state are as follows: The small signal circuits of analyzed DC-DC buck converter is shown in Fig. 7.
Fig. 7: Small signal model for a non-ideal DC-DC buck converter.
To control the DC-DC buck converter, the main should be calculated based on Fig. 7, while v g = 0 and i load = 0. Therefore, the best option for compensator seems to be a PID controller presented by Eq. (44).

Soft-Switching Techniques
As in high power converters hard-switching techniques produce high switching losses and intense conductive EMI, soft-switching techniques draw more attention in this regard.It is well known that in high power converters where power switches are IGBTs, ZCT techniques are attractive.Thus, in this section two different improved ZCT (IZCT) techniques are presented for both stages of proposed topology.

IZCT Technique for Six-Switch AC-DC Boost Converter
Figure 9 shows one leg of IZCT circuit implemented for phase a.It includes two main switches (S 1 and S 2 ), two auxiliary switches (S 1x and S 2x ) and one LC resonant tank (L x and C x ).In this circuit, not only each phase leg has an independent soft switching, but also voltage stresses across all devices are preserved to the level of DC-link voltage [9].
In Fig. 9, the relationship between main switches and corresponding auxiliary switches is diagonal.It means S 1x is turned on and turned off S 1 is going to be turned on.Also, S 1x has another similar operation when S 1 is turned off.The gating method of both main and auxiliary switches is clearly depicted in Fig. 10.In order to design LC resonant tank using Eq. ( 45), three steps should be performed to obtain the values of T 0 and Z 0 .
First, normalization factors such as maximum DClink voltage (V dcm ) and maximum phase current (I Lm ) are determined and normalized quantities are written as: , where I L is phase current, V dc is voltage of DC-link and Z 0 is resonant tank impedance.Second, in order to achieve soft switching operation, parameter k of f should satisfy Eq. ( 46).
The value of Z 0 and k of f is determined by Eq. ( 46).In the third step, parameter T 0 is determined by Eq. (47).
where T of f is device dependent and it should be more than main IGBT current fall time (i.e.0.8 µs).Afterward, the pulse width of auxiliary switches in on/off operation can be set by Eq. ( 48), where k of f is equal to k of f when V dcn =1 and I Ln =1.
In this paper, the value of maximum DC-link voltage and line current are V dcm = 650 V and I Lm = 240 A. Then, by designing resonant tank in this load level, we can write . On the other hand, from Eq. ( 46) the maximum value of Z 0n is 0.833.Suppose Z 0n = 0.6, thus, other parameters can be found as following:

IZCT Technique for DC-DC Buck Converter
The scheme of IZCT for a DC-DC buck converter is shown in Fig. 11.This method includes an active snubber cell that is specifically suitable for IGBT-based PWM converters at high power and high frequency levels [10].The converter with active snubber cell can successfully operate under different load levels.To design a suitable resonant tank (L r and C r ), the following steps for maximum load current are considered.First, resonant inductor and capacitor are chosen to let the resonant current peak (I RM ) be twice the maximum load current; therefore, Eq. (49) should be satisfied.
In the second step, L r and C r are selected such that the one half resonant cycle t R to be equal to twice the fall time of the main IGBT.Thus, Eq. ( 50) is met.
After designing resonant tank of active snubber cell, auxiliary switch is gated by a signal with the width equal to inverse of main switch pulse.But, according to Fig. 12, it should be delayed by T D .
Mathematical analysis of the converter circuit demonstrated in Fig. 11, shows that the value of T D is about a quarter resonant cycle.As in this paper the maximum value of output power is 100 kW, consequently the value of I Omax is equal to 250 A. Therefore, using Eq. ( 49) we can write Also, the second equation to find suitable values for passive components in active snubber cell using Eq. ( 50) is:

EMI Filters for DC-DC Buck Converters
It is always essential to provide EMI filters at the input and output of switching converters.Input EMI filters not only attenuate the switching noises but also protect converter and its load from input voltage disturbances [8].Also, output EMI filters are provided to attenuate high-frequency DC voltage ripples at load side.

Input EMI Filter Design
By attenuating high-frequency input currents, input EMI filter in a DC-DC converter can limit the variation of input impedance; consequently, it can provide us with the opportunity to connect a DC-DC buck converter at load side of an AC-DC converter.Due to the wide variation of DC-DC converters' input impedance, without input EMI filters an instability in the control system can occur by the connection of DC-DC converters in series with AC-DC one.Although by adding EMI filters the former problem can be solved, a new problem appears; the input filters change the dynamic of the converters and it leads to instability of the control system again [8].Considering Fig. 13 when input filter is added, the new transfer function of converter (G vd (s)) is calculated by Eq. ( 52) and Eq. ( 53).
The term G vd (s)| zO (s) = 0 is the original control- The topology of the used filter in this paper is presented in Fig. 14.The standard values of R f and C b are 1 Ω and 4700 µF.These values completely satisfy above constraints.For proposed topology, the inequalities Eq. ( 54) can be rewritten as general form of Eq. (55).On the other hand, since Z O has the highest value in its corner frequency and Z i has the value in the corner frequency of Z D , the constraint Eq. ( 55) may be insufficient; therefore, to have the correction factors close to unity, constraint Eq. (56) should be also met.
The bode diagram of input impedances of designed DC-DC buck converter is drawn in Fig. 15.The minimum value for Z i is 2.8 Ω or 8.91 dB at ω 0 =5320 rad•s −1 .Therefore using inequality Eq. (55), we can write L f < 7.84 • C f .In addition, from inequality Eq. ( 56) following expression can be concluded.L f C f ≥ 14300 • 10 −12 .Therefore, to design input EMI filter different values can be considered to satisfy above constraints.In this paper, C f =470 µF and L f =330 µH are selected.

Output EMI Filter Design
In order to reduce high-frequency voltage ripples in output side, the use of one-stage low-pass LC filters of Fig. 16 is recommended [13].The corner frequency of this filter should be significantly lower than the converter switching frequency.Usually, the Eq. ( 57) is regarded in the design of output EMI filters.
In this paper, the corner frequency of filter is arbitrarily set 3 % of the switching frequency.Thus, as a typical solution, the value of capacitor C f o is equal to 56 µF for an available inductor 50 µH.It should be mentioned that in this IZCT technique the circulating energy is minimal, because one half resonance occur during operation of S 1 .In order to show the performance of the proposed converter in terms of designed controller, Fig. 20  Figure 22 presents network side features.The symmetrical line currents with 0.6 % THD which are received from three-phase network is shown in Fig. 22(a).This low value of THD is obtained using Eq. ( 58) by having proper pattern of space vector modulation and applying it to the first stage of the proposed converter.
Also, high power factor close to unity can be found from Fig. 22(b) because boost controller forces iq to be zero in any time.It should be noted that, loss calculations prove that without any IZCT technique, maximum efficiency is approximately 91.5 %, while using IZCT techniques for both converter stages, it increases to 97.5 %.

Conclusion
In this paper, comprehensive planning process of a PWM AC-DC converter which supplies 100 kW load under 400 VDC is presented.The proposed converter which is supplied with a 381 Vrms three-phase network has two stages, a six switch AC-DC boost converter and a DC-DC buck converter.To have favourable performance of proposed converter, suitable controllers should be designed through exact small-signal modelling of both stages.Also, to overcome high switching losses and high EMI noises in this application due to the high load level, improved soft-switching techniques are appropriately designed and used.On the other hand, an input EMI filter is provided for DC-DC buck converter to attenuate high-frequency currents received from boost stage.This filter is an essential circuit which makes possible the connection of buck stage to boost one.In addition, since in most applications an extra filter is designed to damp high-frequency voltage ripples, in this paper a proper output EMI filter is determined at load side of the proposed converter.As simulation results indicate, soft switching techniques in conjunction with proper PWM techniques and power factor correction control loop ensure high-performance operation of presented converter in terms of efficiency, power factor and THD.

Fig. 5 :
Fig. 5: Standard control scheme of six-switch boost converter in d-q frame.

Fig. 6 :
Fig. 6: Control diagram of (a) current and (b) voltage loops for a six-switch AC-DC boost converter.

400 ns π 2 = 6 .
48 • 10 −14 .Therefore, the value of resonant tank inductor and capacitor and the time delay required for control of auxiliary switch are: L r = 330 nH, C r = 200 nF, T D = 0.4 µs.

Fig. 13 :
Fig. 13: Adding an input EMI filter to a converter.

Fig. 15 :
Fig. 15: Bode diagram of Z i and different input EMI filters.

Fig. 16 :
Fig.16: The connection of a low-pass filter to a DC-DC converter.

Fig. 17 :
Fig. 17: Waveforms of IZCT technique in boost converter, voltage and current of resonant tank with main switches current over one switching time period, a) isa < 0, b) isa > 0.
, Fig. 21 and Fig. 22 are shown.The DC-link voltage of boost converter with the reference value of 650 V and also the terminal voltage of six-switch PWM converter are shown in Fig. 20(a) and Fig. 20(b), respectively.The output load changes from 100 kW to 50 kW at 0.2 s and then to 1.5 kW at 0.4 s.As it can be seen, fast transient response and desirable steady state error are achieved by suitable controllers which were designed in previous sections.The control strategy used in this paper to stabilize the control system of proposed converter is based on switched control strategy [14].Several linear controllers are determined on different operating points of the converter, and an extra controller is considered to operate under a special switching law.This extra controller switches corresponding linear controller based on the specification of operating point or output load measurement.The voltage and current at load side are shown in Fig. 21 under three different load levels.As mentioned before, the stability of control system is guaranteed by implementation of switched control strategy.But, designed buck converter does not need to this strategy.Because, by setting high gain in buck converter controller it can remain stable against load and input voltage variations.Figure 21(b) shows the effect of output EMI filter on the output voltage by attenuating high-frequency voltage ripples.

FigFig. 22 :
Fig. 21: a) The voltage and current at load side, b) output voltage with and without filter.