Simulation of a single dopant nanowire transistor

Abstract

Nowadays the silicon technology is capable of delivering sub-10 nm devices where ‘every atom counts’. Manipulation of atoms with high precision on such a scale, in principle, can lead to technological innovations, such as transistors with extremely short gate length, quantum computing components and optoelectronic devices. One possible strategy to create this next generation of devices is to precisely place individual discrete dopants (such as phosphorous atoms) in a nanoscale transistor.

In this paper, we report a systematic study of quantum transport simulation of an impact that precisely positioned dopants have on the performance of ultimately scaled gate-all-around silicon nanowire transistors (SNWT) designed for digital circuit applications. Due to strong inhomogeneity of self-consistent electrostatic potential, afull 3-Dreal-space Non Equilibrium Green’s Function (NEGF) formalism is used. The simulations are carried out for an n-channel NWT with a 2.2 x 2.2 nm² cross-section and a 6 nm channel length, where locations of precisely arranged dopants in the source drain extensions and in the channel region have been varied. The individual dopants act as localized scatters and, hence, impact of electron transport is directly correlated to the position of the single dopants. As a result, a large variation in the ON-current and modest variation of the subthreshold slope are observed in theI_D-V_G characteristics when comparing devices with microscopically different discrete dopant configuration. Introducing of channel surface roughness in the Ch Sym 1 wire induces a threshold voltage shift and ON-current variation in the device due to scattering. The variations of the current-voltage characteristics are analyzed with reference to the behaviour of the transmission coefficients. Our calculations provide guidance for a future development of the next generation components with sub-10 nm dimensions for the semiconductor industry.