FOUR PHASE INTERLEAVED BOOST CONVERTER-ANALYSIS AND VERIFICATION

This paper deals with an analysis of four phase interleaved DC-DC converter for higher power application in continuous conduction mode. The interleaved topology is widely used due to their advantage as lower input current ripple which means volume reduction of input capacitor. The current ripple equation of an input current for the boost operation mode and the ripple current in individual phases of the interleaved converter using uncoupled inductor are shown. The theoretical equations are supplemented by the simulation results using Spice simulator and by measurement on the interleaved converter.

The interleaved topologies are frequently used for following applications, such as an active PFC filter for improvement of electromagnetic compatibility [7] - [9]. The next advantage is present in VRM application in the motherboard of a personal computer, where the output voltage is about 1 V, but output current is several tens of amperes [10]. The high output current can be divided into several channels of the multiphase converter without using power devices with higher current ratings, which leads to decreased power losses. Another advantage is a highfrequency operation for the input current, but the switching frequency of power devices is n-times lower for the n-channel interleaved converter. For achievement of the same current ripple, it is possible to use smaller inductors in comparison to classical converter but the transient response of the interleaved will be faster, and therefore the dynamics will be better. The abovementioned properties and many others contribute to the increase of the power density [1], [4].
The multiphase converter also has several disadvantageous, such as more active and/or passive components and complexity of the control algorithm. Currently, the microprocessors or digital signal controllers are powerful, and this disadvantage is irrelevant. Therefore, in this paper, the advantageous features of the interleaved topology will be analysed on four phase boost DC-DC converter. The motivation for preparing this article is utilizing of the converter as an interface between batteries or supercapacitor and a three-phase inverter for an AC motor drive system in Electric Vehicle (EV) [4], [6], [11] - [15]. This paper is divided as follows: Firstly, the theoretical analysis is investigated for different operational mode depending on the value of the duty cycle. The switching interval is accordingly divided into four intervals. In addition, the equation of the inductor current ripple and input current ripple are given in this part. Secondly, the simulation analysis will be performed to compare current ripples with a calculated value. And finally, the measured data of the input current ripple and inductor ripple will be given proportionally as a ratio of input current ripple to inductor current ripple. The theoretical, simulated and measured ratio will be plotted in a graph.
The purpose of the paper is to examine operating mode of the converter with the lowest input current ripple comparing to inductor currents and then determine the proper range of duty cycle.

ANALYSIS OF FOUR-PHASE INTERLEAVED BOOST CONVERTER
The inductor ripple currents of the four-phase interleaved boost converter depicted in Fig. 1 are analyzed in this section. Based on these currents is calculated an input current ripple as a sum of them. These characteristics are analyzed separately for operation modes because the applied voltages depend on ranges of the duty ratio D ≤ ¼, show the inductor current waveforms for duty ratio less than ¼, between ¼ and ½, ½ and ¾, and greater than ¾, respectively, where S 1 , S 2 , S 3 and S 4 are switching signals; i 1 , i 2 , i 3 and i 4 are the inductor currents; I 1pp , I 2pp , I 3pp , and I 4pp are the peak to peak amplitudes or current ripples of the i 1 , i 2 , i 3 and i 4 , respectively and i in are the input current, which is the sum of four inductor currents.
Here, the equations for inductor current ripples are investigated and they are given for D ≤ ¼. The equation (1) determines an increasing character of the inductor current where V in and V out are the input and output voltages of the interleaved converter, D is the duty ratio, and L is the inductor value in Henrys. Similarly, the equations for another interval of the duty ratio ¼ ≤ D ≤ ½ are as follows: The value of the input current is increased until two switches in two different phases are in on-state; in the all next states of the switches, the input current has a decreasing character, as can be seen in Fig. 3. In the third interval ½ ≤ D ≤ ¾, when three switches are in on-state the inductor current is increasing and therefore the input current is also increasing. When only two switches are in on-state, the input current is decreasing, which is shown in the following equations and depicted in Fig. 4  As can be seen from the previous figures the frequency of the input current ripple is four times higher as compared to the inductor current what yields to reduced current ripple. If we look at equations (1) -(20) the current ripples are dependent on the value of V in or V out , duty ratio D, inductor value L and switching period T S . However, the ratio of I inpp and I npp (n = 1,2,3 or 4 is the number of the phase) is only dependent on the duty ratio D. Therefore, in the next chapter is analysed only relative value of input current ripple and inductor current ripple.

EXPERIMENTAL VERIFICATION
The test stand depicted in Fig. 6 consist of 8 switches converter, four non-coupled inductors, power analyser, power supplies and electronic load. The control algorithm of the converter was only in open loop and PWM signals for driving transistors was implemented by the TI microcontroller TMS320F28069M. The parameters of the converter stand are given in Table 1. According duty ratio and load The input or output voltage of the converter was not so important because investigating characteristic of current ripple ratio does not depend on these parameters. Also the converter stage was not optimized for efficiency measurement; the investigation was only oriented to determine a current ripple in different conditions.  Then, from simulation results (Fig. 9) and measurement ( Fig. 10) is seen that the ripple of the input current is not zero, but in comparison to its dc component as shown in Fig. 9 should be considered as zero.
Therefore, also the measured ratio around duty cycles 0.25, 0.5 and 0.75 should be considered as zero. Then, Fig.  13 shows the comparison of the theoretical, simulated and measured ratio of input current ripple to inductor current ripple within whole range of duty cycle.   The ratio of input current ripple to inductor current ripple From Fig. 13 is seen that a preferable range of duty ratio is approximately from 0.2 to 0.8, which is sufficient for almost all areas of use of boost converter.
The increasing of duty ratio causes that the dc component of current is also increasing, what is associated with increasing of AC component (the ripple) of the current. Then, in Fig. 13 states that not the ripple of the inductor current or the input current is shown, but only the ratio between them.

CONCLUSION
The four-phase interleaved boost converter operated in the continuous inductor current mode was analysed. Generalised expressions for the input and inductor current ripple were given in the theoretical part. Subsequently, the simulation and experimental results in the steady-state operation was examined. The comparison of theoretical, simulation and measured results is plotted in a graph. According to the graph, the optimal operation of the converter is around the duty ratio of 0.25, 0.5, 0.75. In these time instants, the ripple of the input current is theoretically zero, but in practice is approximately zero. On the other side, while maintaining operating condition of the converter, the reduced inductor current ripple depends only on the value of L and therefore, if the ripples should be smaller the inductor value must be higher.
In the future work the determination of input and output capacities, determination of the optimal number of phases and phase shedding of the unloaded phases will be analysed.