Advanced control of split source inverter through finite control-set model predictive control for improved system performance

Distributed power generation systems may necessitate connecting multiple independent energy sources that employ various converter topologies. A recent development in this field is the emergence of impedance source converters, offering the ability to deliver buck-boost functionality within a single stage. The split-source inverter (SSI) has been introduced as a novel choice in between this family. Many control strategies have emerged for electrical power systems control. Among the recent emerging controllers, model predictive control strategies have become an effective technique for control systems. Model predictive controllers (MPCs) offer a number of features compared to the conventional and counterpart models such as enhanced system response and improved system transients with reduced steady-state error. This research suggests a finite control-set MPC for three-phase single-stage SSI supporting a standalone load for remote area applications. Considering the proposed FCS-MPC, the output load current tracks its reference magnitude with minimized error. In addition, the proposed FCS-MPC enhances the proposed SSI system performance with a settling time of 10 μs, and approximately without overshoot in the output current. The system has been validated using Opal-RT OP-4510 and the power loss model of the inverter has been explained. In the end two comparisons have been presented to clarify the main points in the topology structure and the control technique.


Introduction
In numerous DC-AC power conversion setups, the incoming DC voltage is less than the peak value of the required AC output voltage.Consequently, the exploration of boost DC-AC power converters has become an increasingly pivotal domain within power electronics implementations.A prominent characteristic of traditional DC-AC power conversion systems is their prevalent use of two-stage topologies, wherein the initial stage commonly employs a DC-DC converter to elevate the voltage across the DC-link of an H-bridge [1][2][3].Nevertheless, these dual-stage configurations exhibit a noticeable drawback, leading to reduced efficiency and widespread power losses throughout the DC-DC converter and the DC-AC inverter.Consequently, substantial initiatives are underway to improve overall power efficiency, with a primary focus on enhancing the performance of the first-stage DC-DC converter [4].Current research attention has shifted towards the development of single-stage configurations instead of persistently refining two-stage structures.This emerging trend has led to the introduction of various single-stage setups characterized by enhanced efficiency and increased compactness.As an illustration, one proposal suggests the utilization of two back-to-back bidirectional boost DC-DC converters, sharing a common DC source and producing an AC output based on the voltage difference between the outputs of the converters [5,6].
On the other side, the Z-source inverter (ZSI) represents a distinct single-stage architecture achieved by integrating an impedance network into the DC-link [7].In its role as a buck-boost stage, this inverter employs an impedance network comprising four passive components and a diode for power transfer.Alternative topologies deviate from the conventional approach in the circuit configuration and switching strategy [8][9][10][11].However, a common drawback is shared among existing impedance networks.These networks entail a considerable existence of passive energy storage elements, including capacitors and inductors.Additionally, they exhibit drawbacks such as the essential need for an extra state beyond the eight switching states to charge certain passive elements and the occurrence of discontinuous input current.
Recently, a novel single-stage boost DC-AC configuration, known as the Split Source Inverter (SSI), has gained prominence owing to its compact design, evolving nature, standard switching state and minimal requirement of the DC-link capacitor and the boosting inductor, as depicted in Fig 1 .Initially introduced in [12], the SSI evolved into a three-phase setup in subsequent works [13] becoming a notable research trend and garnering further examination in [14,15].Various adaptations have since emerged.In [16], for instance, the two input diodes in the single-phase topology depicted in Fig 2 were substituted with two MOSFETs to address high-frequency commutation issues and facilitate bidirectional power flow.In [17], the input boosting circuit was replaced with a configuration featuring two common cathode diodes, minimizing parasitic inductance in the commutation pathways.A simplified version of the single-phase SSI was introduced in [18] to diminish the number of switches and the output filter requirements.Exploring three-level operation, [19,20] introduced the use of a flying capacitor bridge to diminish inductance requirements while maintaining the same switching frequency, while [21] employed a diode-clamped bridge to alleviate current stresses in the switches.Addressing grid-connected mode control, reference [22] examined the SSI's DC side and proposed an adjusted modulation approach conjugated with the widely adopted synchronous reference frame control approach for a decoupled control strategy.Moreover, [23,24] suggested enhancing the boosting capability of the SSI by substituting the standard inductor with a switched inductor.
The SSI offers many advantages that can solve its alternative problems as follows; • Uninterrupted input current and DC link voltage.
• Capability of operation considering various modulation techniques.
• Decreased number of switching states as the VSI.
• Reduced quantity of passive components.
• In contrast to the typical VSI, there is no requirement for extra active switches or gate drive circuitry.
• Achieving high voltage gain while taking into account reduced voltage stress on components.
Previous alterations are employed from a topological viewpoint, although only a handful of studies have investigated the control method.In [25], the standard sinusoidal pulse width modulation (SPWM) was utilized for controlling the SSI.However, the traditional SPWM proved ineffective in regulating the SSI because of low-frequency oscillations on the DC side caused by the inductor being charged and discharged into the capacitor with a changing duty ratio [17].In this research, the finite control-set MPC (FCS-MPC) is used to regulate the single-stage three-phase SSI.The MPC utilizes the capabilities of a system's model to forecast future behavior.The discrete character of power electronics converters is well suited for FCS-MPC, which can also handle multivariable systems and nonlinearities [26,27].Some other benefits of MPC include strong performance in following up the reference magnitudes of the controlled parameters as well as the ability to control and incorporate several variables in the cost function with their own multiplicity limitations.Nevertheless, it comes with constraints such as the need for numerous complicated computations, which extends the process's execution time and results in overrun issues.The fast speed of modern digital controllers like FPGA and DSP boards limits this issue.The MPC approach has been incorporated into the ZSI family, as demonstrated in [28], and applied to the qZSI as elucidated in [29][30][31].
This research presents a three-phase SSI under FCS-MPC control for supporting standalone loads in remote area applications.The suggested control approach facilitates a comparison between the anticipated magnitude of the input and output currents for the SSI with their respective reference values for each switching state, which is amalgamated into a unified cost function.The control action is specified depending on minimizing the distinction between the projected and reference values for the two variables-the input current and the output current.The research also introduces a power loss model for the three-phase SSI structure to clarify the efficiency and the power loss distribution of the topology.The power loss model is analyzed to ensure the ability to utilize the topology in the industrial applications.In addition, the paper compares the structure and its alternatives to ensure its validity from the topological side.Another comparison has been introduced to clarify the advantage of the utilized control approach compared with its alternatives.
As a result, the significant contributions of this manuscript can be summarized as follows: • A suitable FCS-MPC algorithm is developed to control the SSI system under a step-change condition.
• A power loss and efficiency model are presented to demonstrate the effectiveness of the proposed structure for industrial use.
• Two comprehensive comparative analyses are provided, confirming the superiority of the proposed topology over recently published single-stage topologies, as well as the advantages of the proposed controller over conventional ones.
The paper's organization is outlined as follows: Section 2 covers the operation, mathematical calculations, the load current and inductor current model, the reduction of the cost function, and the control algorithm.Section 3 explains the power loss model of the system.Section 4 presents real-time validations of the proposed system considering the FCS-MPC, then presents two comparative studies to point out the advantages of the inverter structure and the control approach.Ultimately, section 5 concludes the presented work in the paper.

A. The converter operation
Similar to the traditional VSI, the three-phase SSI topology contains eight potential switching states, as outlined in Table 1

B. Mathematical model of the SSI network
The switching states can be stated in vector form by the following expression, where The vector representation of the output voltage V i can be obtained from this equation where V C is the DC-link voltage and i = (0: 7).Thus, the output voltage is as follows, Eight switching states are produced as a result of considering all conceivable combinations of the gating signals S u , S p , and S v as well as eight voltage vectors as described in Fig 4 and Table 2.
The inverter may be modeled as a linear system by utilizing modulation methods such as PWM.Nevertheless, the inverter is treated as a nonlinear discrete system with eight distinct output states.

C. Load current model
Considering standalone RL-load, the balanced three-phase currents can be described by space vectors as follows, Therefore, the load current dynamics can be stated in the following form, where L and R are the load inductance and resistance respectively.

D. Discrete time model
The measured voltage and current at the k th sample instant may be utilized to estimate the forthcoming magnitude of the load current by employing the discrete-time form of it in (5) for a sampling time T s .By estimating the derivative di out dt using the Euler approach, di out ðkÞ dt ¼ i out ðkÞ À i out ðk À 1Þ T s ð6Þ by substituting (6) in ( 5), the subsequent formula for the future load current is obtained: by extending the discrete time one step ahead in (7), it is possible to determine the future load current by, The (α, β) coordinate system is used to represent the predictive variables' preceding variables.The generated reference signals for the load currents are derived from the output power.The absolute disparity between the reference currents and the anticipated current is then fed to the proposed FCS-MPC for cost function minimization.

E. Inductor current model
As stated earlier, the inverter has two main states that lead to two different inductor models.
During the charging state, it can be expressed as follows, where i l is the input inductor current.
The future inductor current is described by the discrete time form as follows: During the discharging state, it can be expressed as follows, Hence, the future prediction of inductor current can be represented in discrete time:

F. Cost function reduction
The absolute discrepancies between the anticipated values and the reference values are utilized to generate the cost function g(i).Each error receives a weight factor λ according to priority ranking of importance, and the cost function is shown as, where l i L and l i out are the weighting factors for the inductor and output currents, respectively.i L ref is the reference inductor current, i out α_ref and i out α are the real component of the reference output current and actual output current, where i out β_ref and i out β are the imaginary components of the reference and actual output currents, correspondingly.In the beginning, the cost function is supposed to be infinity.The reference magnitudes of the output and input currents are generated according to the required power.The three phase values are sampled and a cycle, that predicts every voltage vector, evaluates the cost function.Then, the algorithm stores the minimal magnitude of the cost function and the index value of the associated switching state can be used to execute the minimization of it.The inner clause in the cycle to distinguish between the charging and discharging states, the chosen switching state is applied in the end.

G. System control algorithm
The entire system configuration, including the suggested control system, is portrayed in Fig 6 .Obviously, it includes four current sensors, one for the input current, three for the output current, and a voltage sensor for the DC-link voltage.The control system processes the control signals from these sensors along with reference value calculations to make decisions for the power circuit.

Power loss model
The converter experiences primary losses from its switches, primarily attributable to switching and conduction.At low switching frequencies, conduction losses are more prominent, whereas at high frequencies, switching losses gain greater importance.For an IGBT paired with a reverse diode, both of them incur conduction losses as a result of their on-stated resistance and on-stated reverse voltage.These particular variables can be retrieved from the whereas T represents the fundamental cycle, β is the constant associated with the transistor, and i(t) denotes the current flowing through either the transistor or the diode.The complete conduction losses are declared as; Switching losses refer to the power dissipation occurring in each switch and diode while they are ON or OFF stated.These losses are calculated for each single switch or diode, then enlarged to cover the provided number in the envisioned inverter.Presuming a straight-line change in voltage and current during ON and OFF durations, the lost energy for a switch can be developed as: whereas E on and E off represent the energy lost throughout the turn-on and turn-off durations, t n and t f correspond to the durations of ON and OFF states, respectively.Additionally, V s denotes the voltage on the switch prior or next transition periods, and I represents the current pass through the switch prior and next the transition periods.The complete switching losses can be articulated as: whereas N MO signifies the available amount of MOSFETs in the inverter, and n th is the switch number.The switching losses in diodes are disregarded since diodes are treated as devices capable of soft-switching.
The mean overall losses of the inverter is

A. Real-time validation
The real-time validations of the suggested FCS-MPC for the SSI inverter system have been carried out using Opal-RT OP4510 powered by MATLAB SIMULINK, which supports a standalone load.The proposed SSI system design is shown in Table 3, where the system is powered by a DC input source of 50 V, DC-link capacitor of 510 μF, and the inductance of the input inductor equals 3 mH.In the boosting network, the inductor inductance is set to a high magnitude to enable the inverter to work in Continuous Conduction Mode (CCM), which refers to a condition where the current in the inductor remains non-zero throughout the intervals between switching cycles that prevents the power from being zero in any instance.CCM is used for confirming a continuous low ripple input DC current, which is suitable for numerous renewable energy implementations, including PV systems and fuel cell applications.Both the MPC algorithm and the proposed inverter are developed using MATLAB/Simulink and RT-LAB block sets.The interface components establish a connection between the host PC and OP4510, enabling communication from OP4510 to the oscilloscope.initially simulated using MATLAB/Simulink, followed by its execution on the OP4510 workstation.By monitoring the data processing performed by OP4510, the results are then transferred to the oscilloscope.The visual representation of the system is depicted in Fig 8 .The system is examined with an output load of 0.5 kW then stepped-up to be 1 kW to delve the dynamic performance of the suggested control approach.The former step-change is achieved by stepping the output current from 6 A to 8 A, as depicted in

B. Comparative study
This section presents two comparative studies.The first, which is illustrated in Table 4, is to contrast the topological structure of the suggested inverter with its alternatives.The used structures in the comparison are Boost Converter with VSI (BC+VSI), Z-source Inverter (ZSI), Switched-inductor ZSI (SL-ZSI), Switched ZSI, quasi-ZSI (q-ZSI), Switched-capacitor-inductor Active Switched Boost Inverter (SCL-ASBI), Switched Boost Inverter (SBI).The comparison items are number of stages, number of input diodes, number of input capacitors, number of input inductors, shoot-through states requirement, number of input switches, and DC voltage gain.The comparison highlights the proposed structure's superiority in terms of passive component count, obviating the need for shoot-through states and ensuring a minimal number of switches, with being single-stage topology.The second comparative study, which is illustrated in Table 5, compares three control approaches while evaluating the SSI with the proposed control approach.The control approaches are PI with PR, PI decoupled, and peak power controller.The comparison elements are Switching frequency, modulating

Conclusion
The MPC has been implemented on the three-phase SSI, which is completely reliant on the discrete-time model of the system.The proposed technique has controlled the output current and the input inductor current, which have been incorporated into a single cost function.The system modeling has been presented in detail.The system has been validated using the Opal-RT system.The dynamic response results illustrate that The control method exhibits extremely rapid responsiveness in following the reference signals, whereas the settling time of the output current is approximately 10 μs.The power loss model, efficiency profile, and power loss distribution of the system have been presented.Two comparisons have been presented to indicate the benefits of the proposed structure concerning the number of passive elements, eliminating the necessity for shoot-through states and guaranteeing a minimal switch count, all attributable to its single-stage topology.The comparison also indicates the proposed control technique in its swift dynamic response, uncomplicated implementation, power output excellence, and the exclusion of the modulating stage.

Fig 2 .
Fig 2. Single-phase SSI.https://doi.org/10.1371/journal.pone.0305138.g002 , and Fig 3, which are separated into two primary states: • Charging state: When any of the lower switches ( � s u ; � s p , or � s v ) is enabled, the inductor L charges by the DC source as illustrated from Fig 3A to Fig 3F.• Discharging state: The inductor discharges into the capacitor with the DC source when all the lower switches are concurrently disabled, as illustrated in Fig 3H.

Fig 5
Fig 5 illustrates the flowchart of the proposed control algorithm based on FCS-MPC.As depicted in Fig 5, the three-phase output current and the input current are sensed at the instance k.In the beginning, the cost function is supposed to be infinity.The reference magnitudes of the output and input currents are generated according to the required power.The three phase values are sampled and a cycle, that predicts every voltage vector, evaluates the cost function.Then, the algorithm stores the minimal magnitude of the cost function and the index value of the associated switching state can be used to execute the minimization of it.The inner clause in the cycle to distinguish between the charging and discharging states, the chosen switching state is applied in the end.The entire system configuration, including the suggested control system, is portrayed in Fig 6.Obviously, it includes four current sensors, one for the input current, three for the output current, and a voltage sensor for the DC-link voltage.The control system processes the control signals from these sensors along with reference value calculations to make decisions for the power circuit.

Fig 6 .
Fig 6.The block diagram of SSI based on MPC with RL load.https://doi.org/10.1371/journal.pone.0305138.g006 Fig 7 displays the comprehensive block diagram depicting the real-time operation.The complete system is

Fig 9 ,
where one phase output current and its reference signal are magnified for a clear illustration.The zoomed part of Fig 9 shows the dynamic response of the FCS-MPC.The system achieves a settling time of 10 μs, and approximately without overshoots.This obviously demonstrates that FCS-MPC exhibits an exceptionally quick reaction time.Fig 10 shows the three-phase output current and illustrates the symmetry in the ripple of the three signals.Fig 11 shows the three-phase output current as depicted on the oscilloscope monitor.Fig 12 shows the input current compared to its reference signal and verifies the high dynamic response for MPC with 100 μs settling time, and Fig 13 shows them on the oscilloscope screen.Fig 14 shows the line voltage after the step response, and Fig 15 shows it on the oscilloscope screen.Fig 16 shows the DC-link voltage.The total harmonic distortion of the output current has been analyzed and depicted in Fig 17, the THD value clearly demonstrates the adequacy of the structure in producing power outputs of high quality.Furthermore, the power loss distributions of the proposed inverter have been analyzed by applying the former equations considering various load conditions and at each switching state.The averaged power loss and efficiency curves of the proposed inverter are illustrated in

Figs 18
Figs 18 and 19, successively.The power loss distributions for the topology are detailed in the pie chart of Fig 20.

Table 5 . Comparison of four control techniques while evaluating SSI.
Fig 21 illustrates the DC voltage boosting factors for each topology, which is reported in the first comparative study.