Suspended gallium arsenide platform for building large scale photonic integrated circuits: Passive devices

The spectacular success of silicon-based photonic integrated circuits (PICs) in the past decade naturally begs the question of whether similar fabrication procedures can be applied to other material platforms with more desirable optical properties. In this work, we demonstrate the individual passive components (grating couplers, waveguides, multi-mode interferometers and ring resonators) necessary for building large scale integrated circuits in suspended gallium arsenide (GaAs). Implementing PICs in suspended GaAs is a viable route towards achieving optimal system performance in areas with stringent device constraints like energy efficient transceivers for exascale systems, integrated electro-optic comb lasers, integrated quantum photonics, cryogenic photonics and electromechanical guided wave acousto-optics.

The spectacular success of silicon-based photonic integrated circuits (PICs) in the past decade naturally begs the question of whether similar fabrication procedures can be applied to other material platforms with more desirable optical properties. In this work, we demonstrate the individual passive components (grating couplers, waveguides, multi-mode interferometers and ring resonators) necessary for building large scale integrated circuits in suspended gallium arsenide (GaAs). Implementing PICs in suspended GaAs is a viable route towards achieving optimal system performance in areas with stringent device constraints like energy efficient transceivers for exascale systems, integrated electro-optic comb lasers, integrated quantum photonics, cryogenic photonics and electromechanical guided wave acousto-optics.
The scale, complexity and performance of silicon photonic integrated circuits (PICs) has revolutionized optical communications in the past decade 1 . Perhaps the most surprising aspect of this revolution is the fact that silicon does not possess many desirable optical properties (apart from a high refractive index) and the silicon photonics revolution was primarily driven by the availability of a foundry fabrication infrastructure, courtesy of the microelectronics industry, that could be applied to optics [2][3][4] . Over the past two decades, a wide variety of component designs have been optimized and their fabrication process perfected for silicon 5 and it is hard to foresee a similar investment of resources in any other material platform. On the other hand, there are a number of application areas in which silicon's lack of desirable optical properties proves a severe limitation to achieving system performance. These limitations include the absence of a direct bandgap, lack of a χ (2) nonlinearity to build fast electro-optic devices and zero piezoelectric response which makes it challenging to design acousto-optic devices. As a representative example, one of the key challenges facing transceivers for exascale systems 6 is avoiding the ∼ 3 dB penalty for coupling light from the III-V laser die to the silicon PIC. Electro-optic frequency comb 7 based coherent communication systems 8 will also benefit greatly from monolithic integration of lasers and modulators. On the quantum photonics side, one of the outstanding problems facing linear optic implementations of quantum computing is implementing feed-forward routines on a chip 9 , which requires (monolithically) interfacing fast, low loss modulators with efficient single photon detectors. Despite the outstanding performance improvements of carrier based depletion modulators, electro-optic modulators present the only near-term solution that can satisfy both the bandwidth (∼ 40 GHz) and loss requirements (< 3 dB) necessary for scalability 10 . Other application areas where alternative material platforms are worth exploring are: cryogenic photonic circuits for interfacing superconducting digital circuits with the outside world 11 and integrated acousto-optics, which requires a piezoelectric material for exciting acoustic waves 12-14 . a) Electronic mail: krishna.coimbatorebalram@bristol.ac.uk Gallium arsenide (GaAs) presents a viable alternative to silicon for these applications as it possesses all the desirable optical properties that silicon lacks: a direct bandgap, a χ (2) nonlinearity, and a (weak) piezoelectric coefficient 15 . More importantly, GaAs has a refractive index that is almost identical to silicon (λ = 1.55 µm), making it easy to port a variety of optimised photonic designs and fabrication process flows between the platforms. In contrast to other electro-optic platforms like lithium niobate, it has a higher refractive index allowing compact component design, which is key to monolithic systems integration. GaAs also provides a natural route towards incorporating active gain media like quantum dots and wells, which are promising for applications in both classical and quantum 16 photonics. Traditionally integrated photonics in GaAs has suffered from the low index contrast achievable between GaAs and the AlGaAs buffers which serve as waveguide cladding layers. The low index contrast leads to large mode sizes and bend radii which make photonic integration challenging 15 . In addition, the reduced optical power density (due to larger mode area) makes it difficult to adequately exploit the nonlinear coefficients for frequency conversion and EO modulator applications 17 . In recent years, there has been tremendous progress in the development of thin films of GaAs on low index media (particularly silicon oxide and nitride) by wafer bonding 18 and a wide variety of devices showing impressive nonlinear performance have been demonstrated [19][20][21] . On the other hand, wafer bonding is wellknown to be a notoriously fickle process and it is challenging to get high device yields (a prerequisite for building PICs) in an academic cleanroom environment.
In this work, we show that a multi-step fabrication process, derived from a standard passive silicon photonics platform 22 , can be applied to build large scale photonic integrated circuits in suspended GaAs. The suspension of the GaAs layer, achieved by selective etching of the underlying AlGaAs film, is necessary to achieve high refractive index contrast 23 . By moving to a tethered rib waveguide geometry and judicious choice of etch release holes, all the components of a standard (passive) PIC platform, in particular grating couplers, waveguides, ring-resonators and waveguide splitters (multi-mode interference couplers), can be adapted to the suspended GaAs platform without compromising performance efficiency . The arXiv:1912.05301v1 [physics.app-ph] 10 Dec 2019 passive devices reported in this work serve as a key building block for the development of active devices, in particular, efficient integrated electro-optic and acousto-optic modulators, which are currently under development. Figure 1 shows a schematic illustration of the main process steps for a grating coupler fabricated using this process. The process starts by patterning the grating coupler teeth and defining the outline of the waveguides and the tethers (GRAT-ING etch) in GaAs ( Fig. 1 (a)). The patterning is carried out using electron beam lithography with hydrogen silsesquioxane (HSQ) resist and the GaAs layer is etched using a standard Ar/Cl 2 chemistry with etch thickness monitored using an ellipsometer to ensure precise etch depths are achieved. This is followed by a RIB etch step ( Fig. 1 (b)), where the GaAs layer is etched a further 50 nm to define the rib waveguides. The grating coupler region is protected with HSQ resist during this step. The two layers are registered with respect to each other using a set of alignment marks defined during the GRATING etch step. A FULL etch step is next carried out by etching the remaining 100 nm of the GaAs layer (+ 20 nm overetch) to access the AlGaAs buffer as shown in Fig.1(c). To suspend the GaAs layer, the AlGaAs buffer is selectively etched in dilute hydrofluoric acid (HF) solution. To remove any remnants of etch residue, the sample is cleaned in a dilute potassium hydroxide solution and flash dried using isopropanol 24 . A cross-section of a suspended GaAs rib waveguide fabricated in this platform is shown in Fig.2(a). A zoomedout SEM image of the rib waveguide suspended by tethers is shown in Fig.2 (b). The normalized total electric field of the fundamental transverse electric (TE) mode, calculated using a numerical mode solver (COMSOL Multiphysics), is overlaid for reference. The high refractive index of the GaAs layer ensures that the mode is mainly confined to the rib region, with very little leakage into the surrounding GaAs or the Al-GaAs buffer. By designing rib waveguides with waveguide width ∼ 540 nm and total rib width ∼ 6 µm, we can ensure that the optical field has negligible overlap (η ov ) with the remaining AlGaAs buffer layer and is tightly confined within the GaAs waveguide. The choice of the rib width was mostly determined by the difficulty of suspending wider GaAs devices on account of the lack of intrinsic stress in the GaAs layer. As mentioned before, the high refractive index allows us to work with smaller rib widths without sacrificing performance (waveguide loss). More importantly, it allows us to design compact, low loss suspended waveguide bends with bend radii ∼ 25 µm in this work, and the prospect of achieving bend radii ≈ 5 µm. After HF release, the suspended GaAs film is capped with ∼ 2 µm of silicon oxide deposited using plasma enhanced chemical vapor deposition (PECVD). The oxide film is necessary for separating the metal electrodes (required for the electro-optic devices) from the GaAs layer. In addition, they provide mechanical rigidity to the suspended films by pinning them at the corners of the etch holes (shown by the red box in Fig.3(b)). To test this rigidity, we performed a stress test by placing the chip (in isopropanol) in an ultrasonic bath at full power for > 10 minutes. After removal from the bath, the chip showed no signs of weakening or structural damage, which ensures that it can survive later processing, critical for active devices. We are able to land fiber arrays on the GaAs chip without noticable structural damage to the devices during optical characterisation. The mechanical rigidity is key for enabling the deposition of thick metallic electrodes for active devices and provides great benefit from a packaging perspective, which is especially critical for cryogenic operation. The standard set of passive design components available as part of a standard silicon photonics process development kit (PDK) are low-loss waveguides, grating couplers (GC), resonators and on-chip waveguide splitters and combiners. Amongst these, the grating coupler is probably the most important component, as it serves as the interface between the PIC and the outside world. A compact low-loss grating coupler is indispensable for large scale PICs as it allows in-situ device characterisation, without the need for chip-cleaving. Traditionally, GaAs based devices have relied on edge coupling as it is challenging to design efficient grating couplers when the index contrast between the core and cladding is low. While compact free space grating couplers have been optimized by the quantum dot community 25 , their coupling effi-ciency is low and they are not suitable for building large scale PICs. On the other hand, efficient out-of-plane grating couplers have long served as the de-facto standard in the silicon photonics community. Fig.3(a) plots the measured fiber-fiber transmission spectrum of a grating coupler test structure that consists of two grating couplers linked by a suspended ridge waveguide. The device was probed using a fiber array angled at 12 deg. The separation between the couplers is 127 µm and the waveguide bends have a radii of 25 µm. An SEM image of our suspended GaAs focusing grating coupler is shown in the inset of Fig.3(a). The grating coupler is supported using tethers, defined during the GRATING etch step. The high refractive index of GaAs allows us to keep the light confined to the central region (t GaAs = 220 nm) and efficiently focus it into the rib waveguide. The critical fabrication step in suspending a grating coupler is ensuring that all of the GC is released during the wet etch step. This is ensured by providing release holes both to the side and rear of the GC, as can be seen in the inset. The grating coupler design is modified from the standard silicon designs to account for the difference in surrounding refractive indices and thicknesses. In the suspended GaAs devices, the underside cladding is air and the topside cladding is silicon dioxide. This helps reduce the insertion loss, as the guided wave is more effectively scattered towards the higher index side (the top oxide) towards the fiber, rather than towards the substrate. The main parameters affecting the coupling efficiency are the grating period (Λ), etch depth (d), duty cycle (η), and thickness of the AlGaAs cladding layer. For λ = 1550 nm, the design parameters used are Λ = 660 nm, d = 70 nm, η = 0.5. The peak fiber to fiber coupling efficiency is ∼ -8 dB at ∼ 1550 nm, which amounts to ∼ 4 dB insertion loss per coupler. One of the key parameters that affects the optimal coupling efficiency is the gap between the GaAs device layer and the substrate, which is determined initially by the AlGaAs thickness. The starting AlGaAs thickness of 1.5 um lies at the bottom of the coupling efficiency curve and any reduction in the spacing between the GaAs membrane and the substrate will improve that number. As can be seen from a zoomed-in cross-section SEM image of the waveguide in Fig.3(b), the deposition of the top cladding oxide loads the membrane making it sag. This lowers the gap between the membrane and the substrate and ends up increasing the coupling efficiency. From our cross-section SEM images, we currently estimate the bottom gap to be ∼ 1.3 µm.
To build scalable PICs, it is critical to have the ability to split and recombine light. Linear networks of waveguide splitters form a key building block for optical implementations of quantum information processing 26 , deep neural networks 27 and optical phased arrays 28 . A 2x2 multimode interference coupler (MMI) is the standard building block that underpins these linear networks. Fig.4(a) shows an SEM image of 2x2 MMI fabricated using the suspended GaAs platform and based on a standard silicon foundry design 22 . A zoomed-in image of the same device is also shown. The measured transmission spectrum of the best-performing MMI is shown in Fig.4(b). The plot shows the transmitted power from the two output ports (labelled by red and magenta arrows in the inset microscope image). The grating coupler transmission spec-  Fig.  3(a)), without the MMI, is shown in blue. A microscope image of the complete MMI with the input and output ports labelled is shown in the inset. trum from Fig.3(a) is overlaid for reference. From Fig.4(b), it is clear that the excess insertion loss introduced by the MMI (over the 3 dB due to power splitting) is negligible and these devices can be used to effectively split and re-combine light on a GaAs chip, exactly analogous to silicon. Like with the grating coupler, the high index contrast of GaAs enables us to port these designs from silicon to the GaAs platform with minimal re-design. The MMI devices also give a sense of the the scale and complexity of the devices that can be engineered. As silicon photonics and before it silicon microelectronics have shown, once a set of robust building blocks have been demonstrated, circuits of arbitrary complexity can be synthesized by connecting these building blocks together in the desired order.
The final component of the passive devices toolkit for suspended GaAs photonics are microring resonators. High quality factor dispersion engineered microring resonators have served as the foundation of a variety of experimental advances in photonic sensing, frequency combs and on-chip generation of single photon pairs by spontaneous four wave mixing 29 . Fig.5(a) shows an SEM image of a suspended microring resonator fabricated using this platform. The ring radius is 25 µm and the waveguide resonator gap was designed to be 325 nm. Fig.5(b) shows the measured transmission spectrum of the resonator showing a series of TE resonances. The TE mode selectivity is determined by the polarisation selectivity of the grating coupler. of the resonances. Overlaid is a fit to the spectrum using a Lorentzian lineshape. The extracted quality factor (Q opt ) of the device is ∼ 15000. While the Q opt is lower than expected, there are several design and fabrication tweaks that can be made to increase it. On the design side, the waveguide width can be increased to provide greater mode confinement. On the fabrication front, we can significantly improve our postrelease device cleaning procedures to remove any residual contaminants and incorporate surface passivation techniques that have shown to improve Q opt 30 . Based on the measured resonator Q opt and free spectral range (from Fig.5(b)), we estimate our current waveguide propagation loss to be ∼ 7 dB/cm. We believe the resonator is currently operating in the overcoupled regime, and hence the propagation loss estimate is an upper bound.
In summary, we have demonstrated that the complexity of the standard (passive) silicon photonics process can be read-ily transferred to more interesting optical materials, in particular GaAs. The similarity of the refractive indices of the two materials ensures that high device performance can be readily ensured without requiring extensive component redesign. Bringing the scale and complexity of silicon photonics to more interesting optical platforms will be revolutionary for device applications in wide-ranging areas from quantum photonics to cryogenic photonic circuits. Moving forward, we will extend this platform to demonstrate low-loss long spiral (L wvg ∼ cm) waveguides, and active electro-optic and acoustooptic devices.