A Chip-scale, Full-Stokes Polarimeter

The polarization of light conveys unique information that can be exploited by crucial applications. The bulky and costly discrete optical components used in conventional polarimeters limit their broad adoption. A compact, low-cost polarimeter would bring this functionality into a myriad of new scenarios and revolutionize its exploitation. Here we present a high-performance, full-Stokes polarimeter on a silicon chip. A surface polarization splitter and on-chip optical interferometer circuit produce the analysis matrix of an optimally conditioned polarimeter. This solid-state polarimeter is a system-on-a-chip with exceptional compactness, stability, and speed that could be used singly or in integrated arrays. Large arrays can increase the speed and resolution of full-Stokes imaging; therefore, our design provides a scalable polarimeter solution.

light, and their use of metallic nanoantennas creates parasitic absorption losses. Silicon photonics brings to the manipulation light the economies of scale and advantages of tremendous integration long enjoyed by VLSI in electronics. Silicon photonics can integrate a vast number of optical components on a single chip in proximity with microelectronics. The manipulation of light is therefore enhanced with digital signal processing to create complete systems-on-a-chip. While silicon photonics initially targeted optical interconnects, a broader range of applications is now under development, such as sensors, light detection and ranging (LiDAR), and imaging. [9] Large-scale silicon photonic integrated circuits have been demonstrated [10][11][12][13][14][15], and are being turned to the polarimetry application. Martínez, et al., used the spin-orbit interaction of light to demonstrate the use of subwavelength scattering on silicon for local observation of SoP. [7] They used the careful manipulation of a metallic nanoparticle or supplemental polarization filtering for their SoP characterization, however, the accuracy of their polarimeter has yet to be established with either method. A silicon photonic Stokes vector receiver has been demonstrated for high-speed optical communications. [16] It uses a nanotaper on the edge of a chip to collect light from a fiber; on-chip components such as beam splitters, polarization rotators, and optical hybrids are used for polarization decomposition and phase readouts. This structure, however, cannot be used to realize two dimensional arrays for imaging polarimetry.
We present a novel chip-scale, full-Stokes polarimeter in silicon photonics with proven SoP accuracy, compatibility with imaging polarimetry, and scalability to large arrays to enhance speed and resolution. Our polarimeter consists of a surface polarization splitter (SPS) and on-chip optical interferometers that convert the SoP directly to intensity readouts. In addition to the fiber-optic application of sensor and communication, our compact polarimeter element can be arrayed for free-space applications such as polarimetric LiDAR and imaging polarimetry. The proposed chip-scale polarimeter is based on the standard 220-nm-thick silicon-on-insulator (SOI) wafer with a 2 µm buried oxide layer and 2-µm oxide cladding.
The schematic of the proposed device is shown in Fig. 1. A two-dimensional dielectric grating structure [17] is used as a SPS to decompose incoming light with an arbitrary SoP, (S 0 , S 1 , S 2 , S 3 ), into two orthogonal linearly polarized E-field components, E x and E y . The E-field components are separated; each has it power split (ideally a 50:50 split) and coupled into two single-mode waveguides that exit the structure in opposite directions. Note that the excited optical waves propagating in the four waveguides, 2 E y , carry full SoP information on the incoming light. The SoP can be retrieved using their intensities and the relative phase between the two orthogonal E-field components. Since most photo-detectors (PDs) are only sensitive to intensity, an optical interferometer circuit is designed to convert phase information into intensity. The interferometer is realized via four directional couplers (DCs).
As shown in Fig.1, the device has six outputs. Four outputs provide intensity measurements with information on the linear polarization of incident light at specific directional rotations: linear horizontal (I 0 ), linear 45 • (I 45 ), linear vertical (I 45 ), linear 135 • (I 135 ). Two outputs provide intensity measurements with information on the circular polarization: right-handed circular (I R ), and left-handed circular (I L ) polarization.
Straight paths without directional couplers provide The interferometric structure provides where M S is the synthesis matrix of the polarimeter, given by Equation 8 is only valid under ideal conditions. Imperfections such as imbalanced splitting ratios of the SPS and DCs, waveguides losses, and phase errors should be taken into consideration. For a general expression, we rewrite the E-fields in the four waveguides coupled from the SPS as κ x1 E x e iδ x1 ,κ x2 E x e iδ x2 , κ y1 E y e iδ y1 , and κ y2 E y e iδ y2 . The κ coefficients represent the impact of imbalanced splitting ratio of the SPS and waveguide losses; the δ coefficients represent the impact of phase errors. The first index refers to the E-field component (x or y), and the second index to one of the two output waveguides. The straight-through and cross-coupling coefficients of the DC are represented by τ DC and κ DC , respectively. A calibrated synthesis matrix M S accounting for imperfections is given by More details about the theoretical analysis are given in Supplementary 1. In practice, the calibrated polarimetric matrix M S can be obtained by four measurements of output intensities when inputting light with known, independent SoPs.
The device was designed and fabricated using a CMOScompatible process with electron-beam lithography. A scanning electron micrograph (SEM) of the fabricated device is presented in Fig. 2. The SPS is formed using a 20 × 20 array of cylindrical holes fully etched through silicon with a period of Λ = 596 nm and a hole diameter of D = 200 nm (as shown in the inset of Fig. 2). This design focused on the telecommunications wavelength band around 1550 nm, but could be directed to the band of interest for a given application. More details about the design of the SPS are given in Supplementary 2. The experimental and simulation results are shown in Fig. 3 when inputting (via normal incidence) x-polarized light. η x and η y are the efficiency of light coupled into x-directional and y-directional waveguides, respectively. The measured spectrum shows an efficiency (η y ) of near 27.7 % at the wavelength of 1550 nm. A high extinction ratio of 35 dB was measured experimentally. An image of the simulated intensity distribution withing the SPS under the xpolarized light at 1550 nm wavelength is presented in Fig. 3b. We observe strong coupling along the vertical direction where exit paths for x-polarized component of light are located. virtually no light is found in the horizontal direction where exit paths for y-polarized component of light are located. This is confirmed in experiment by the high extinction ratio.
Four known independent SoPs were used to calibrate the device and to calculate the system polarimetric matrix M S (Eq. 9). Then the performance of the polarimeter was experimentally tested using a series of SoPs spread widely over the surface of the Poincaré sphere, as illustrated in Fig. 4a and b. For each point in this series of randomly generated SoPs, we simultaneously measured the SoP with our device and a commercial in-line polarimeter (details about the experiment are given in Supplementary 3). At each measurement we normalized the SoP to a unitary first component, and plotted the remaining three components, i.e., S = (S 0 , S 1 , S 2 , S 3 ) T /S 0 . The measured SoP results are summarized in Fig. 4c. Excellent agreement is observed between the SoP measurements using our device and a commercial bench-top polarimeter. The root-mean-square error between measurements with the integrated and the bench-top instrument is 0.07. This error is dominated by intensity measurement errors due to the set-up variations and PD noise (Supplementary 5). [18] This error can be significantly reduced by PDs integrated on the same chip. Notice that high-responsivity, high-speed Ge-on-Si PDs have already been demonstrated [19,20] and are now widely available in silicon photonics foundry processes.
The condition number of the analysis matrix indicates how sensitive the reconstructed SOP is to systematic errors such as miscalibration. The signal-to-noise ratio (SNR) of a polarimeter is determined by the condition number, with SNR maximized when the condition number is minimized. [18] The ideal polarimeter has a condition number of √ 3, the minimum value for full-Stokes analysis. [18] In addition to imperfections captured in (Eq. 9), M S and its condition number is a function of wavelength due to the wavelength dependencies of the DCs and the SPS. To mitigate this effect, we used a broadband DC design with an asymmetric-waveguide-assisted section leading to a near 200 nm 1 dB bandwidth of splitting ratio ( Supplementary Fig. S8). [14] The condition number as a function of wavelength is numerically simulated and is shown in Fig. 5. We can observe that the curve shows a flat bottom very close to the optimal value √ 3 across a wide spectral range from 1.5 to 1.6 µm. The condition number is also calculated using the parameters (the coupling coefficients of the DC and the extinction ratio of the SPS) extracted from measurement (Supplementary 4), and agrees well with the numerical simulation (Fig. 5). The demonstration of a silicon full-Stokes polarimeter paves the way to polarimetry sensor systems on a chip for a vast number of applications. Avoiding the use of free-space optical and mechanical components, this solid-state solution enables significant improvement in system robustness, size and cost. A polarimeter array can also be fabricated on a single chip with minimum increase in footprint and cost, proving a scalable solution for applications such as imaging polarimetry and polarimetric LiDAR. For large-scale arrays (e.g., in 2D polarization imaging), we can spatially separate the SPS and the optical interferometer circuit, which allows us to group the SPS elements in a compact footprint to achieve a large fill factor. Furthermore, a number of the SPS elements can share one set of optical interferometer circuit and integrated PDs through on-chip optical switches [21,22] so that the SoP received by each SPS can be analyzed in a time series. Our device can also be used as a polarization analyzer for polarimetric fiber-optic sensors whose application is limited by the high cost of currently available polarimeters. The proposed structure can be applied to other CMOS-compatible materials such as silicon nitride and germanium for a broad spectrum from visible to mid-infrared. [23,24] Furthermore, it can be readily integrated with other silicon photonic functions such as spectrometers [25] for a multi-dimensional optical measurement system on a chip.