Electrically packaged silicon-organic hybrid (SOH) I/Q-modulator for 64 GBd operation

Silicon-organic hybrid (SOH) electro-optic (EO) modulators combine small footprint with low operating voltage and hence low power dissipation, thus lending themselves to on-chip integration of large-scale device arrays. Here we demonstrate an electrical packaging concept that enables high-density radio-frequency (RF) interfaces between on-chip SOH devices and external circuits. The concept combines high-resolution $\mathrm{Al_2O_3}$ printed-circuit boards with technically simple metal wire bonds and is amenable to packaging of device arrays with small on-chip bond pad pitches. In a set of experiments, we characterize the performance of the underlying RF building blocks and we demonstrate the viability of the overall concept by generation of high-speed optical communication signals. Achieving line rates (symbols rates) of 128 Gbit/s (64 GBd) using quadrature-phase-shiftkeying (QPSK) modulation and of 160 Gbit/s (40 GBd) using 16-state quadrature-amplitudemodulation (16QAM), we believe that our demonstration represents an important step in bringing SOH modulators from proof-of-concept experiments to deployment in commercial environments.


Introduction
Efficient broadband electro-optic (EO) modulators are key components in microwave photonics and in optical communication systems. Over the last decade, the footprint of EO modulators has been radically reduced, moving from centimeter-long LiNbO3-devices to millimeter-or sub-millimeter components that exploit high-index contrast waveguides on semiconductor substrates [1][2][3][4]. In this context silicon photonics (SiP) has emerged as a particularly promising platform, exploiting advanced CMOS processes for high-yield mass production of modulators -either as standalone devices or as parts of more complex photonic integrated circuits (PIC) [5][6][7][8]. To improve the performance of SiP modulators, silicon nanowire waveguides can be combined with highly efficient organic EO materials that have been engineered on a molecular level [9,10]. This so-called silicon-organic hybrid (SOH) approach allows to reduce the voltage-length product of EO modulators to 0.32 Vmm [11] -more than an order of magnitude below that of conventional depletiontype SiP modulators. SOH integration allows to realize high-speed modulators with submillimeter device lengths. The modulators offer line rates up to 120 Gbit/s for intensity modulation and direct detection (IM/DD) [12], and up to 400 Gbit/s for coherent 16QAM signaling [13].
However, while reducing the on-chip footprint of EO modulators increases integration density as well as modulation speed, electrical packaging of the devices becomes increasingly difficult [14]. One of the main problems is the vast size mismatch between the ultra-fine features that can be realized by advanced deep-UV lithography on the silicon chip and the much larger dimensions of radio frequency (RF) traces that are commonly available on printed circuit boards (PCB) or interposers. This often results in a mismatch of bond pad pitch, which impedes high-density packaging of large-scale device arrays and must be overcome by excessively long metal wire bonds with limited performance in terms of bandwidth and signal fidelity [15]. In the field of microelectronics, flip-chip bonding is often used for broadband connections between interposers and densely integrated on-chip circuits [16]. This approach has been recently transferred to packaging of advanced SiP transceivers [17][18][19], enabling transmission of optical signals with data rates of up to 136 Gbit/s using 16QAM signaling at a symbol rate of 34 GBd [19]. However, flip-chip bonding of PIC blocks access to the chip surface and thus complicates optical packaging, often leaving edge coupling to actively aligned optical fibers as the only option [20]. Moreover, flip-chip bonding of photonic devices often requires dedicated processes that need to be adapted to specific optical components in terms of thermal budget or with respect to the deployed flux chemicals [15,21]. In contrast to flip-chip bonding, accessing high-density PIC by metallic wire bonds leaves the top surface of the chip free and thus offers high flexibility with respect to optical packaging [22][23][24][25][26][27][28][29][30], exploiting, e.g., highly efficient SiP grating couplers [31], photonic wire bonds [32], or facet-attached micro-lenses [33]. However, published signaling demonstrations using SiP modulators accessed by metal wire bonds have so far been limited to symbol rates of 28 GBd. Moreover, none of the aforementioned approaches have so far been applied to SOH devices.
In this paper, we demonstrate an electrically packaged SOH EO modulator that exploits simple metal wirebonds in combination with a high-resolution ceramic PCB to establish broadband connections from standard coaxial connectors to sub-mm on-chip devices. Our approach allows to adapt the bond-pad pitch on the PCB to that of the PIC, thereby permitting connections through short parallel metal wire bonds that are amenable to broadband packaging of large-scale device arrays. In a set of experiments, we expand upon our earlier work [34] and demonstrate line rates (symbols rates) of 128 Gbit/s (64 GBd) using quadrature-phase-shift-keying (QPSK) modulation, and line rates (symbol rates) of 160 Gbit/s (40 GBd) using 16-state quadrature-amplitude-modulation (16QAM). This is among the highest symbol and line rates demonstrated so far with electrically packaged SiP modulators. In addition, our devices feature a voltage-length product of only UL = 0.9 Vmm, which is well below that of packaged SiP devices that were previously demonstrated. When combined with recent progress in improving thermal stability of organic EO materials [35] and of SOH modulators [36] as well as with novel technologies for hybrid photonic integration [37], we believe that our demonstration represents an important step in bringing SOH modulators from proof-of-concept experiments to deployment in laboratory and commercial environments.

Concept, fabrication, and assembly
This section introduces the concept of silicon-organic hybrid (SOH) modulators, reports on the fabrication and characterization of the high-frequency ceramic printed circuit board (PCB), and shows the assembly of the electrically packaged modulator.

SOH Mach-Zehnder modulator
The concept of a strip-loaded SOH Mach-Zehnder modulator (MZM) [9,38,39] is depicted in Fig. 1. The basic optical waveguide structure is fabricated on a standard 220 nm silicon-on-insulator (SOI) wafer using 248 nm deep-UV lithography. The MZM consists of two parallel 0.6 mm long phase shifter sections. Each phase shifter comprises a silicon slot waveguide filled with an electro-optic (EO) organic material. The slot has a width of 120 nm. The 240 nm wide Si rails of the slot waveguide are connected to the electrodes with thin, doped Si slabs and Al vias. The device is realized as traveling-wave modulator where the optical mode in the slot waveguide co-propagates with the electric (modulating) mode. Both phase shifter sections share the central signal electrode  e-1) Prior to poling, the molecular dipoles (green arrows) in the organic EO material are randomly oriented such that no macroscopic Pockels effect can be observed. (e-2) At elevated temperatures, a poling voltage induces a poling field Epol which aligns the molecular dipoles predominantly along the electric field. This molecular orientation is frozen when the material is cooled down to room temperature. (e-3) In push-pull operation, the modulating RF voltage is applied to the center signal electrode thereby leading to a modulating field Emod that is oriented parallel to the poling direction in one arm and anti-parallel in the other one. This allows for pure amplitude or intensity modulation without residual phase modulation (chirpfree) [12].
which, together with the outer ground electrodes, form a coplanar ground-signal-ground transmission line. Aluminum vias are used to connect the electrodes to bond pads of the top metal layer at both ends of the transmission line. The electrical RF voltage drops mainly across the narrow slot where the light is highly confined, thus leading to a high overlap of the modulating electric field and the optical mode and a high modulation efficiency. As an EO material, we use the guest-host material SEO250, which is locally deposited on the slot waveguides by a high-resolution dispensing technique. To activate the macroscopic χ (2)nonlinearity, the microscopic molecular dipole moments of chromophores in the organic EO material need to be aligned in a one-time poling process. To this end, a poling voltage Upol is applied across the (floating) ground electrodes at an elevated temperature for aligning the EO chromophores. After cooling the device down, the poling voltage is removed, and the molecular orientation is frozen as indicated by the green arrows in Fig. 1(e-3). The modulating field Emod induced by the RF drive voltage is oriented parallel to the chromophore alignment in one arm of the MZM and antiparallel in the other arm, which leads to chirp-free push-pull operation. The PIC used in this work contains an array of MZM that are configured as nested pairs to serve as IQ-modulators. Alternatively, the unused ports of the MZM can be accessed directly via attached grating couplers, which allows to use the devices individually for amplitude or intensity modulation.

High-Frequency PCB:
The PCB traces are realized as 50 coplanar ground-signal-ground (GSG) transmission lines (TL). To facilitate electrical board-to-chip connections with short wire bonds and to enable the integration of densely spaced modulator arrays, the spacing of the board-level RF traces must be matched to the pitch of the bond pads on the silicon chip, which is chosen to be 100 µm to save chip area while enabling reliable placement of metal wire bonds. At the same time, the board-level RF traces must allow for easy interfacing to discrete devices such as coaxial connectors or surface mount devices (SMD), which feature millimeter-size contact spacings. To this end, we use tapered sections of RF traces with impedance-matched transitions between RF traces of different dimensions. Fabrication of the underlying PCB requires structuring techniques that combine micrometer resolution with the ability to process boards with centimeter-scale overall dimensions. To this end, we have developed a direct-laser write (DLW) fabrication process which allows for flexible mask-less fabrication at low cost. The process starts from square 100  100 mm² Al2O3 ceramic substrates which are covered by a 3 µm thick electroplated Au layer. The substrates are coated with a positive-tone photoresist (AZ1500) and patterned with a Nd:YAG laser. After development of the exposed structures, the Au layer is wet-etched using a KI solution, and the resist mask is removed.
The performance of the RF building blocks is characterized using dedicated test structures. Figure 2(a) shows the TL near the chip edge, Fig. 2(b) displays the taper section, and Fig. 2(c) illustrates the TL near a coaxial connector. For the characterization, the TL as used near the chip edge is contacted on both sides using GSG microwave probes, and the Sparameters are measured using a vector network analyzer (VNA). The reference planes are moved to the probe tips by using a short/open/load/through (SOLT) calibration routine with a proper calibration substrate. Using the method described in [40], we extract the characteristic impedance Z0 and the power loss coefficient α from the measured S-parameters, Fig. 2(d). The characteristic impedance Z0 is well matched to the system impedance of 50 Ω over the entire measurement range. The power loss coefficient α, presumably dominated by conductor loss, increases with frequency due to the skin effect, but stays below 2 dB/cm, which compares well to the losses achieved on state-of-the-art calibration substrates [41]. The characteristic impedance and the power loss coefficient shown in Fig. 2(d) were extracted from a set of 10 different TL, all of which yield comparable results. The transition between TL of different cross sections is realized by an impedance-matched linear taper. Figure 2 (e) shows the measured S-parameters of the corresponding test structure comprising two tapers at both sides of a 9 mm long TL section as in Fig. 2(b). The 3-dB bandwidth extracted from S21 is larger than 60 GHz, and the reflection as expressed by S11 stays below -15 dB.
To feed the signal from coaxial cables to the PCB, surface-mounted coaxial connectors are soldered to appropriate pads connected to the centimeter-scale transmission line. Measured S-parameters of a structure comprising two such connectors (surface-mounted type SMP-M) at the ends of a 7.8 mm long TL indicate good performance up to 20 GHz. However, the increase of the power reflections limits the performance in the 25…40 GHz range, see Fig. 2(f). The reduction in transmitted power beyond 25 GHz is attributed to losses in the coaxial connectors and the transition to the on-board pads. Note that our measurements with SMP-M connectors include the influence of two semi-flexible cable assemblies converting from 1.85 mm VNA connectors to the SMP-M interface, which we could not isolate because we lack an SMP-M calibration kit. These assemblies are specified to have a 3dB bandwidth > 65 GHz such that we do not expect any significant distortions of our measurements.
Assembly Figure 3 shows the module assembly. The SiP chip is glued on a metal sub-mount using a conductive epoxy adhesive, Fig. 3. After poling the modulators, two identical ceramic PCB are placed on both sides of the Si chip and are glued to the same metallic sub-mount (see Fig. 3(a) and (c). By precise machining of the sub-mount, the surfaces of the Si chip and the PCB are brought to approximately the same height to allow for short wire bonds. To avoid excitation of unwanted substrate modes, the sub-mount features a void below the RF traces, see Fig. 3(a). The traveling-wave electrodes of the modulators are connected to the PCB traces at both ends using Au wires attached by wedge-to-wedge bonding. Surface-mounted GPPO-compatible SMP-M receptacles and coaxial cables are used to connect to the signal source on one end and to a terminating resistor at the other end. The module contains two MZM that can be used either individually for amplitude or intensity modulation, or, by using a different optical input/output, as two nested MZM which form an I/Q-modulator. Figure 3(c) shows an image of the module, and Fig. 3(d) displays a micrograph of the bonded chip. Light is coupled to and received from the chip using on-chip grating couplers.

Optical, DC, and small-signal characterization of module
To measure the optical transmission spectrum of the electrically packaged MZM, we use a tunable laser. The static extinction ratio of the modulator exceeds 30 dB. The fiber-to-fiber insertion loss is 11.6 dB. This includes overall fiber-chip coupling losses of 8.9 dB caused by the two grating couplers, as well as an on-chip device loss of 1.3 dB, caused by passive components, namely two MMI splitters (0.37 dB each), input/output access waveguides (0.2 dB in total), and mode converters at the strip-slot waveguide interface (0.4 dB in total). The remaining 1.4 dB are attributed to slot waveguide loss in the phase shifter sections, which leads to an estimated propagation loss of a = 2.3 dB/mm. The -voltage U of the MZM is measured by applying a low-frequency (< 1 kHz) electrical signal, and by recording the applied voltage and the transmitted optical power using an oscilloscope. The -voltage U corresponds to the voltage that needs to be applied to the center electrode of the MZM in the low-frequency limit to induce a relative phase shift of  between the two arms of the device. We find U = 1.5 V, leading to a modulation efficiency of the 0.6 mm long MZM of UL = 0.9 Vmm and a -voltage-loss product aUL = 2.1 dBV -the best value so far achieved in SOH modulators using an EO material with a high glass transition temperature Tg. Note that this -voltage-loss product is significantly smaller than the best value achieved in high-speed depletion-type SiP modulators, which amounts to 12 dBV [42]. To improve the EO modulation bandwidth of the MZM, the conductivity of the doped silicon slabs can be increased by a gate voltage applied between the ground electrode and the Si substrate [43]. This leads to an accumulation layer of electrons at the interface of the doped Si slabs and the buried oxide, thereby increasing the slab conductivity. In the experiment, we use a gate field strength of 50 V/µm, which increases the loss of the slot waveguide only moderately by 0.2 dB. This setting was used for the dynamic analysis shown below, and for the data generation (Section 4). Note that the gate voltage can be reduced by using a gate electrode [44] or even omitted by using optimized doping profiles. The dynamic behavior of the MZM is characterized for the small-signal case using a VNA. First, the electrical Sparameters of the unpackaged MZM are measured using microwave probes at both ends of the modulator's coplanar TL. The result is shown in Fig. 4 along with the S-parameters of the electrically packaged modulator, which were measured by connecting the VNA ports directly to the SMP-M connectors on the ceramic PCB. The package has a significant influence on the electrical transmission spectrum at frequencies larger than 20 GHz. This is in agreement with the finding from Fig. 2(f), where a drop of the transmission in the transition to the surfacemounted connectors limits the performance beyond 20 GHz. In the low-frequency range, no significant impact on the EO performance is expected. This is confirmed by a second experiment, in which the electro-optical-electrical (EOE) bandwidth is measured using a VNA and a calibrated photodiode. Figure 4(b) shows the EOE responses of the electrically packaged and unpackaged MZM. As expected, the EOE responses are comparable up to a frequency of 20 GHz, with a rather modest frequency roll-off beyond that frequency. There is even a slight improvement of the frequency roll-off in the low-frequency range for the packaged MZM with respect to the unpackaged device. This observation is attributed to resonant peaking caused by imperfect impedance matching. The electro-optic 3-dB (6-dB) bandwidth for the electrically packaged modulator is 21 GHz (31 GHz).

Intensity-modulated and coherent signaling
Using a single MZM, intensity-modulated signals are generated in a first set of experiments. Four channels of a pulse pattern generator (PPG) are serialized in an electrical 4×1 multiplexer (MUX) to generate a pseudo random binary sequence (PRBS) with a length of 2 31 −1. The output of the MUX is directly connected to the input of the modulator. Light is coupled to the device using grating couplers. After the modulator, the optical signal is amplified by an erbium-doped amplifier (EDFA). Out-of-band amplified spontaneous emission (ASE) noise is removed using an optical band-pass filter. The signal is detected using a photodiode connected to an equivalent-time sampling oscilloscope (Agilent 86100C), exploiting the repetitive nature of the test pattern for broadband electrical acquisition. Recorded eye diagrams at 20 Gbit/s and 40 Gbit/s are shown in Fig. 5(a) and (b), respectively. At 20 Gbit/s (40 Gbit/s) the measured Q-factor amounts to 9.8 (4.1). Neglecting inter-symbol interference (ISI) and assuming additive Gaussian noise as the only signal distortion, a bit error ratio (BER) of BERe = 5.6×10 −23 at 20 Gbit/s is estimated [45], and a BERe = 2.1×10 −5 at 40 Gbit/s. Note that the underlying assumptions might not hold exactly, especially at 40 Gbit/s where ISI might start to play a role. Still, without claiming exact quantitative accuracy of the estimated BERe values, we are confident that the true BER falls well below the forward error correction (FEC) threshold of 4.40×10 -3 for less than 7% overhead [46]. In a second set of experiments, an arbitrary waveform generator (AWG, Keysight M8196A) replaces the PPG, and a real-time sampling oscilloscope (Keysight DSO-X 93204A) replaces the equivalent-time sampling oscilloscope of the previous experiment. In a first step, we generate intensity-modulated two-and multilevel signals, record the received data, and apply digital signal processing (DSP) for equalization and analysis of the received signal. The AWG generates a PRBS with a length of 2 15 −1. The resulting pulses are shaped to have rootraised cosine spectrum. Figure 5(c) shows the eye diagram of a 40 Gbit/s OOK signal, generated with a roll-off factor  = 1, after applying an adaptive equalizer to flatten out the end-to-end frequency response of the system using an oversampling factor of ten. No errors were found in our 62 µs long recording (2.48×10 6 measured bit), which confirms that the BER is below 4×10 -5 . For OOK at a line rate of 56 Gbit/s and using  = 0.1, a BERm = 1.96×10 -5 is measured (not displayed in the figure). Figure 5(d) shows the eye diagram for a four-level pulse amplitude (PAM4) modulated signal, generated using  = 0.3, at a symbol rate of 40 GBd (corresponding to a line rate of 80 Gbit/s). The BER is measured to be BERm = 1.63×10 −4 , well below the 7% overhead FEC threshold.
The IM/DD data generation is complemented by the generation of quadrature-amplitudemodulated (QAM) signals, driving the electrically packaged SOH IQ modulator by a twochannel AWG and detecting the signal by a coherent receiver. Figure 5(e) shows the constellation diagrams for a 28 GBd 16QAM signal. The BER is measured to be BERm = 7.78×10 −4 . For 40 GBd, see Fig. 5(f), the BER increases to 1.31×10 −2 but stays below the threshold of soft-decision FEC codes with a 20% overhead [46]. This results in a line rate of 160 Gbit/s and a post-FEC net data rate of 133 Gbit/s on a single polarization. Using QPSK signals, symbol rates of 56 Gbd and 64 GBd were generated with a BER below the threshold for a hard-decision FEC with 7% overhead, see Fig. 5(g) and (h). Note that at a symbol rate of 64 GBd, we used a PRBS of length 2 11 −1 due to hardware limitations of our AWG. In all data generation experiments, a gate field of 50 V/µm has been applied to the modulator substrate [44].
These results compare well with previously published signaling demonstrations using SiP modulators accessed by metal wire bonds, for which 16QAM symbol rates of 28 GBd and line rates of 112 Gbit/s were demonstrated for a single polarization. Relying on the published state-of-the art, we believe that our demonstrations of 64 GBd QPSK and of 40 GBd 16QAM correspond to the highest symbol rate and the highest line rate achieved so far with a wirebonded SiP modulators [29] and that the approach can well compete with more complex packaging concept based on flip-chip bonding [19]. In comparison to earlier demonstrations of packaged pn-depletion-type MZM, our devices feature significantly lower voltage-length product of only UL = 0.9 Vmm, well below that of best-in-class depletion-type SiP modulators [42].

Summary
We demonstrate for the first time that electrical packaging of high-speed SOH modulators is possible without significantly degrading the performance of the devices. To this end, we developed a dedicated packaging concept that utilizes technically simple metal wire bonding for packaging of highly compact SOH devices. The concept relies on high-resolution ceramic PCB that allow to adapt the interposer bond-pad pitch to that of the PIC, thereby permitting connections through short parallel metal wire bonds that are amenable to broadband packaging of densely integrated device arrays. The modulators feature a -voltage-length product of UL = 0.9 Vmm and a -voltage-loss product of aUL = 2.1 dBV, thereby outperforming conventional depletion-type pn-modulators. In our experiments, we demonstrate generation of intensity modulated signals with line rates of up to 80 Gbit/s as well as of QPSK and 16QAM signals with symbol rates up to 64 GBd and lines rates up to 160 Gbit/s, respectively. In combination with recent progress regarding EO material stability [36] and novel technologies for hybrid photonic integration [37], our concept builds upon the intrinsic efficiency and performance advantages demonstrate for die-level SOH devices and allows to exploit them on the level of electrically packaged communication modules.