Hybrid integration of modified uni-traveling carrier photodiodes on a multi-layer silicon nitride platform using total reflection mirrors

We demonstrate hybrid integration of modified uni-traveling carrier photodiodes on a multi-layer silicon nitride platform using total reflection mirrors etched by focused ion beam. The hybrid photodetectors show external responsivity of 0.15 A/W and bandwidth of 3.5 GHz for devices with a diameter of 80 μm. The insertion loss of the waveguide is 3 dB and the coupling efficiency of the total reflection mirror is −3 dB. The highest RF output power is −0.5 dBm measured at 3 GHz with 9 mA photocurrent and −9 V bias. © 2017 Optical Society of America OCIS codes: (040.5160) Photodetectors; (250.5300) Photonic integrated circuits. References and links 1. F. Boeuf, S. Cremer, E. Temporiti, M. Fere, M. Shaw, N. Vulliet, B. Orlando, D. Ristoiu, A. Farcy, T. Pinguet, A. Mekis, G. Masini, P. Sun, Y. Chi, H. Petition, S. Jan, J.R. Manouvrier, C. Baudot, P. L. Maitre, J-F. Carpentier, L. Salager, M. Traldi, L. Maggi, D. Rigamonti, C. Zaccherini, C. Elemi, B. Sautreuil, and L. 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Introduction
The levels of photonic integration have advanced at a rapid rate in the last decade.Silicon-on-Insulator (SOI) is currently the mainstream and predominantly used material platform for silicon photonic integrated circuits (PICs) [1][2][3][4].The SOI technology platform has the advantage of high index contrast and low loss while maintaining its compatibility with the existing CMOS infrastructure.The silicon nitride (Si 3 N 4 ) technology platform provides an alternative to address some of the intrinsic challenges of SOI technology.The Si 3 N 4 platform extends the lower limit of the transparency window from 1.1 μm to the visible wavelength range of 0.4 μm.It also has the advantages of low loss transmission and high index contrast, which can be can be utilized to realize novel devices with superior performance [5][6][7].
However, typical Si 3 N 4 PICs have a limited range of applications since they are unable to provide active functions such as modulation, detection, and light emission.While hybrid integration techniques have been successfully developed for the SOI technology, they are not fully compatible with the Si 3 N 4 platform.Hetero-epitaxial growth of germanium or III-V materials on silicon nitride requires complicated processes.While wafer bonding is a versatile technique, it typically relies on the evanescent coupling between the two bonded layers, which is difficult for Si 3 N 4 and III-V materials due to their high index contrast [8][9][10].Grating assisted directional coupling is an alternative to evanescent coupling [11].However, it suffers polarization sensitivity, a narrow spectral range, and relatively high losses while requiring submicron lithography.Butt coupling to PICs provides ultra-compact integration with high coupling efficiency [12].However, the fabrication process is relatively complex and typically has low saturation power compared with vertical coupling methods.Butt coupling is also less practical when the photodetector dies are bonded to a waveguide platform.Micro-mirror structures fabricated by dry tilted etching or mechanical polishing have been realized [13].However, they require extra complex fabrication steps and lack of integration flexibly.
In this work we demonstrated hybrid integration of modified uni-traveling carrier (MUTC) photodiodes on a multi-layer Si 3 N 4 platform using total reflection mirrors fabricated by focused ion beam (FIB) etching.The reflection mirror can be etched at any desired location facing any orientation on top of the multi-layer Si 3 N 4 platform.The MUTC photodiodes are then flip-chip bonded onto the platform with the active area facing the mirror.The compact integrated photodetectors show performance comparable with those fabricated using other techniques [14][15][16][17].The proposed approach generally applies to various material platforms where hybrid integration by epitaxial growth or wafer bonding is technically challenging.

Design and simulation
Figure 1(a) shows side-and cross-sectional schematics of hybrid integrated MUTC photodiodes on a multi-layer Si 3 N 4 platform.The Si 3 N 4 platform consists of two Si 3 N 4 layers including a 50 nm-thick layer on the lower level and a 150 nm-thick layer on the upper level.
The 50 nm layer has waveguides with a relatively large mode size, which is designed for fiber-to-waveguide edge coupling.The 150 nm layer, which has waveguides with higher confinement, is designed for tight bending and incorporation of other compact optical components.The light is evanescently coupled from the 50 nm layer to the 150 nm layer, and then totally reflected by a mirror into a MUTC photodiode.The total reflection mirror is etched on the sidewall of the RIE-etched trench by FIB.The MUTC photodiode is then flipchip bonded on top of the SiO 2 cladding.The MUTC photodiode is 80 μm in diameter with a ring contact.The ring contact is 10 μm wide and the inner diameter of the ring is 50 μm.The bonding metal on the waveguide platform also has a ring contact surrounding the mirror area.Contact pads extend outside the photodiode covered area and serve as probe electrodes.The coupling efficiency of light from the waveguide to the photodetector through the SiO 2 /air total reflection mirror is optimized using three-dimensional finite-difference timedomain simulation (Lumerical FDTD Solutions). Figure 2(a) shows the simulated electric field distribution of total reflection in a side view.Light is totally reflected at the mirror and coupled to the photodetector region, while a fraction of the light is backward reflected at the SiO 2 /air/III-V interfaces.Figure 2(b) shows the simulated coupling efficiency as a function of the incident angle, inverse taper width, and photodetector area.The incident angle is chosen as 60 in order to enable total internal reflection at the mirror and to suppress the backward reflection at the SiO 2 /air/III-V interface.The waveguide on the 150 nm layer has a singlemode width of 2 μm.The waveguide width is inversely tapered to 0.5 μm in order to achieve higher coupling efficiency.The simulated coupling efficiency to a photodetector area of 400 μm 2 is 66% with the aforementioned incident angle and taper width.

Fabrication
The Si 3 N 4 devices are fabricated on a 150 mm silicon wafer.The lower SiO 2 cladding is low temperature oxide (LTO) deposited by low-pressure chemical vapor deposition (LPCVD) at 400 °C.The 50 and 150 nm Si 3 N 4 layers are deposited by LPCVD at 800 °C.The two Si 3 N 4 layers are patterned with projection lithography (248 nm) followed by inductively coupled plasma etching with C 4 F 8 and H 2 gases.The interlayer and upper SiO 2 cladding is LTO planarized by chemical mechanical polishing.The metal on top of the upper SiO 2 cladding for electrical probing and flip-chip bonding is 20 nm titanium and 400 nm gold deposited by electron beam evaporation.The fabrication of the Si 3 N 4 platform is then finished as shown in Fig. 3(a).To provide a suitable working window for the following FIB etch, a deep reactiveion etching process is applied to the desired waveguide area as shown in Fig. 3(b).This preetched trench will shorten the FIB etching time and also ensure a mirror with high aspect ratio.After the mirror is etched as shown in Fig. 3(c), the samples are cleaned in O 2 plasma at 200 W for 2 hours to remove the 100 nm-thick carbon that is deposited prior to the FIB etch in order to suppress charging effects during the FIB etch.A standard flip-chip bonding process with bonding temperature at 340 °C is performed to bond the photodiode onto the waveguide.Finetech Fineplacer pico ma is used to perform the flip-chip bonding.It has a placement accuracy of 5 μm.The detailed fabrication process of the MUTC photodiodes and the flip-chip bonding process are described by Zhi Li et al in [18].The FIB process is performed by an FEI Scios DualBeam FIB/SEM system.The ion beam is tilted 30 to the waveguide surface to achieve the desired mirror angle as shown in Fig. 4. The scanning cross-section is a 20 × 5 μm 2 slit and the beam current is 3 nA.The mirror is formed after the first etching process.However, the mirror surface is relatively rough due to the re-deposition of ablated materials.A polish etch is then performed on the mirror surface.The scanning cross-section is 20 × 1 μm 2 .The ion beam current is the lowered to 0.5 nA.Lower beam current minimizes the re-deposition of ablated material and achieves a relatively smooth surface.To examine the FIB etched mirror, an examination trench is etched to reveal the crosssection of the mirror.Figure 5(a) shows the top-view scanning electron microscopic (SEM) image of the Si 3 N 4 waveguide platform before FIB etch.The bright area is the gold contact, the dark area is the SiO 2 surface, and the rectangular hole in the ring contact is the DRIE window.

Characterization
Transverse electric (TE) polarized light at 1550 nm wavelength was coupled into the S 3 iN 4 devices using a lensed fiber with 5 μm spot size, which is matched with the optical mode of the fiber-to-waveguide edge coupler on the 50 nm Si 3 N 4 layer.An optical heterodyne setup with a modulation depth close to 100% was used to measure responsivity, bandwidth, and saturation characteristics.The external responsivity is ~0.15A/W at reverse bias voltage of 1 V.The responsivity of the MUTC photodiodes is ~0.6 A/W before flip-chip bonding.The total loss is 6 dB and it is coming from three factors: the fiber-to-waveguide coupling loss, the waveguide propagation loss, and the FIB mirror coupling loss.The fiber-to-waveguide coupling loss and waveguide propagation loss is measured to be 2.8 dB.The breakdown of the total loss is 1.8 dB fiber-to-waveguide coupling loss, 0.82 dB waveguide propagation loss and 0.18 dB coupling loss between the two Si 3 N 4 layers.The top waveguide loss was measured to be 0.6 dB/cm.The loss for each part is measured separately in test structures.Thus we estimate the waveguide-to-photodetector coupling efficiency to be −3 dB, which is close to the 66% designed coupling efficiency.Figure 6(a) shows the dark current-voltage characteristics before flip-chip bonding.The dark current is 1 μA at −1 V bias. Figure 6(b) shows the frequency responses of the hybrid photodiodes at various bias voltages.The 3-dB bandwidth is 3.5 GHz at 5 V, 7 V and 9 V.A slight increase in bandwidth is observed from −3 V to −5 V. Beyond −5 V, the device is fully depleted and the RC-limited bandwidth is independent of bias.The bandwidth of these 80 µm-diameter devices is RC limited.By reducing the diameter to 20 µm, the projected bandwidth is 55 GHz as shown in Fig. 6(c).We measured a maximum RF output power of −0.5 dBm at 3 GHz with 9 mA photocurrent and −9 V bias as shown in Fig. 6(d).The low RF output power is due to non-uniform illumination of the photodiode.The spot size of the reflected light is estimated to be 5 μm in diameter at the photodiode active area, which is much smaller than the device diameter.

Summary and future work
We demonstrate hybrid integration of MUTC photodiodes on a multi-layer Si 3 N 4 platform using total reflection mirrors fabricated by FIB etching.The hybrid photodetectors show 0.15 A/W external responsivity, 1 μA dark current, and 3.5 GHz bandwidth.The speed of the PICs is determined by the diameter of the detector, while the diameter of the detector used for integration is determined by the accuracy of the flip-chip bonding.The bandwidth can be improved up to 55 GHz by using a < 20 μm diameter photodetector flip-chip bonded with higher accuracy (3σ < 2 μm) alignment.

Figure 1 (
b) shows the SEM image of a hybrid integrated photodiode flip-chip bonded on a multi-layer Si 3 N 4 platform.The grey cube is the photodiode.Multiple contact pads extend to left of the photodiode covered area.

Fig. 1 .
Fig. 1. (a)Side-and top cross-sectional schematics of a hybrid integrated photodiode on a multi-layer Si 3 N 4 platform.(b) SEM image of a hybrid integrated photodiode flip-chip bonded on a multi-layer Si 3 N 4 platform.

Fig. 2 .
Fig. 2. (a) Simulated electric field distribution of total reflection in a side view.(b) Simulated coupling efficiency as a function of the incident angle θ, inverse taper width and photodetector area A.

Fig. 3 .
Fig. 3. Fabrication process of hybrid integration of an MUTC photodiode on a multi-layer Si 3 N 4 platform: (a) Multi-layer Si 3 N 4 platform.(b) Deep reactive ion etching of a trench.(c) FIB etching of the total reflection mirror.(d) Flip-chip bonding of an MUTC photodiode onto the finished platform.

Figure 5 (
b) shows the top view of the Si 3 N 4 waveguide platform after FIB etching.The mirror is etched on the left side of the sidewall.The surrounding bright areas are due to charging of the surface where the carbon coating is removed by the ion beam tail.The dashed rectangular line delineates the examination trench area.Figure 5(c) shows the side view of the mirror after the examination trench is milled.As shown in the SEM image, the mirror is exactly 30 and extends at least 20 μm deep into the waveguide.The mirror area shows little re-deposition material while the bottom of the mirror trench shows a large amount of redeposition material with a relatively light color.

Fig. 5 .
Fig. 5. SEM images of the FIB etched mirror.(a) Top view of the Si 3 N 4 waveguide platform before examination etch.(b) Top view of the deep reactive ion etched window after the examination etch.(c) Side view of the FIB etched mirror.

Fig. 6 .
Fig. 6.(a) Dark current-voltage characteristics of MUTC photodiodes before flip-chip bonding.(b) Frequency response of hybrid photodiodes at various reverse bias voltages.(c) Calculated bandwidth versus diameter.(d) RF output power and the compression of the hybrid photodiode versus average photocurrent at 9 V and 3 GHz.