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Ultrafast surface plasmon-polariton logic gates and half-adder

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Abstract

In this paper, we present a plasmonic model system for the realization of ultrafast all-optical NOT, AND, OR, and XOR gate operations using linear interference effects in dielectric crossed waveguide structures. The waveguides for the surface plasmon-polaritons are produced by a simple but highly accurate microscopic lithographic process and are optimized for single mode operation at an excitation laser wavelength of 800 nm. The functionality of the presented structures is demonstrated using sub-30 fs laser pulses from a mode locked titanium:sapphire laser. Using leakage radiation microscopy we show ultrafast SPP switching and logic operations of one basic structure consisting of two crossed waveguides with an additional output waveguide along the bisecting line of the input waveguides. The individual gates are realized on a footprint of 10 µm × 20 µm. Experimental investigations are supported by finite-difference time-domain simulations, where good agreement between experimental results and numerical simulations is obtained. To exploit the high precision of the fabrication method and its huge potential for realizing functional complex plasmonic circuitry we experimentally demonstrate a half-adder structure and its operation by combining and cascading several plasmonic waveguide components and logic gate elements on an area of only 10 µm × 28 µm.

© 2015 Optical Society of America

1. Introduction

In 1965, Moore verbalized his law about doubling of the packing density of circuits in electronic devices every 18 months [1]. However, this downsizing combined with an increase of operational speed is facing physical limits such as interconnection delays and heat generation [2]. Photons as carriers of information would overcome these limitations and increase the data-bandwidth drastically. However, photonic circuitry suffer from severe restrictions regarding the achievable dimensions needed for high degrees of component integration due to the diffraction limit.

A promising approach for solving this mismatch between photonics and electronics is the use of guided surface plasmon-polaritons (SPP) [3–5]. For the realization of all-optical switches and basic logic elements with guided SPPs, two physical phenomena can be used: linear interference effects and non-linear processes [6–14].

One important aspect of realizing optical switches or logic gate structures is their integrability into chip size dimensions to provide an alternative to electronic circuitry. The combination of different logic elements is needed for the realization of all-optical adder or half-adder, forming the basis for many complex logic devices [15, 16]. Their theoretical investigation and experimental realization in linear and nonlinear optical networks have recently been subject in scientific literature. Recent investigations employ semiconductor optical amplifier, four-wave mixing, photonic crystal structures, microring resonators, and spatial filtering [15–19]. Most of the former all-optical realizations of adders or half-adders required either high laser intensities or bulky experimental setups. A much simpler implementation of a half-adder, allowing already a high degree of integrability has been theoretically proposed using surface plasmons in nanowire networks [4]. The latter is based on SPP interference.

This linear effect provides the possibility to avoid excessive heating of the structures, since only low electromagnetic intensities are needed to drive the switching and logic elements. Due to low field intensities and the potential high degrees of integration [10, 20, 21], linear SPP interference effects appear very promising and will be under consideration in this paper.

Recent investigations of SPP guiding structures, including slot waveguides and nanowires, exploited as logic elements [2, 22–24] exhibit certain disadvantages in fabrication. Nanowire structures or nanoparticle chains are mostly arranged by chance, providing low reproducibility. On the other hand, precise positioning of individual nanowires and nanoparticles or the fabrication of alternative SPP waveguiding structures, e.g. grooves, channels, or slots requires time-consuming and costly process chains. The functional waveguiding structures used for the realization of integrated complex logic networks should further fulfill several preconditions, as they are mentioned by Miller in [25]. One important precondition is a fan-out, which means the possibility to drive at least two logic devices with the output of one logical device. Another important requirement is the avoidance of signal reflections back to the input ports at any point of the logic system, providing the possibility to isolate the input from the output.

In this paper, we present a low-cost fabrication approach for the production of crossed dielectrically-loaded SPP waveguide (DLSPPW) structures, providing NOT, AND, OR, and XOR gate operations. The DLSPPWs are chosen as a model system for the realization of logic elements, since they allow direct and real-time demonstration and visualization of their functionality by leakage radiation microscopy (LRM).

The switching property is based on interference of the SPP fields coming from two input waveguides at the waveguide junction. Only in the case when the incoming SPPs have the same phase a SPP mode in an additional output waveguide on the bisecting line of the input waveguides is excited. The main feature of this switching architecture, besides a high signal contrast between on and off levels at the output port, is the avoidance of back-reflections into the input ports. Furthermore, the switchable SPP intensity in the output waveguide is sufficient to combine multiple of those elements to more complex systems.

As an important demonstration of this cascadability, the combination of individual gate, switching, and phase delay elements into an integrated all-optical half-adder is demonstrated firstly. The half-adder represents the combination of one plasmonic AND and one plasmonic XOR gate in analogy to electronic circuitry [26], allowing the addition of two one bit input signals.

Since the interference takes place instantaneously, the switching effect in the waveguide junctions is intrinsically ultrafast. Experimentally this is demonstrated in this paper by using sub-30 fs laser pulses for SPP excitation. At this pulse duration the pulse repetition rates can in principle exceed the 10 THz range (pulse separation 100 fs). Repetition rates of 1.1 THz have already been demonstrated at telecom wavelength using a high repetition rate compact erbium fiber laser which could act as a suitable clock generator, providing possibilities for operation speeds above 1 Tbit/s [27]. Phase modulators operating on the time scale of the pulse duration of the used laser system can be based on optical pulse shaping [28], structural phase change [29], and nonlinear [30–33] effects. Optical pulse shaping relies on external manipulation of laser pulses by means of spatial light modulators which are able to introduce a varying phase over the pulse duration [34] in the order of tens of fs and allow working in the THz regime [28]. Structural phase change below 500 fs, persisting for about 3 ps, has recently been reported by Rudé et al. in [35]. With this scheme, switching energies in the order of tens of picojoule are already possible [29]. More suitable for ultrahigh repetition rate operations are nonlinear and linear effects, providing the possibility for phase switching on an instantaneous and pulse-to-pulse basis as anticipated above. Phase switching energies in the femtojoule and sub-femtojoule ranges have been reported for resonant nanocavities [36–38], while for broadband nonresonant effects they are still in the nanojoule [39] and picojoule range [29], using optical Kerr effect and non-parabolicity of free electron dispersion, respectively.

2. Experimental details

2.1. Preparation of structures

The structure under investigation is represented by two diagonal crossed waveguides with one additional output waveguide emerging from the intersection on the bisecting line of the input waveguides. The principal switching and gate element is shown in the optical microscope image in Fig. 1(c).

 figure: Fig. 1

Fig. 1 FDTD simulation (a),(e), darkfield LRM (b),(d) and Brightfield microscopy images(c) of plasmonic gate structures. The structures are made of Ormosil on a thin gold layer atop a standard microscopic cover glass. The diagonal waveguides are 20 µm long. The vertical waveguide is 10 µm long. All structures are 320 nm wide and 300 nm high. The excitation laser pulses offer a phase difference of 0 (a),(b) or π (c),(d), respectively, causing a switching of the SPP intensity in the vertical waveguide. The differences of simulated and experimental results may be due to the limited resolution of the fabrication process. The scale bar represents 5 µm.

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It consists of two 20 µm long diagonal crossed waveguides, referred to as input waveguides, intersecting each other under an angle of 40 °. From the junction point, one additional 10 µm long waveguide extends straight downward, referred to as the output waveguide. All waveguides are 320 nm wide and 300 nm high, as confirmed by scanning electron microscopy (SEM) (Quanta 400 FEG, FEI).

In the experiments, SPPs were excited by laser radiation at a vacuum wavelength of 800 nm. The SPP mode index of the waveguides was experimentally determined to 1.21 using leakage radiation microscopy, as described below. The waveguide width therefore corresponds to half the SPP mode wavelength inside the waveguide, ensuring single mode operation. To enhance coupling of laser energy into SPPs, triangular taper structures were added to the input waveguides.

As dielectric material the organic-inorganic hybrid photosensitive low shrinkage polymer Ormosil [40] was used. It has a refractive index of about n = 1.52 and is highly transparent in the optical and near-infrared range. The polymer was spin-coated to a 300 nm thick layer on top of a 50 nm thick gold film. The gold film was deposited by thermal evaporation on a standard microscopic cover glass.

In the next processing step, the Ormosil layer was lithographically structured with a two-step projection lithography approach.

First, the required structures were designed on a computer and printed onto an A4 copy trans parency. This transparency was imaged with a demagnification factor of 10:1 onto a chromium-covered glass substrate with a diameter of 25 mm and 1 mm thickness coated with positive-tone photoresist S1805 (Dow Chemical). The height of the chromium layer was about 100 nm. For illumination a 410 nm high power LED source (ENFIS) was used. After illumination, the illuminated areas of the photoresist were dissolved in an aqueous basic solution. This enabled to etch the chromium layer at defined regions and generate an intermediate mask.

In the second step, this mask was finally imaged onto the Ormosil layer with a demagnification factor of 100:1 by use of an inversely operated standard microscopy setup [41, 42]. This was experimentally realized by placing the mask in the image plane of a 100× microscope objective with a numerical aperture (NA) of 1.4 (Zeiss). For illumination a 365 nm high power UV LED (Roithner) was used to initiate the polymerization process. After development of the sample in isopropanol, the cross-linked material remained on the gold-covered glass substrate. The individual gates were realized on a footprint of 10 µm × 20 µm.

2.2. Optical characterization technique

The investigation of the functionality of the gate structures was performed using leakage radiation microscopy (LRM) [43–49]. Detailed descriptions of this technology were reported by Drezet et al. in [45]. The LRM was equipped with an 100 oil immersion microscope objective (Zeiss) with a NA of 1.4. A 4f-lens system in the optical×beam path permitted simultaneous observation of the image plane and the back focal plane.

The laser, used for SPP excitation in the experiments, was a mode locked titanium:sapphire oscillator (Kapteyn Murnane Labs) at 800 nm center wavelength and 40 nm spectral width, resulting in a Fourier-limited pulse duration of 27 fs. The laser was focussed on the structures by an aspheric lens with 4 mm focal length and 0.55 NA, giving a diffraction limited focal spot diameter of 750 nm. Two phase-coupled laser beams were generated by means of a Michelson interferometer. The beam from the oscillator was divided into two orthogonal beams by a polarization independent 50/50 beam splitter. The beams were sent onto retro-reflecting plane mirrors at the end of the 20 cm long interferometer arms. The mirrors were mounted in 2-axis mirror mounts (Thorlabs) to enable spatial adjustments of the retro-reflected laser beams by tilting the mirror. The mirror mounts were mounted on z-translators (Thorlabs) to adjust the optical path lengths of each interferometer arm individually and hence the phase difference between the two beam replicas. The beams from the interferometer arms were combined by the same beam splitter and send to the LRM focusing lens This provides the possibility to position each laser focus with a spatial accuracy of about 100 nm and to adjust the phase difference in steps of π/3.

SPP waveguide modes were locally excited by focussing the laser beam onto the edges of triangular incoupling taper structures of the waveguides. The effective SPP mode index was directly determined from the waveguide signature in the back focal plane images [46] to 1.21.

Depending on the relative phases φA and φB of the launched SPPs in the input waveguides A and B, respectively this structure acts as a phase-dependent switching element, as it is demonstrated by the numerical simulations based on finite-difference time-domain simulations [48,50–52] and their experimental verification by means of LRM in Fig. 1.

However, it should be noted, that the intensity of SPPs in the dielectric structures underly damping effects [43]. This implements, that all logic elements shown in this paper will not be comparable with the mathematic description of boolean logic networks, since only a small part of the energy which is coupled into the system can be extracted from the output ports. Nevertheless, even electronic logic elements are not capable to maintain this feature in the first place, since logic operations and generation of output signals are performed by different stages, where in the latter the signal levels are restored [26].

Despite the absence of this logic level restoration the plasmonic waveguide logic elements deliver an output signal which can be interpreted with respect to a descend threshold level as on and off states, rather than defining the binary “1” and “0” signals.

3. Results and discussion

3.1. Plasmonic NOT, AND, OR, and XOR gates

For the investigation of logic operations of the waveguide junction, SPP modes were excited in the input waveguides, as it is shown in the darkfield LRM images in Fig. 1. It shall be noted that this one principal structure can simultaneously act as different gate elements. The logic NOT, AND, OR, and XOR gate operations are only depending on the phase difference of the input SPPs and the threshold between logic on and off levels. The application of certain threshold levels is equivalent to the electronic counterparts, where only a certain voltage range is defined as on or off state [26] of a logic element.

3.1.1. Plasmonic NOT gate operation

If only one SPP mode is excited in input A, it was found in numerical simulations and in the experiment that a part of the SPP intensity was coupled from the junction into the output waveguide, see Figs. 2(a) and 2(b). Together with a control signal in the other input (control) waveguide C this already implements a NOT gate operation. The logic table is given in Fig. 2(d). The SPP state in the output waveguide can be switched from off to on state by maintaining a phase difference of π between input and control signals. The output signal remains high as long as only the control signal is present. Applying a signal to input A allows switching the output signal from on to off, as can be seen in the comparison of the Figs. 2(b) and 2(c). The intensity ratio of this two states was determined to be 8 dB.

 figure: Fig. 2

Fig. 2 FDTD simulation of only one excitation laser pulse (a). Experimental realization of an NOT gate (b),(c) with its respective truth table (d). The excitation laser pulses offer a phase difference of π, causing no SPP intensity in the vertical waveguide in the case of two excitation laser pulses. The differences of simulated and experimental results may be due to the limited resolution of the fabrication process. The scale bar represents 5 µm.

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3.1.2. Plasmonic AND and OR gate operations

The realization of AND and OR gate operations requires two input signals to be considered rather than one input and one control signal as in the previous case. Implementation of AND (for logic table see Fig. 3(h)) and OR (logic table in Fig. 3(d)) gates was realized by the same interference behavior, but with different thresholds for on and off states: In the case of one input signal, either in input A or B, a part of the SPP was coupled into the output waveguide (see Figs. 3(a) and 3(b)). The intensity of the output waveguide was 9 dB higher compared to the case if no input was excited at all.

 figure: Fig. 3

Fig. 3 Experimental realization of an OR gate (a)–(c) and an AND gate (e)–(g) with the associated truth tables (d),(h) respectively. The experimental difference between the shown OR and AND gates is just the level of the set threshold for recognition of a certain intensity as off state, as is described in detail in Sec. 3.1.2. This difference in threshold is depicted in the use of higher camera sensitivity in the images (a)–(c), compared to the images (e)–(g). The excitation laser pulses offer a phase difference of 0, resulting in a propagating SPP in the vertical waveguide. The scale bar represents 5 µm.

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If two laser pulses with no phase difference (|φA − φB| = 0) were used to excite the SPP modes in the input waveguides A and B, as is shown in Fig. 3(c), the intensity state of the output waveguide is 13 dB higher than in the case of no SPP excitation at both input ports.

By defining the threshold for the on state to be below 9 dB, the truth table for this operation is consequently on for one input signal. For two input signals the 13 dB output signal remains in the on state. This operation reveals an OR gate behavior. The OR operation required higher camera sensitivity in order to show the output signal in case of one port excitation, as it is shown in Figs. 3(a)–3(c).

If the threshold for an on state is now defined to be above 9 dB, the truth table changes to off for zero or one input signal, respectively, and on for two input signal. This is consistent with the truth table of an AND gate. To depict the lower threshold required for AND operation, the camera sensitivity in Fig. 3(e)–3(g) was reduced, so that no output signal is visible when only one input signal is present.

3.1.3. Plasmonic XOR gate operation

If the phase difference between the two input signals was |φAφB| = π (see Fig. 4(c)), the intensity of the output waveguide was just about 1 dB higher in case of two excitation laser pulses compared to no input excitation at all. Thus, if the threshold for an on state is defined above 1 dB but below 9 dB, the truth table yields off for zero or two input signals, respectively, and on only in case of one excitation laser pulse, as it is shown in Figs. 4(a)–4(c). This reveals an XOR gate behaviour. The logic table can be found in Fig. 4(d).

 figure: Fig. 4

Fig. 4 Experimental realization of an XOR gate (a)–(c) with the associated truth table (d). The excitation laser pulses offer a phase difference of π, causing no SPP intensity in the vertical waveguide in the case of two excitation laser pulses. The scale bar represents 5 µm.

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For the case of no input excitation no SPPs can be observed in the guiding structures, and it is therefore not supported with darkfield LRM images.

3.2. Plasmonic half-adder

The combination of an AND and an XOR gate together with a splitting element and a phase shift line results in a half-adder. The resulting structure is shown in Fig. 5(a). The incoupling sections of the input waveguides are bend about half the intersecting angle, so that both input ports A and B point in vertical direction.

 figure: Fig. 5

Fig. 5 Experimental realization of a plasmonic half-adder, generated with the combination of an XOR and an AND gate (a),(c)–(e) with the associated truth table (b). Input port A is connected with both gates by a straight waveguide (blue dashed line). Input port B is connected with the XOR gate by a straight waveguide (yellow dashed line) whereas it is connected with the AND gate by a delay waveguide (red dashed line). This delay waveguide offers a phase shift of π, compared to the waveguide from the A input port to the AND gate (blue dashed line). The excitation laser pulses offer a phase difference of π, maintaining, in combination with the mentioned phase delay, the correct operation of both gates. This is described in detail in Sec. 3.2. The scale bar represents 5 µm.

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Input port A of the half-adder provided input to both gate structures via a straight waveguide (see blue dashed line in Fig. 5(a)). Input port B is connected to the upper gate structure by a straight line (see yellow dashed line in Fig. 5(a)), whereas the lower gate structure is connected with a smoothly bend delay waveguide (see red dashed line in Fig. 5(a)). This delay waveguide provides a longer path length than the waveguide connecting input port A with the lower gate structure (blue dashed line in Fig. 5(a)). In this way two SPPs, excited at the input ports, have an additional phase difference of π at the lower gate structure between each other. For two coherent SPPs, excited at the input ports with a phase shift of π, the total phase difference of the SPPs is π at the upper gate structure and 2π at the lower gate structure. This enables their correct operation as XOR and AND gates, respectively.

Consistent with the logic tables of the AND and XOR gates (cf. Figs. 3(h) and 4(d)), the output waveguide of the XOR gate produced on states when only one of the input ports A or B were excited. This output waveguide is referred to as sum (s) output. At the same time, the output port of the AND gate produced off states. This output waveguide is referred to as carry (c) output.

If now input ports A and B are excited simultaneously with a phase difference |φAφB| = π the XOR gate produced an off state in the sum output of the half-adder. However, in this case the input signals to the AND gate are both in the on states. Consequently the AND gate produced an on state in the carry output. Again it should be noted that the AND operation of this gate is assured by the presence of the delay waveguide.

Because of ohmic and radiative losses inside the waveguides the SPP intensities at the end of the s and c waveguides were lower compared to the single gate structures described in 3.1. The signals of s and c outputs were thus measured to 7 and 9 dB, respectively.

This structure represents a plasmonic model system for the binary addition of two one bit input signals, each to input A and input B, respectively. The on state of the s output provides the results for “1+0” and “0+1” operations, whereas the on state of the c output gives an overflow bit for the “1+1” operation. The whole half-adder was fabricated on an area of only 10 µm × 28 µm. For further combinations to a full-adder and more complex calculation units, the c output can be connected with one input port of a next half-adder stage. The functionality of the presented half-adder furthermore exploits the very high accuracy of the microscopic projection technique used for the fabrication of the structures.

4. Conclusion

In conclusion, we experimentally have demonstrated ultrafast switching of SPP signals and logic NOT, AND, OR, and XOR gate operations using a simple dielectric waveguide model system. The SPP waveguide systems have been realized on an area of 10 µm 20 µm by high precision microscopic lithography. The functionality of the gate structures ×has been visualized by leakage radiation microscopy. Experimental results have been supported by numerical FDTD simulations yielding good agreement with our observations. Possibilities for high clock rate operation of the produced gate structures in the order of 1 Tbit/s have been pointed out. As demonstration of the capabilities of the fabrication process a fully functional half-adder has been realized on footprint of only 10 µm × 28 µm, integrating several cascaded SPP waveguide components and logic elements.

Acknowledgments

The authors acknowledge financial support of this work from the Deutsche Forschungsgemein-schaft (DFG, SPP1391: ”Ultrafast Nanooptics” and SFB/TRR123: ”Planar Optronic Systems”) and support of the Laboratorium of Nano- and Quantenengineering (LNQE). The authors further acknowledge support from Hannover School of Nanotechnology (HSN).

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Figures (5)

Fig. 1
Fig. 1 FDTD simulation (a),(e), darkfield LRM (b),(d) and Brightfield microscopy images(c) of plasmonic gate structures. The structures are made of Ormosil on a thin gold layer atop a standard microscopic cover glass. The diagonal waveguides are 20 µm long. The vertical waveguide is 10 µm long. All structures are 320 nm wide and 300 nm high. The excitation laser pulses offer a phase difference of 0 (a),(b) or π (c),(d), respectively, causing a switching of the SPP intensity in the vertical waveguide. The differences of simulated and experimental results may be due to the limited resolution of the fabrication process. The scale bar represents 5 µm.
Fig. 2
Fig. 2 FDTD simulation of only one excitation laser pulse (a). Experimental realization of an NOT gate (b),(c) with its respective truth table (d). The excitation laser pulses offer a phase difference of π, causing no SPP intensity in the vertical waveguide in the case of two excitation laser pulses. The differences of simulated and experimental results may be due to the limited resolution of the fabrication process. The scale bar represents 5 µm.
Fig. 3
Fig. 3 Experimental realization of an OR gate (a)–(c) and an AND gate (e)–(g) with the associated truth tables (d),(h) respectively. The experimental difference between the shown OR and AND gates is just the level of the set threshold for recognition of a certain intensity as off state, as is described in detail in Sec. 3.1.2. This difference in threshold is depicted in the use of higher camera sensitivity in the images (a)–(c), compared to the images (e)–(g). The excitation laser pulses offer a phase difference of 0, resulting in a propagating SPP in the vertical waveguide. The scale bar represents 5 µm.
Fig. 4
Fig. 4 Experimental realization of an XOR gate (a)–(c) with the associated truth table (d). The excitation laser pulses offer a phase difference of π, causing no SPP intensity in the vertical waveguide in the case of two excitation laser pulses. The scale bar represents 5 µm.
Fig. 5
Fig. 5 Experimental realization of a plasmonic half-adder, generated with the combination of an XOR and an AND gate (a),(c)–(e) with the associated truth table (b). Input port A is connected with both gates by a straight waveguide (blue dashed line). Input port B is connected with the XOR gate by a straight waveguide (yellow dashed line) whereas it is connected with the AND gate by a delay waveguide (red dashed line). This delay waveguide offers a phase shift of π, compared to the waveguide from the A input port to the AND gate (blue dashed line). The excitation laser pulses offer a phase difference of π, maintaining, in combination with the mentioned phase delay, the correct operation of both gates. This is described in detail in Sec. 3.2. The scale bar represents 5 µm.
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