Controllable optoelectric composite logic gates based on the polarization switching in an optically injected VCSEL

Based on the polarization switching mechanism in an optically injected vertical cavity surface emitting laser (VCSEL), and the new electro-optic modulation theory, we propose a novel approach to implement optoelectric logic gates. Here, the two linearly polarized lights from the output of the laser are considered as two logic outputs. Under the electrooptic modulation, one of the logic outputs is the NOT operation with the other one. With the same logic input signal, we perform various digital signal processing (AND, OR, XNOR, NAND, NOR and XOR) in the optical domain, controlling the logic operation of the applied electric field between the two logic input signals. On this basis, the logic operation of half-adder is further implemented. ©2015 Optical Society of America OCIS codes: (230.3750) Optical logic devices; (140.7260) Vertical cavity surface emitting lasers; (260.5430) Polarization. References and links 1. F. Koyama, “Recent advances of VCSEL Photonics,” J. Lightwave Technol. 24(12), 4502–4513 (2006). 2. S. F. Liu, G. Xia, J. G. Xia, and Z. M. Wu, “Improving chaotic carrier fundamental frequency in VCSELs with optical feedback by strong light injection,” Wuli Xuebao 57(3), 1502–1505 (2008). 3. Y. H. Hong, J. Paul, and P. S. Spencer, “The effects of polarization resolved optical feedback on the relative intensity noise and polarization stability of vertical-cavity surface-emitting lasers,” J. Lightwave Technol. 24(8), 3210–3216 (2006). 4. M. A. Arteaga, H. J. Unold, M. Ostermann, R. Michalzik, H. Thienpont, and K. Panajotov, “Investigation of polarization properties of VCSELs subject to optical feedback from an extermely short external cavitypartII:Experiments,” IEEE J. Quantum Electron. 42(2), 102–107 (2006). 5. V. M. Deshmukh, S. H. Lee, D. W. Kim, K. H. Kim, and M. H. Lee, “Experimental and numerical analysis on temporal dynamics of polarization switching in an injection-locked 1.55-μm wavelength VCSEL,” Opt. Express 19(18), 16934–16949 (2011). 6. J. Liu, Z. M. Wu, and G. Q. Xia, “Dual-channel chaos synchronization and communication based on unidirectionally coupled VCSELs with polarization-rotated optical feedback and polarization-rotated optical injection,” Opt. Express 17(15), 12619–12626 (2009). 7. D. Z. Zhong, G. Q. Xia, F. Wang, and Z. M. Wu, “Vectorial chaotic synchronization characteristics of unidrectionally coupled and injected vertical-cavity surface-emitting lasers based on feedback,” Acta Physica Sinica 65(6), 3279–3292 (2007).(In Chinese) 8. D. Z. Zhong and Z. M. Wu, “Complete chaotic synchronization mechanism of polarization mode of VCSEL with anisotropic optical feedback,” Opt. Commun. 282(8), 1631–1639 (2009). 9. D. Z. Zhong, G. Q. Xia, Z.-M. Wu, and X.-H. Jia, “Complete chaotic synchronization characteristics of the linear-polarization mode of vertical-cavity surface-emitting semiconductor lasers with isotropic optical feedback,” Opt. Commun. 281(6), 1698–1709 (2008). 10. D. Z. Zhong and Z. M. Wu, “Manipulation of the vector chaotic polarization of VCSEL output with external optical feedback by electro-optic modulation,” Wuli Xuebao 61(3), 154–163 (2012). 11. T. Katayama, T. Ooi, and H. Kawaguchi, “Experimental demonstration of multi-bit optical buffer memory using 1.55-μm polarization bistable vertical cavity surface emitting lasers,” IEEE J. Quantum Electron. 45(11), 1495– 1504 (2009). 12. P. Guo, W. Yang, D. Parekh, C. J. Chang-Hasnain, A. Xu, and Z. Chen, “Experimental and theoretical study of wide hysteresis cycles in 1550 nm VCSELs under optical injection,” Opt. Express 21(3), 3125–3132 (2013). 13. Y. Li, Z. M. Wu, Z. Q. Zhong, X. J. Yang, S. Mao, and G. Q. Xia, “Time-delay signature of chaos in 1550 nm VCSELs with variable-polarization FBG feedback,” Opt. Express 22(16), 19610–19620 (2014). 14. J. Zamora-Munt and C. Masoller, “Numerical implementation of a VCSEL-based stochastic logic gate via polarization bistability,” Opt. Express 18(16), 16418–16429 (2010). #249969 Received 25 Sep 2015; revised 31 Oct 2015; accepted 1 Nov 2015; published 5 Nov 2015 (C) 2015 OSA 16 Nov 2015 | Vol. 23, No. 23 | DOI:10.1364/OE.23.029823 | OPTICS EXPRESS 29823 15. S. Perrone, R. Vilaseca, and C. Masoller, “Stochastic logic gate that exploits noise and polarization bistability in an optically injected VCSEL,” Opt. Express 20(20), 22692–22699 (2012). 16. M. F. Salvide, C. Masoller, and M. S. Torre, “All-optical stochastic logic gate based on a vcsel with tunable optical injection,” IEEE J. Quantum Electron. 49(10), 886–893 (2013). 17. D. Z. Zhong, Y. Q. Ji, T. Deng, and K. L. Zhou, “Manipulation of the polarization switching and the nonlinear dynamic behaviors of the vertical-cavity surface-emitting laser subject to optical injection by EO modulation,” Acta Physica Sinica 64(11), 134–147 (2015). (In Chinese ) 18. W. L. She and W. K. Lee, “Wave coupling theory of linear electrooptic effect,” Opt. Commun. 195(1–4), 303– 311 (2001). 19. T. Kawanishi, T. Sakamoto, and M. Izutsu, “High-speed control of lightwave amplitude, phase, and frequency by use of electrooptic effect,” IEEE J. Sel. Top. Quantum Electron. 13(1), 79–91 (2007). 20. M. San Miguel, Q. Feng, and J. V. Moloney, “Light-polarization dynamics in surface-emitting semiconductor lasers,” Phys. Rev. A 52(2), 1728–1739 (1995). 21. G. Zheng, H. Wang, and W. She, “Wave coupling theory of quasi-phase-Matched linear electro-optic effect,” Opt. Express 14(12), 5535–5540 (2006). 22. M. V. Hobden and J. Warner, “The temperature dependence of the refractive indices of pure lithium niobate,” Phys. Lett. 22(3), 243–244 (1966). 23. R. Vicente, J. Mulet, C. R. Mirasso, and M. Sciamanna, “Polarization switching dynamics and bistability in mutually coupled vertical cavity surface emitting lasers,” Semiconductor Lasers and Lasers Dynamics II, Proc. SPIE 6184, 6184413 (2006).


Introduction
Vertical-cavity surface-emitting semiconductor lasers (VCSELs), as special type of semiconductor lasers, have many advantages compared to edge-emitting semiconductor lasers, such as low cost in fabrication, low threshold current, compact size, circular outputbeam profile and wafer-scale integration [1].They have attracted some attentions to be applied in optical signal processing, optical buffer memories and optical interconnections.However, because of their circular transverse geometry, VCSELs can emit two linearpolarization (LP) lights (with the polarization direction along one of two orthogonal directions associated with crystalline or stress orientations, referred to x and y).And the polarization switching (PS) and the polarization bistability often occur when they are subjected to current or external light injection [2][3][4][5][6][7][8][9][10].These phenomena are often considered as a drawback, degrading the laser performance.At present, they can also be generalized to apply some areas of great concern, such as polarization switch, polarization multiplexing and demultiplexing and optical logic gates devices [11][12][13][14][15][16][17].It is a very attractive scheme that optical logic devices are designed by means of the PS of an optically injected VCSEL.
According to a few of recent studies, based on the PS in an optically injected VCSEL, there are several typical schemes for implementing different types of optoelectric logic gates and all-optical ones.For example, some logic gates, such as OR, NOR, and NAND, can be obtained by the interplay of the PS, the aperiodic current modulation and the spontaneous emission noise in an optically injected VCSEL [14].Besides, the logical OR and AND can be implemented, using the interplay of the PS and the external light injection [15].At last, the logical OR and AND can be performed, based on the interplay of the PS and the center frequency detuning between the master VCSEL and the slave one [16].However, in these above-mentioned schemes, the PS is very sensitive to the injection current, optical injection strength and the center frequency detuning [6][7][8][9][10].The slight perturbations of these parameters can induce the change of the polarization state.As a result, the output logic state will be varied.Therefore, these logic gates have poor stability.To achieve stability of these basic logic gates, the numerical values for the parameters of the laser need to be strictly limited in a small range [2][3][4][5][6][7][8][9][10].In addition, only some basic logic gates can be implemented.
In our previous work [17], we proposed a novel scheme to control the PS in an optically injected VCSEL by electro-optic (EO) modulation, in which, with the increase of the applied electric field, the PS of the slave VCSEL with parallel optical injection (POI) appears periodic oscillation.The PS can be stably controlled when the applied electric field is fixed at a certain value.The results presented in our previous work will help to obtain different types of logic gates, which may be stably controlled by EO modulation.In this paper, we explore the implementation of some logic operations, such as AND, NAND, OR, NOR, XOR, XNOR and half-adder, using the PS of the optically injected VCSEL and the new EO modulation theory [18].So far, the technology of the VCSEL with 850 nm tends to mature, its response frequency can be greater than 40GHz, and its transmission rate has reached 10Gb/s.On the other hand, the modulation frequency of EO modulator based LiNbO 3 crystal can reach 40GHz [19].Therefore, the EO modulation speed of periodically poled LiNbO 3 (PPLN) can match the responce time of the VCSEL.Based on the above-mentioned consideration and the PS in an optically injected VCSEL, we present a scheme of optoelectric composite logic gate, shown in Fig. 1.Here, the M-VCSEL is master VCSEL; the S-VCSEL is slave VCSEL.The M-VCSEL and the S-VCSEL have both operating wavelength of 850nm and a threshold current of 6.8 mA.They are driven with a low noise current source (Tektronix LDC202 200mA), and temperature controlled within 0.01 °C.The optical isolator 1 (IS 1 ) ensures that the light from the output of M-VCSEL propagates unidirectionally to the polarization beam-splitter 1 (PBS 1 ).The IS 2 and the IS 3 are used to avoid the light from the PBS 2 to feed back into PPLN.The IS 4 ensures that the light from the PBS 3 is avoided to feed back into the S-VCSEL.An optical variable attenuator (VA) is placed in the left-side of the S-VCSEL to control optical injection strength.The applied electric filed E 0 is along the x-direction of the crystal coordinate system.Suppose that the light from the M-VCSEL propagates along the ydirection in the periodically poled LiNbO 3 (PPLN) crystal, the polar angle θ = π/2 and the azimuth angle φ = π/2.So for a uniaxial crystal PPLN, the unit vector of o-light and e-light a = (1, 0, 0) and b = (0,0,1).This means that the o-light and the e-light are along the x-direction and the z-direction in the PPLN crystal, respectively.With a fixed injection current, the M-VCSEL emits the x-LP and the y-LP components, which are separated by the PBS 1 .The x-LP from the PBS 1 is considered as the original input of the o-light in the crystal because that the x-LP component is along the polarized direction of the o-light.The y-LP from the PBS 1 is considered as the original input of the e-light when it is aligned with the poarized direction of the e-light (z-direction) by the Faraday rotator 1 (FR 1 ) and the half wave plate1 (HWP 1 ).Under the effect of an applied electric field E 0 , the two LP components are subject to EO amplitude modulation in the PPLN crystal.The output o-light from the PPLN, as the x-LP component, is parallel injected into the S-VCSEL by the mirror 2 and PBS2.The output elight, as the y-LP component, is parallel injected into the S-VCSEL by the PBS2 when its polarized direction is aligned with the y-LP by the HWP 2 and the FR 2 .The output x-LP and y-LP components from the S-VCSEL with POI are considered as the logic outputs Y 1 and Y 2 , respectively.

Theory and model
Based on the spin flip model of VCSEL presented by Miguel [20], the rate equations of the M-VCSEL are modified as where the subscript M refers to the M-VCSEL, and the subscript x and y represent the x-LP and y-LP components, respectively; E is the complex amplitude of the light field; N is the total carrier concentration; n is the difference in concentration between carriers with spin-up and spin-down; k = 1/(2τ p ), τ p is the carrier photon lifetime; γ e is the nonradiative carrier relaxation rate; a is the line-width enhancement factor; γ s is the spin relaxation; γ a and γ p are the dichroism and birefringence, respectively; μ M = (Γg/k) [I M /(2eVγ e )-N 0 ] (μ M is the normalized injection current which equals to 1 at the lasing threshold current), Γ is the field confinement factor to the active region, g is the differential material gain, e is the electron charge, V is the volume of the active region, I M is the injection current, N 0 is one half of the transparency carrier density (i.e., the transparency carrier density per spin orientation); β sp is the spontaneous emission rate; ξ 1 and ξ 2 are, respectively, two independent complex Gaussian white noise events with zero mean and 1 variance.From Fig. 1, it is known that the x-LP component is along the direction of the o-light from the PPLN crystal, and the y-LP component is aligned with the direction of the e-light by the FR 1 and HWP 1 .Based on these conditions, the x-LP and y-LP components are considered as the original inputs of the o-light and e-light, respectively.So we have where U x and U y mean the complex amplitude of the o-light and e-light, respectively; ħ is Planck constant; S A is the effective area of light spot; V is the volume of the active layer of the VCSEL; υ C is the light velocity in vacuum.T L = 2n g υ C /L v denotes the round trip time in the laser cavity, L v is the length of laser cavity, n g is the effective refractive index of the laser active layer; ω 0 is the central frequency of the laser pulse emitted from the M-VCSEL; n 1 and n 2 are the undisturbed refractive indexes of the x-LP and the y-LP, respectively; τ is the delay of the light propagating from the M-VCSEL to the S-VCSEL.Because of phase mismatch and the weak second-order nonlinear effects, the wave-coupling equations of linear EO effect for two LP components in the PPLN crystal are described as [21] 1 2 ( , ) ( ) ( , )exp( ) ( ) ( , ), here and the effective EO coefficients 1 , , ( ) , where {j, k, l} = {1, 2, 3}(the same as below); ε jj = n jj 2 and ε kk = n kk 2 denote the diagonalized electric permittivity tensor elements; r jkl is the EO tensor elements; a and b are the unit vector of the x-LP and the y-LP, respectively; c is the unit vector of the applied electric field.a = (sinφ, -cosφ, 0) and b = (-cosθ cosφ, -cosθsinφ,sinθ) in a uniaxial crystal PPLN.Here, θ and φ are the polar angle and the azimuth angle, respectively.c = (0,1,0) when the applied electric field E 0 is along the direction of the z-axis in the crystal; f 1 = [1-cos(2πD) + isin(2πD)]/(iπ) is the first-order positive Fourier coefficient; f 0 = 2D-1 is the zero-order Fourier coefficient; f -1 = [1-cos(−2πD) + isin(−2πD)]/(-iπ) denotes the first-order negative Fourier coefficient; D is the duty ratio; +  is the length of the positive domain; 1 −  is the length of the negative domains; Δk = k x -k y + K 1 , where K 1 = 2π/Λ is the first order reciprocal lattice vector, Λ is the poled period of crystal, k x = 2πn 1 υ C /ω 0 and k y = 2πn 2 υ C /ω 0 denote the wave vector of the x-LP and y-LP at ω 0 , respectively; k 0 is the wave vector of light in vacuum.Considering K 1 closes to the wave vector mismatch, k x -k y , and neglecting those components that make little contributions to EO effect because of phase mismatch, we derive the analytical solutions of Eqs. ( 5) and ( 6) as follows where x y y x x y x y and . 2 When the two LP components subjected to EO modulation are injected into the S-VCSEL, we have where E px and E py , respectively, denote the amplitude of the x-LP and the y-LP that are subjected to EO modulation.In this case, the rate equations of S-VCSEL to parallel optical injection are [2,7-10] where the subscript S refers to the S-VCSEL; Δω is the center frequency detuning between M-VCSEL and S-VCSEL; k inj is the injection strength of the light, which is determined from the ratio of the injection power and the output power of the M-VCSEL; μ s = (Γg/k) [I S /(2eVγ e )-N 0 ] is the normalized injection current, I S is the injection current.

Results and discussions
First, we numerically calculate the Eqs.( 1)-( 3) and ( 21)-( 23), using the four-order Rung-Kutta method.The numerical values in calculation are given in Table1, where n 1 and n 2 are from the Shellmeier refractive formula of the PPLN crystal [22].The spontaneous emission noise terms in Eqs. ( 1) and ( 20) are ignored in the following calculation, owing to the slight influence on the PS of VCSEL [23].According to the related reports [14][15][16][17], the PS or logic output states of an optically injected VCSEL depends on some key parameters, such as the injection current of the M-VCSEL and the S-VCSEL, μ M and μ S , as well as optical injection strength k inj.As presented in [17], for any injection current μ M of the M-VCSEL, with the increase of the applied electric field, the polarization of the S-VCSEL with POI oscillates periodically when μ S = 1.2 and k inj = 10ns −1 (the same below).And the S-VCSEL may emit any polarization light if the applied electric field is fixed at a certain value.These results presented in [17] can help to realize various types of controllable optoelectric logic gates.On this basis, we suppose that the injection current μ M equals to the sum of two square waves, μ M = μ 1 (t) + μ 2 (t), that encode the two logic inputs.They are named as A 1 and A 2 , respectively.Since the logic inputs can be either 0 or 1, there exist four distinct input sets: (0, 0), (0, 1), (1, 0), (1,1).The logic input sets (0, 1) and (1, 0) yield the same μ M value.Therefore, the four distinct logic sets is reduced to three μ M values.Here, it should be more convenient that the parameters, such as the mean value μ 0 , and the modulation amplitude Δμ, are introduced in this paper.So, instead of the four logic inputs, three injection current values, such as μ M1 = μ 0 -Δμ, μ M2 = μ 0 and μ M3 = μ 0 + Δμ, are considered as logic inputs.Besides, the x-LP and the y-LP from the S-VCSEL output are set as two logic outputs, Y 1 and Y 2 .With only the x-LP component emitted from the S-VCSEL, Y 1 = 1 and Y 2 = 0; If the output of the S-VCSEL is only the y-LP component, Y 1 = 0 and Y 2 = 1.In this case, it is possible that some logic gates, such as AND, NAND, OR, NOR, XNOR, XOR and so on, are implemented.For this purpose, in the following we will elaborate the implementation scheme and logical operation method of the above-mentioned logic gates.Figure 2 shows the logic operations of some optoelectric composite logic gates, such as AND, NAND, OR, NOR, XNOR and XOR, when Δμ = 0.066, μ 0 = 1.114, μ S = 1.2 and k inj = 10ns −1 .Here, E 0 = 0kV/mm and E 0 = 1.326kV/mm are used to control logic gates; (A 1 ,A 2 ) = (0,0) when μ M (μ 0 -Δμ) = 1.048 [see Fig. 2(a)]; if μ M = μ 0 , (A 1 ,A 2 ) = (0,1) or (1,0); while μ M (μ 0 + Δμ) = 1.18, (A 1 ,A 2 ) = (1,1).Besides, the logic symbol of the E 0 is defined as 0 E  .We suppose that 0 E  = 0 when E 0 = 0kV/mm, and 0 E  = 1 if E 0 = 1.326kV/mm.It is found from Fig. 2 that various digital signal processing, such as AND, NAND, OR, NOR, XNOR and XOR, are performed, using different logic operations of the applied electric field between the logic inputs A 1 and A 2 .In the following, we take logical AND and NAND as an example to elaborate their logic operations.and its associated logical outputs.From these tables, one sees that various logic operations, such as AND, NAND, OR, NOR, XNOR and XOR, can be performed by controlling the logical operations of the applied electric field between the two logic inputs.
To implement half-adder, we further present its schematic diagram, displayed in Fig. 3. Here, two slave VCSELs have the same injection current μ s , and are subjected to the same optical injection.And μ S = 1.2 and k inj = 10ns −1 .In additional, two master VCSELs have the same injection current μ M .The output x-LP component from the S-VCSEL1 is considered as the Carry (C) for half-adder; the output y-LP component from the S-VCSEL2 is assumed as the Sum (S) for half-adder; 01 E  is the logic of the electric field applied on the PPLN1 crystal, 02 E  denotes the logic of that applied on the PPLN2 crystal.Figure 4 displays the time traces of the logic inputs, the injection current μ M , the applied electric field, the output polarization and the logic outputs of Carry and Sum for half-adder operation.Table 5 further shows the relationship between the logic inputs, the injection current, the external applied electric field, the output polarization and its associated logic output for the half-adder operation.From Fig. 4 and Table 5, it is found that, when 01 E  = A 1 ⋅A 2 , the Carry output is the AND operation , the Sum is the XOR operation between A 1 and A 2 .That is to say, S = A 1 ⊕A 2 , C = A 1 •A 2 .This means that the logic operation of the half-adder can be implemented by controlling the logic operation of the applied electric field.

Conclusions
In the external optically injected system composed of master VCSEL and slave one, we put forward a novel implementation scheme for optoelectric logic operations, using the PS law of slave VCSEL and new EO modulation theory.In this scheme, the x-LP and y-LP components from the slave VCSEL output are considered as two logic outputs, which satisfy logic non operation.When the logic of the electric field applied on PPLN crystal is set as the AND, OR and XNOR operations between the two logic input signals, the output x-LP component, as one logic output, is the AND, OR and XNOR operations, respectively.The logic operations NAND, NOR and XOR are obtained from the other logic output (the output y-LP component).Based on the schemes of the logical AND and XOR, we further perform the halfadder operation.These results have potential applications in controllable optical logic gates with multifunction.

Fig. 1 .
Fig. 1.Schematic diagram of optoelectric composite logic gate based the VCSEL subjected to external optical injection, where M-VCSEL, master VCSEL; S-VCSEL, slave VCSEL; IS, isolator; PPLN, periodically poled LiNbO 3 ; μ M and μ S , the normalized injection current of the M-VCSEL and the S-VCSEL, respectively; PBS, polarization beam-splitter; POI, parallel optical injection; TEF, transverse electric field; HWP, half wave plate; FR, Faraday rotator; M, the mirror; VA, the variable attenutor.The applied electric field E 0 is digital square wave; A 1 and A 2 , logic input signals; Y 1 and Y 2 , logic output signals.

Fig. 2 .
Fig. 2. Time traces of the two logic inputs, the injection current, the applied electric field, the output x-LP and y-LP, and the logic outputs of AND, NAND, OR, NOR, XNOR and XOR operations when μ S = 1.2 and k inj = 10ns-1.Here, (a): time traces of the injection currents and its associated logic inputs; (b): AND and NAND operations; (c): OR and NOR operations; (d) XNOR and XOR operations.

Firstly
, we set 0 E  = A 1 •A 2 for logic AND and NAND operations [see Fig. 2(a) and (b)].When (A 1 , A 2 ) = (0, 0) and 0 E  = 0, Y 1 = 0 and Y 2 = 1, owing to the case that the S-VCSEL outputs the y-LP component.If (A 1 , A 2 ) = (1, 1) and 0 E  = 1, Y 1 = 1 and Y 2 = 0 because that the output is the x-LP component.For (A 1 , A 2 ) = (0, 1) or (1, 0) and 0 E  = 0, Y 1 = 0 and Y 2 = 1 in the case of the output that is the y-LP component.So we obtain Y 1 = A 1 •A 2 , Y 2 = 1 2 A A .This means that the logic operations AND and NAND have been realized.As shown from Fig. 2(c) and (d), considering 0 E  = A 1 + A 2 , we obtain logic operations OR and NOR [see Fig.

Fig. 3 .Fig. 4 .
Fig.3.Schematic diagram of the implementation scheme for logic half-adder operation Here, the upper system is used to realize Carry operation; the lower one is applied to implement Sum operation.The S-VCSEL1 and the S-VCSEL2 have the same injection current μ s , and are subjected to the same optical injection.all parameters here are the same as that in Fig.1; C represents the Carry output for half-adder, and S denotes the Sum output for half-adder; μ M = μ 1 + μ 2 .