caScaded all-optical operationS in a hybrid integrated 80-gb / S logic circuit

We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential MachZehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded alloptical operations for 80-Gb/s on-off keyed data. ©2014 Optical Society of America ociS codes: (060.1155) All-optical networks; (130.7405) Wavelength conversion devices; (130.3750) Optical logic devices; (130.6622) Subsystem integration and techniques.

i i S t r at e g i c w h i t e pa p e r caScaded all-optical operationS in a hybrid integrated 80-gb/S logic circuit table of contentS

introduction
All-optical logic circuits enable the processing of optical data streams at bit rates exceeding 40 Gb/s, for applications such as bit-pattern matching [1], pseudorandom number generation [2], and label swapping [3].A well-known approach for implementing Boolean logic functions in photonic chips is to utilize semiconductor optical amplifiers (SOAs) as the nonlinear optical element of the all-optical logic gates.Compared to alternative nonlinear optical devices such as highly nonlinear fibers [4] or silicon nanowires [5], which rely on ultrafast (Kerr) optical nonlinearities, SOAs have the advantage of large optical nonlinearities based on cross-gain and cross-phase modulation [6], which allow operation at low peak powers (<13 dBm) in a relatively compact (sub-mm) device.The reduced size and power requirements enable, in principle, the integration of complex all-optical logic circuits, with a large number of cascaded gates, on a single chip.On the other hand, because the cross-gain and cross-phase nonlinearities in SOAs are mediated by the creation and recombination of real charge carriers, the operating speeds may be limited by carrier recombination.Operation at data rates beyond 80 Gb/s is possible, using differential schemes [7] and/or optimized filter designs [8][9][10].
There is a large body of literature reporting demonstrations of all-optical logic operations, such as XOR, XNOR, and AND [11][12][13][14], using SOA-based gates.Binary all-optical logic operations have been described for various data modulation formats and at data rates exceeding 80 Gb/s.Binary logic operations may be applicable to high-speed header (bit pattern) recognition or pseudorandom pattern generation.On the other hand, all-optical functionalities acting on a single optical data stream, such as wavelength conversion or bit inversion, can be used for contention resolution, in next-generation all-optical data or packet routing [15] or for time delay generation in radio-frequency (RF) photonics [16].Among other applications for wavelength conversion, all-optical data regeneration has also been demonstrated [17].
Less attention has been paid, however, to the demonstration of complex, multi-stage alloptical logic circuits, where the outputs of logic gates also serve as the inputs to a second series of gates.Multi-stage all-optical logic circuits have potential applications in high-speed computational tasks, for example in neural network implementations [18].All-optical logical gates using SOAs have been demonstrated for different Boolean operations at bit rates ranging from 10 Gb/s to 160 Gb/s [6,11,14,19].The requirements for complex logic circuits, however, are far more stringent than the requirements for single logic operations [20].For example, in a complex circuit, it is necessary to cascade logic gates, i. e. to process signals through a series of logic gates with minimum signal degradation.In the case of SOA-based gates operating on optical signals, the signal at the output of each gate must be conditioned by filtering.In high-speed wavelength conversion demonstrations [19], excellent output signal quality is typically obtained through strong filtering, which may reshape input signals at a second stage of wavelength conversion.Therefore, the demonstration of highspeed cascaded wavelength conversion with minimal degradation of the signal is non-trivial and critical to realizing the potential of all-optical SOA-based logic circuits.
One of the novel aspects of the work presented in this paper is the demonstration of an allpurpose logic chip, consisting of SOAs integrated on a silica photonic lightwave circuit (PLC), that may be flexibly reconfigured to operate as any one of a variety of Boolean operations (data inversion, logical AND, XOR, OR, and NOR), and also as a wavelength converter.The all-optical logic gates discussed throughout the article are Mach-Zehnder interferometers (MZIs) with a nonlinear SOA in each arm.The PLC facilitates the fabrication of the waveguides forming the MZI structures together with their associated filters, attenuators, and phase shifters on a single silica chip, to which the SOAs are bonded by means of a flip-chip hybrid integration process.An alternative approach to the MZI based logic gate is that of the turbo switch which has been used to demonstrate single logic operations such as an XOR gate at data rates exceeding 80 Gb/s [21,22].The turbo switch scheme, however, relies on caScaded all-optical operationS in a hybrid integrated 80-gb/S logic circuit polarization rotation and has the disadvantages of being more difficult to implement in an integrated platform and of requiring higher input power.In this work, we use the hybrid integrated SOA-PLC to demonstrate the cascading of all-optical operations at a data rate of 80 Gb/s.Previous demonstrations of cascaded logic operations were made at data rates of 10-40 Gb/s [23,24].
The organization of the paper is as follows.The principles of operation of SOA-based differential Mach-Zehnder interferometers as optical logic gates will be described and discussed through simulation in Section 2. The fabrication of a multi-purpose logic chip that can be used to demonstrate multiple Boolean logic operations is described in Section 3. Section 4 presents measurements of cascaded logic operations and the corresponding simulation results followed by a brief discussion and conclusions in Section 5.
caScaded all-optical operationS in a hybrid integrated 80-gb/S logic circuit All-optical logic gates based on differential Mach-Zehnder interferometers with an SOA in each arm (SOA-MZI) are depicted in the schematic in Fig. 1(a).Many demonstrations of alloptical processing functions have been implemented using dedicated single-purpose configurations.For example, wavelength conversion is typically carried out using a single SOA followed by a delay interferometer [6].However, we will show that wavelength conversion, inversion, and several binary Boolean logical operations can also be achieved using the layout shown in the figure, by judicious choice of the inputs and their wavelengths and data formats, so that the SOA-MZI can serve as the elementary building block of an integrated all-optical logic circuit.
All-optical logic gates implemented using SOAs rely on the nonlinear amplitude and phase response of the gain of the SOA to injected (pump) light pulses.The pump pulse modifies the carrier distribution in the SOA and induces a temporally varying phase and amplitude response in the semiconductor material [25], which in turn modulates a probe beam co-propagating in the SOA.
On a short time scale (~100 fs), the exciting pulse creates a spectral hole in the energy distributions of carriers, followed shortly by the redistribution of carriers in the energy band (carrier heating).On time scales longer than 1 ps, the changing population of real carriers due to recombination dominates the gain and phase response of the SOA; however, relatively fast gain and phase recovery can be achieved through careful engineering of the SOA, for example modulation doping of the quantum wells and/or designing the gain region for optimal confinement factor [26].A typical example of fast gain and phase recovery dynamics is given in Fig. 1(b), which compares simulations with experimental data [27] for SOAs for which the 1/e gain recovery time of the long-lived tail of the recovery curve is approximately 13-14 ps.
In each arm of the SOA-MZI, the input data pulses modulate the nonlinear gain and phase response of the SOAs, which, in turn, modulates a continuous-wave (cw) probe beam, which is co-propagating with the data pulses.The relative phase in the two MZI arms can be adjusted so that the cw intensity at the exit of the MZI is zero in the absence of data inputs.After filtering the input signal wavelengths at the output of the MZI, the probe wavelength represents the Boolean logical product of the input data.In the differential mode of operation of the MZI, timedelayed copies of the data and clock are also injected into the lower and upper arms, respectively, as shown in Fig. 1(a), in order to reduce or cancel the long-time dynamics of the gain and phase recovery of the amplifiers [7].The SOA model used in the simulations presented in this paper is based on a formalism described previously [27,29].The amplifier is divided into sections to account for propagation and for signal and continuous wave (probe) saturation effects.Amplified spontaneous emission is calculated iteratively [30] and is included as an effective positiondependent value in the time-dependent propagation.The parameters used in the simulations are displayed in Table 1.Good agreement is observed between the measured response [28] of a typical fast-recovery (modulation-doped quantum well) SOA and the simulated gain and phase recovery.

wavelength conversion
A first example of nonlinear optical processing of optical signals is wavelength conversion.Figure 2(a) presents a schematic of a wavelength converter, composed of a non-linear SOA in each MZI arm, a phase shifter that can be tuned to approximately a π-radian phase shift in order to null the interferometer output, and a delay in the data path to one arm with respect to the first arm.The on-off keyed (OOK) modulated data signal arrives at the SOA in the lower arm with a delay with respect to the SOA in the upper arm.A data pulse entering the nonlinear SOA modifies the gain and phase experienced by the cw signal, resulting in light emerging at the output of the interferometer.After a time interval equal to the differential delay, the data pulse enters the SOA in the lower arm, similarly changing its gain and phase response, and effectively cancelling the signal from the first branch at the output of the interferometer, thus re-zeroing the output.Therefore, the modulation of the data pump is transferred to the cw wavelength.The plots in Fig. 2(b) show the spectrum of the cw carrier emerging from the SOA, together with the partially filtered input OOK data signal, in comparison with the simulated spectrum.Here a delayed interference filter, with the peak at the cw wavelength and the null at the input signal wavelength, was used at the output of the SOA.It is apparent that the modulation on the input data signal, at the clock rate of 80 GHz, is transferred to the cw carrier.
caScaded all-optical operationS in a hybrid integrated 80-gb/S logic circuit The modulated output of the SOA-MZI must be filtered in order to separate the wavelength-converted output from the amplified data signal.Figure 3 presents the results of simulations showing the effect of filter bandwidth and filter detuning from the cw carrier wavelength on received signal quality.Wavelength conversion quality depends significantly on the detuning of the output filter with respect to the cw frequency.Good performance at high data rates has been achieved in wavelength conversion based on a single SOA followed by strong filtering using a relatively narrow filter with its center wavelength tuned to the blue side of the cw carrier, which selects the fast dynamic spectral components [19].Narrow bluedetuned filtering, however, broadens the output pulses and can significantly reduce the output power as compared to the input signals.Tight filtering can, therefore, be detrimental from the point of view of cascading multiple gates.
Figure 3 shows a comparison between narrow-band blue-detuned filtering and filtering with a higher bandwidth filter centered on the carrier frequency, for the case of wavelength conversion of pseudo-random (PRBS) data consisting of 2-ps pulses with an 80-Gb/s data rate.The simulations consider N = 1024 bit periods and signal and cw power levels consistent with typical experimental conditions.The eye diagrams are computed assuming a receiver bandwidth equal to 0.75 times the bit rate, and the MZI differential delay fixed at 3 ps.The computed time traces are sampled every 1 ps to 3 ps, and color coded according to the logarithm of the sample density.Pseudoeye diagrams, calculated here assuming optical sampling with a temporal resolution equal to 1 ps, more accurately characterize the time dependence of the optical signals than the received eye diagrams, for which the signal is convoluted with the receiver time response.Signal quality is generally described by the quality factor, defined in Eq. ( 1) as where μ 1,0 and σ 1,0 are the average values and standard deviations of the one-and zerovalued bits (marks and spaces), respectively.The extinction ratio is defined in Eq. ( 2) as ER = 10 log 10 (μ 1 / μ 0 ) .
A high extinction ratio is desirable since even a low-level constant background signal can readily saturate subsequent SOAs, leading to signal degradation in a cascaded gate configuration.
The receiver eye diagrams in the two filtering cases, Figs.The wavelength conversion operation is also highly sensitive to adjustments of the MZI.One such adjustment relates to the relative amplitude between the data input into the upper SOA and its delayed copy, which is injected into the lower-arm SOA.This is defined by the splitting ratio r c , the fraction of the signal power injected into the upper arm of the interferometer.Input data with a quality factor and extinction ratio equal to 20.0 dB and 23.5 dB, respectively, is assumed.Both the quality factor and the extinction ratio strongly depend on the splitting ratio r c , as shown in Fig. 4(a) with an optimum between r c = 0.60 and r c = 0.65 (signifying a 2-to-1 power ratio of the data between the upper and lower arms of the MZI).The slight shift in the optimum coupling ratio between the ER and Q 2 may occur because the gain and phase recovery do not strictly follow an exponential decay, therefore, the fluctuations of the zeros and ones are minimized at different values of the coupling ratio.In the case of pseudoeye diagrams, since the temporal resolution of optical sampling is higher than that of a lightwave receiver adapted to the bit rate, and since the statistics of the signal noise is not Gaussian, a direct relationship between the quality factor and the bit-error rate cannot be immediately established.However, the quality factor and extinction ratio can still be used as measures of signal quality.Figure 4(a) shows that quality factors derived from the receiver and optical sampling eye diagrams for wavelength-converted data are almost identical, in contrast to extinction ratios, which are significantly smaller for the receiver eye diagrams compared to the pseudo-eye diagrams.The eye diagrams and constellation in Figs.4(b) and 4(c), respectively, presented for an optimal splitting ratio of 0.67, illustrate the correlation between degradation in the quality factor and the phase noise.

inversion
The exclusive OR (XOR) operation, acting on two data streams, can form the basis for a logical data inversion function.To perform an XOR operation on two independent data streams, the inputs of the SOA-MZI are set up as in Fig. 1(a), with the two OOK data signals encoded on wavelengths distinct from each other and from the cw probe.Logic inversion (NOT) of Boolean data can be realized by an XOR operation between the data and a periodic pulse stream (clock).Figure 5(a) presents the dependence of the signal quality of the inverted data on the splitting ratio of the differential delay, illustrating that logic inversion presents a different optimal operation point compared to wavelength conversion.This occurs because the two SOAs experience different relative injected average optical power and thus different conditions for the cancellation of the slow dynamics of the SOAs.Therefore, in a logic circuit integrating multiple logic operations, separate tuning of the parameters of SOA-MZIs implementing the logic gates will be required.
Inversion of OOK data can be also used to regenerate degraded signals.An ideal regeneration scheme, characterized by a step (Heaviside) intensity transfer function, could regenerate signals with arbitrarily low input quality to high quality signals.In practice, the output quality from a regenerator depends on input signal characteristics, as well as on the physical limitations of the regenerator.For example, the saturation properties of SOAs can be employed to perform regeneration of optical signals.However, due to the finite recovery time of the carrier population, the gain and amplitude changes produced by each signal pulse in the SOAs depend also on previous signal pulses.This pattern dependence ultimately limits the performance and speed of all-optical operations using SOAs, including regeneration.For the gain and phase recovery times of the SOAs used in this work, which are close to the repetition rate of the input pulses, pattern dependence can still affect output signal quality as shown in a previous study [32].
For an input signal with high quality factor, Fig. 5(b) shows that the inverted signal's Q-factor is limited to approximately 19 dB by the pattern dependence of the SOA.The extinction ratio of the input signal is 20 dB in these simulated curves, and the peak clock power is slightly higher than the peak signal power, in order to achieve optimal signal quality at the output.As the input signal quality decreases, the negative penalty of the inversion operation increases at the expense of a decrease in the output extinction ratio.However, the output Q-factor decreases slowly with decreasing input quality factor, resulting in a Q-factor improvement as high as 2.6 dB at the lowest input quality factor of 14 dB, shown here.

the and operation
The AND operation for OOK data is implemented using a single Mach-Zehnder interferometer with data inputs on both the symmetric and asymmetric ports, as shown in Fig. 6(a).The interferometer is balanced, by adjusting the transmission and phase of its upper and lower arms, to suppress the data B pulses at the output when data A is not present.When the higher intensity pump (data A) pulses are present, they first reach the SOA in the upper arm of the MZI and modify its gain and phase response.Therefore, the MZI becomes unbalanced, allowing the probe pulses (data B) to exit the interferometer.With the arrival of the pump pulses in the lower arm of the MZI a few picoseconds later, the lower arm SOA experiences a similar gain and phase perturbation, thereby rebalancing the interferometer.Thus, the only condition that provides an output, which is set by the filter to be on wavelength B, is when there are pulses on both data A and data B, as shown in the schematic in Fig. 6(b).
The signal quality of the resulting AND product is dependent, as in the case of wavelength conversion and inversion, on the exact balancing of the interferometer, which is controlled by the splitting ratio of the differential delay (see plot in Fig. 7 We designed a multi-purpose logic chip, shown schematically in Fig. 8(a), which can be used to perform optical logic operations using SOA-MZIs as building blocks.The chip consists of four Mach-Zehnder interferometers, which can be used in different combinations to demonstrate the Boolean logic operations on OOK data that were described above.In addition, the chip can be configured to perform Boolean logic operations on phase-shift keyed (PSK) data, which rely on coherent combining of the signals' electric field amplitudes [13,33].A single Mach-Zehnder interferometer, for example, can be used as a wavelength converter, NOT gate, an AND gate, and an XOR, operating on OOK signals.Alternatively, a coherent XOR operation can be demonstrated using the coherent output of two interferometers, and a coherent OR using three interferometers [13,33].The photograph presented in Fig. 8(b) shows a fabricated and hybrid-integrated chip with the silica waveguide layout superimposed graphically.In addition to the circuit shown in the schematic, the fabricated chip also comprises test waveguides and ancillary waveguides used in the prebonding alignment of the SOA chips.In order to demonstrate cascaded operations, signals are routed off-chip, amplified, filtered, and coupled back into the circuit.
The optical logic chip was fabricated by hybrid integration of nonlinear SOAs on a silica PLC substrate.In the PLC circuit, thermo-optic phase shifters, tuned using thin film heaters, are used to control the phase of the signals at the outputs of the MZIs forming the logic gates.In addition to phase shifters, variable attenuators based on MZIs with phase shifter heaters in both arms, were included for precise control of the input power into each SOA, as well as the splitting ratio of the differential delays.As we have seen in the previous section, relatively tight control of amplitudes and phases in each arm of the MZI is required.
The differential delay at the input of each arm of the SOA-MZI is equal to 4 ps.Delayed interference filters, fabricated as asymmetric interferometers with a phase shifter in one arm, and with a free spectral range (FSR) equal to 1 THz, provide on-chip filtering.
To fabricate the multi-purpose optical logic circuit, two chips (commercially sourced devices from CIP Photonics [34]) comprising four SOAs each, were bonded into a recess tub) on the silica PLC substrate.The SOA chips were flip-chip bonded on the silica PLC without the use of an intermediate sub-mount, as illustrated in Fig. 9(a).This integration approach permits the temperature of all active chips on the PLC to be controlled through the substrate, using a single thermo-electric cooler.Eutectic gold-tin solder is used to attach the SOA chips to the PLC, providing a robust bond with excellent long-term stability.Sitespecific solder reflow heaters were used to support multiple integration sites on a single PLC.A key to the hybrid integration approach used for the optical logic circuit was the development of PLC features and fabrication processes required to achieve robust and lowloss integration of the SOA chips.Figure 9(b) shows a typical hybrid integration site on the PLC.Deep recesses, or tubs, are etched into the silica at each integration site.Vertical alignment posts, formed during the multi-step tub etch process, control the vertical position of the SOA chip as well as the final pitch and roll orientation.Electrodes deposited on the bottom of the tub provide electrical contact to each of the SOAs.Wire bonds connect the tub electrodes to the corresponding electrodes on the top surface of the PLC.Gold-tin solder pads are deposited onto the electrodes to provide a stable and reliable solder bond between the SOA and PLC.A heater beneath the electrodes and solder pads is used to melt the solder.The tub heaters allow multiple active components to be integrated on a single PLC without affecting previously integrated sites.

fabrication of a multi-purpoSe all-optical logic chip
Figure 9(c) shows an overview of the hybrid integration process.The integration process makes use of both passive and active alignment techniques.Alignment fiducials are used for initial placement of the SOA into the PLC tub.A semi-automated pitch and roll routine detects and sets the nominal roll and pitch positions to achieve stable electrical contact.An automated alignment optimization routine corrects transverse (Y-axis) position and yaw errors by maximizing optical coupling at facets on opposite ends of the chip.This routine maximizes either optical signals or photocurrent, depending on the application, as a feedback variable to optimize alignment.Once aligned in yaw and the Y-direction, a tracking routine is enabled to preserve transverse alignment throughout the solder bonding process.After the SOA chip is bonded, the n-side (substrate side) of the chip is wire-bonded to the return electrodes on the top of the PLC, completing the assembly.The chip is mounted on a temperature-controlled heat sink and packaged with thermo-electric coolers.Data pulses at 80 Gb/s and the required cw inputs for the demonstration of all-optical logic operations are generated in the set-up shown schematically in Fig. 10.To generate the input optical signal, four copies of pseudorandom bit sequence (PRBS) data with n = 12 (programmed as a PRBS n = 11 sequence, followed by the same sequence inverted) are multiplexed electrically to create a 40-Gb/s data stream, which is used to drive a lithium niobate amplitude modulator.Pulses from a mode-locked laser, driven by a 10-GHz pulse train from the pattern generator, and multiplexed to a 40-GHz signal, are input to the modulator.The 40-Gb/s optical signal at the output of the modulator at 1552.8 nm is then amplified and multiplexed up to 80-Gb/s, using an optical combiner and appropriate delays.The measured duration of the input pulses is 3.2 ps.Two copies each of the data and data bar sequences are produced.Multiple cw laser sources provide the probe signals for the logic gates.The four OOK-modulated inputs (data and data bar) populate all inputs of the chip for the demonstration of coherent logic operations (not in the scope of this article).In the experiments described in the following sections, only two of the MZIs and their optical inputs are used.Polarization rotators align the polarizations of all optical signals to the preferred polarization axis of the SOA chips.In addition to optical signals, electrical inputs to the chip are used for the control of the thermo-optic phase shift heaters and SOAs.
The setup and the multi-purpose logic chip were used to demonstrate cascaded wavelength conversion and wavelength conversion followed by an AND operation, as described in the following sections.

cascaded wavelength conversion
In the first stage of wavelength conversion, data at a wavelength of 1552.8 nm is converted to the cw wavelength of 1548.9 nm.To filter the data pump wavelength and the amplified spontaneous emission (ASE) from the SOAs and the EDFA external to the chip, a 1-nm filter was inserted before the receiver.The filter was adjusted to detune the signal to the blue side of the wavelength conversion, as shown by the blue shifted peak in the figure and the suppressed cw carrier wavelength.The spectrum in Fig. 11(a) shows the modulation of the cw probe after strong filtering of the input data signal.The results for one wavelength conversion, shown in the eye diagram in Fig. 11(b), present a quality factor Q 2 = 14.9 dB, corresponding to a penalty of ~4 dB relative to the input (transmitter) signal.The value of the quality factor is somewhat smaller than that predicted for a single wavelength conversion (Q 2 = 17.6 dB), shown in the computed eye diagram of Fig. 11(c).For the computed eye diagram, the simulation assumes that the output is optically filtered using a 1-nm FWHM super-Gaussian filter of order 4, offset by 120 GHz to the blue side of the cw pump.Modeling assumed Gaussian input pulses with 3.2 ps pulse width, and the differential delay of the MZI set to 4 ps.The receiver frequency response is a fourth order Bessel function which best reproduces the back-toback receiver eye diagrams.The simulation allows the optimization of the received eye diagram by scanning the splitting ratio of the differential delay, the phase bias of the MZI, and the detuning of the 1-nm filter.The simulated eye diagram depicted in Fig. 11(c) corresponds to the best performance, achieved for a splitting ratio r c = 0.65 and a detuning equal to 120 GHz.

experimental reSultS
In measuring the cascaded wavelength conversion, the wavelength-converted signal was amplified off chip, filtered, and then input as a data pump to a second Mach-Zehnder interferometer, as shown schematically in Fig. 12.We filtered the wavelength-converted signal with a 3-nm filter in order to minimize temporal broadening of the signal.
The spectrum displayed in Fig. 13(a) shows that the data pump at 1548.9 nm is suppressed by tens of dB below the wavelength-converted signal.The 1-nm filter used in the receiver is detuned to the blue side of the cw carrier, thereby suppressing the carrier at 1544.9 nm and emphasizing wavelength converted peaks.
The cascaded wavelength conversion eye diagram, shown in Fig. 13(b), exhibits a quality factor Q2 = 9.9 dB, corresponding to a penalty of ~9 dB relative to the quality factor of the transmitter.Thus, each stage of wavelength conversion incurs a 4 to 5 dB penalty in quality factor.It should be noted, that when cascading logic gates, filters should be selected to minimize signal broadening rather than the received eye, in order to obtain the best quality factor or BER results at the receiver after two or more logic gates.The simulated received eye diagram, shown in Fig. 13(c), exhibits similar quality factor (Q2 = 13.5 dB) for parameters that match the experimental conditions.Note that the pseudo-eye diagram, not shown in the figure, is characterized by a higher quality factor (14.2 dB), under the same assumptions, signifying that the total penalty due to repeated wavelength conversion is somewhat smaller than suggested by the receiver eye diagram.

and operation following wavelength conversion
In a second demonstration of cascaded logic operations, we set up an AND gate, whereby the data input for the symmetric port is taken from the output of a wavelength conversion and the data pump from the transmitter is input to the asymmetric data input, as shown schematically in Fig. 14.
Eye diagrams for the input data, the wavelength-converted data (degraded, as expected, relative to the input signal), and the output of the AND gate, are shown in Figs.15(a)-15(c).The quality factor of the input data is Q 2 = 20.5 dB, and the estimated quality factors for the wavelength-converted data and the AND results are Q 2 = 12.5 dB and Q 2 = 7.9 dB, respectively.The larger penalty for the wavelength conversion, compared to the case of the wavelength conversion in the previous section, is attributed to impairments such as polarization rotation in the particular waveguides of the MZI that was used for this wavelength conversion, and which cannot be corrected by adjustments available on the integrated device.
Simulations of the AND operation, assuming an optimized wavelength-converted input (input A) and a strong gate (input B) consistent with the quality of the transmitter data, show that the best expected results feature receiver eye diagrams with Q 2 = 12.2 dB, for a differential delay splitting ratio equal to 0.65 and for the receiver filter blue-detuned by 110 GHz.The corresponding simulated eye diagram is shown in Fig. 15(d).Again, the additional Q-factor penalty in both the experimental and the simulated AND operations is about 4.5 dB.The quality of the eye diagram for the AND operation is lower than expected, in comparison with simulations, at least partially due to the impairment caused by polarization rotation of the signals input to the logic gates, which will detrimentally affect the quality of the wavelength converted data, as well as the quality of the data at the output of the AND.Furthermore, it is important to note that the parameter space affecting eye quality is large with many adjustable parameters.More extensive measurements and possibly the development of more systematic exploration of experimental parameters could yield improved eye quality [31].Captured bit sequences for data input (A), wavelength converted data input (B), as well as for the AND result, are shown in Fig. 16, demonstrating that the device correctly performs the AND logic operation, in spite of the low quality of the signal.It is clear from examination of the bit patterns that the AND function has been successfully demonstrated: pulses are present at the AND output only in the presence of pulses at both data inputs.The significant degradation observed in the AND output could be improved by injecting a holding beam in the second asymmetric data port, in order to maintain the gain and phase response of the SOA steady in spite of the power fluctuations in the data [35].The use of a holding beam is a well-known technique to improve the carrier recovery time of a semiconductor optical amplifier [36], although it does impose more complicated filtering requirements.The model suggests that a holding (cw) beam, injected into each SOA at a different wavelength than the two inputs, results in an improvement in the received Q-factor to 15.8 dB, as well as an open eye diagram, as shown in Fig. 15(e).In this article, we have presented simulations and measurements of two different cascaded operations at 80 Gb/s.Both simulations and measurements show that each operation degrades the quality factor Q2 by up to 5 dB.Therefore, if regeneration is not employed, the number of operations that can be cascaded is limited by the degradation in signal quality occurring after each operation.In order to realize logic functions consisting of multiple sequential gates while maintaining signal quality, it will be necessary to implement all-optical signal regeneration after a specified number of logic operation steps.A number of all-optical techniques can be utilized to achieve regeneration of optical signals, and in this work we show that inversion using SOA-MZIs is an example of such a technique.
A variety of all-optical logic gates and operations can be implemented using SOA-based differential MZIs, by simply changing the choice of input wavelengths and input into the SOA-MZI.Using modeling, we have shown that the optimum operation set points of the MZIs are specific to the type of logic gate, leading to the requirement for on-chip tuning capability for each logic gate.This tuning is achieved in our implementation by thermo-optic phase shifters and variable optical attenuators fabricated on the silica PLC.
Another essential requirement for the realization of complex logic circuits is the cascadability of logic gates.The implementation presented in this article preserves the pulse width of optical signals after each logic gate (as opposed, for example, to approaches that make use of strong filtering) and therefore does not necessitate the reshaping of optical pulses between logic gate stages.
In summary, we have demonstrated through simulations and measurements a platform suitable for performing complex optical logic operations such as pattern recognition and highspeed computation.In this implementation, the fundamental building blocks of complex optical logic circuits, constructed from sequential logic gates, are differential Mach-Zehnder interferometers, with SOAs as the nonlinear optical elements.In the technology platform we have developed for creating logic circuits, all waveguide functions are defined in a silica PLC, and a hybrid integration technique is used to affix the InP-based SOAs onto the silica lightwave circuits.The distinguishing feature of this approach is that the circuit formed by logic gates integrated on a silica PLC can be flexibly configured to implement a range of logic operations, as well as to allow for the cascading of different alloptical operations.

diScuSSionS and concluSion a b o u t l g S i n n o Vat i o n S
LGS Innovations delivers next generation solutions that solve the most complex networking and communications challenges facing the U.S. Federal Government, State and Local Governments, Foreign Governments, and commercial enterprises.LGS offers groundbreaking research and development and builds advanced wireless, optical, and wired products and applications customized for specific mission environments.These solutions provide unique information and security advantages that lead to the operational success of its customers.LGS' offerings include: LGS Innovations is a U.S.-owned company headquartered in Herndon, Virginia, with offices in Colorado, Illinois, Maryland, New Jersey, New Mexico, and North Carolina.Formerly a subsidiary of Alcatel-Lucent, LGS is the exclusive reseller of Alcatel-Lucent products and services to the U.S. Federal Government and any other entity when the end customer is the U.S. Federal Government.LGS maintains strong ties to Bell Labs and its technologies, employing more than 450 scientists and engineers and a total of nearly 700 employees worldwide.To learn more about LGS Innovations, visit www.lgsinnovations.com.

[ 1 ] i n t r o d u c t i o n [ 2 ][ 3 ] 1 4. 1
p r i n c i p l e o f o p e r at i o n & S i m u l at i o n S o f a l l-o p t i c a l l o g i c g at e S fa b r i c at i o n o f a m u lt i -p u r p o S e a l l-o p t i c a l l o g i c c h i p [4 ] e x p e r i m e n ta l r e S u lt S Cascaded Wavelength Conversion

1 4. 2 5 [ 6 ] r e f e r e n c e S a n d l i n k S 6
AND Operation Following Wavelength Conversion[ 5 ] d i S c u S S i o n S a n d c o n c l u S i o n

SimulationS of all-optical logic gateS figure 1 (
figure 1 (a): Schematic of an example of a logic operation (xor gate) based on a mach-Zehnder interferometer with an Soa in each of the two interferometer arms; (b) measured gain and phase dynamics of an Soa upon excitation with 2-ps pump pulses, shown with corresponding simulation, blue and red curves, respectively.the injection current into the 2-mm long Soa was 300 ma, while the input cw power and average probe power (at 10 ghz repetition rate) were 4.5 dbm and −11 dbm, respectively [28].
figure 2 (a): Schematic of wavelength converter Soa-mZi.(b) comparison of the simulated and measured spectra of the output ook data from one Soa together with the modulated cw carrier output (transmitted through a delayed interference filter, which partially suppresses the input signal at -500 ghz).the simulated curve is offset vertically by 10 db, for clarity, while the y-axis shows the Soa power measured with an optical spectrum analyzer.

figure 3 :
figure 3: Simulated received eye diagrams of the wavelength converted signal (a) after filtering with a 120-ghz gaussian filter blue-detuned by 150 ghz from the cw carrier frequency; (b) after filtering with a 300-ghz gaussian filter centered on the cw carrier frequency; (c) pseudoeye diagram for the narrower filter; and (d) pseudo eye diagram for the broader filter.

figure 5 (
figure 5 (a): dependence of the quality factor (solid lines) and extinction ratio (dashed lines) of the inverted signal as a function of the splitting ratio of the differential delay.(b) the Q-factor and er vs. input Q-factor, at the optimal clock power and splitting ratio.regeneration occur when the output quality factor is above the black dashed line.
figure 6 (a): Schematic of and operation with two data inputs.(b) the logic table of the and operation.

figure 8 (
figure 8 (a): Schematic of the multi-purpose all-optical logic circuit showing four mach-Zehnder interferometers that can be used in different configurations to demonstrate boolean operations of xor, coherent or, and, and not.(b) photograph of a chip with the waveguide mask layout superimposed.

figure 9 (
figure 9 (a): Soa flip-chip bonded in a deep-etched recess in a plc sub-mount.(b) top view of plc tub showing features developed for hybrid integration.the dashed outline shows the footprint of the commercial Soa chip.the y-axis and yaw rotation direction are indicated.(c high-level flow chart of the hybrid integration process.

figure 10 :
figure 10: Schematic of measurement set-up for characterization of the logic chip (showing electrical connections as dotted lines) for producing a 10-gb/s signal driving the mode locked laser (mll) and 40-gb/s signal driving the lithium niobate modulator.pc: polarization controller; edfa: erbium-doped fiber amplifier; bpf: bandpass filter.the 10-gb/s signal from the mode locked laser is multiplexed to 40 gb/s, amplified and then multiplexed to 80 gb/s.the output of the 80-gb/s multiplexor is then split into four copies, generating either data or data bar signals depending on the delay.

figure 11 (
figure 11 (a): measured spectrum of a single wavelength conversion; (b) measured eye diagram for a single wavelength conversion; and (c) simulated receiver eye diagram for a single wavelength conversion.

figure 13 (figure 14 :
figure 13 (a): Spectrum; (b) measured eye diagram; and (c) simulated eye diagram for cascaded wavelength conversions.the simulated eye diagram is consistent with measured data and total quality factor (Q2) penalty is ~10 db.

figure 15 (
figure 15 (a): transmitter eye diagram; (b) eye diagram for wavelength conversion creating second data input; (c) eye diagram for the output of the and operation, (d) simulated eye diagram for the and operation without a holding beam, and (e) with a holding beam.

»
Campus and building networking solutions for military bases, hospitals, and corporate centers » Maritime applications for in-port and at sea communications » Global networks (long-haul communications, including undersea cable) » Enterprise voice, video, and data networking » 4G wireless deployable communications for public safety, battlefield, and emergency and first responder communities » Network engineering, integration, and installation » Cloud and data center infrastructure » Video teleconferencing and IPTV suites » Research and development in advanced multimedia/RF communications, cybersecurity, sensing technologies, and photonics