Flexible , compact WDM receivers using cascaded optical and electrical down-conversion

We propose a super-channel flexible wavelength division multiplexing (WDM) receiver architecture. The receiver, which requires no optical filtering, only a pair (I and Q phases) of coherent optical detectors, and an electrical receiver system, can simultaneously recover multiple wavelength-multiplexed channels using cascaded optical and electrical down-conversion. The receiver data capacity increases in proportion to the number of electrical sub-carrier channels. The proposed receiver concept has been described using a six-channel WDM receiver, and a two-channel ( ± 25GHz) receiver IC, which is a key block of the WDM receiver, has been successfully demonstrated with two and three 2.5Gb/s binary-phase-shiftkey (BPSK) modulated channels. ©2013 Optical Society of America OCIS codes: (060.1660) Coherent communications; (250.5300) Photonic integrated circuits; (350.4010) Microwaves. References and links 1. Infinera, “Super-channels: DWDM Transmission at 100Gb/s and Beyond” WP-SC-10–2012 (2013). 2. B. Zhang, C. Malouin, and T. J. Schmidt, “Towards full band colorless reception with coherent balanced receivers,” Opt. Express 20(9), 10339–10352 (2012). 3. J. Renaudier, O. Bertran-Pardo, H. Mardoyan, P. Tran, G. Charlet, S. Bigo, A. Konczykowska, J.-Y. Dupuy, F. Jorge, M. Riet, and J. Godin, “Spectrally efficient long-haul transmission of 22-Tb/s using 40-Gbaud PDM16QAM with coherent detection,” OFC'2012 Conference, OW4C2 (2012). 4. X. Liu, S. Chandrasekhar, P. J. Winzer, T. Lotz, J. Carlson, J. Yang, G. Cheren, and S. Zederbaum, “21.5-Tb/s Guard-Banded Superchannel Transmission over 56x100-km (5600-km) ULAF Using 30-Gbaud Pilot-Free OFDM-16QAM Signals with 5.75-b/s/Hz Net Spectral Efficiency,” in Proceedings of ECOC’2012, post deadline Th3C5 (2012). 5. T. Zami, “What is the Benefit of Elastic Superchannel for WDM Network?” in Proceedings of ECOC’2013, 2226 Sept. 2013 (2013). 6. O. Gerstel, M. Jinno, A. Lord, and S. Yoo, “Elastic optical networking: a new dawn for the optical layer?” IEEE Commun. Mag. 50(2), s12–s20 (2012). 7. J. Renaudier, R. Rios-Muller, L. Schmalen, M. Salsi, P. Tran, G. Charlet, and S. Bigo, “1-Tb/s Transceiver Spanning Over Just Three 50-GHz Frequency Slots for Long-Haul Systems,” in Proceedings of ECOC’2013, post deadline PD2D5 (2013). 8. H. Ito, T. Furuta, S. Kodama, and T. Ishibashi, “InP/InGaAs uni-travelling-carrier photodiode with 310 GHz bandwidth,” Electron. Lett. 36(21), 1809–1810 (2000). 9. M. Urteaga, R. Pierson, P. Rowell, V. Jain, E. Lobisser, and M. J. W. Rodwell, “130nm InP DHBTs with fτ >0.52THz and fmax >1.1THz,” Device Research Conference (DRC), 2011 69th Annual, 281–282 (2011). 10. B. Heinemann, R. Barth, D. Bolze, J. Drews, G. G. Fischer, A. Fox, O. Fursenko, T. Grabolla, U. Haak, D. Knoll, R. Kurps, M. Lisker, S. Marschmeyer, H. Rücker, D. Schmidt, J. Schmidt, M. A. Schubert, B. Tillack, C. Wipf, D. Wolansky, and Y. Yamamoto, “SiGe HBT technology with fτ/fmax of 300GHz/500GHz and 2.0 ps CML gate delay,” Electron Devices Meeting (IEDM), 2010 IEEE international, 30.5.1–30.5.4 (2010). 11. H. Li, B. Jagannathan, J. Wang, T.-C. Su, S. Sweeney, J. J. Pekarik, and Y. Shi, “Technology Scaling and Device Design for 350 GHz RF Performance in a 45nm Bulk CMOS Process,” VLSI Technology, 2007 IEEE Symposium on, 56–57 (2007). 12. J. B. Hacker, M. Urteaga, M. Seo, A. Skalare, and R. H. Lin, “InP HBT Amplifier MMICs Operating to 0.67 THz,” 2013 IEEE International Microwave Symposium, (2013). 13. H. Park, M. Piels, E. Bloch, M. Lu, A. Sivananthan, Z. Griffith, L. Johansson, J. Bowers, L. Coldren, and M. Rodwell, “Integrated Circuits for Wavelength Division De-multiplexing in the Electrical Domain,” in Proceedings of ECOC’2013, Mo4C3 (2013). 14. E. Bloch, H. Park, M. Lu, T. Reed, Z. Griffith, L. A. Johansson, L. A. Coldren, D. Ritter, and M. J. W. Rodwell, “A 1-20 GHz All-Digital InP HBT Optical Wavelength Synthesis IC,” IEEE Trans. Microw. Theory Tech. 61(1), 570–580 (2013). 15. Z. He, W. Wu, J. Chen, Y. Li, D. Stackenas, and H. Zirath, “An FPGA-based 5 Gbit/s D-QPSK modem for Eband point-to-point radios,” 2011 European Microwave Conference, 690–692 (2011) 16. M. Urteaga, R. Pierson, P. Rowell, M. Choe, D. Mensa, and B. Brar, “Advanced InP DHBT process for high speed LSI circuits,” IPRM 2008. 20th International conference, 1–5 (2008). 17. E. Bloch, H.-C. Park, Z. Griffith, M. Urteaga, D. Ritter, and M. J. W. Rodwell, “A 107 GHz 55 dBΩ InP broadband transimpedance amplifier IC for high-speed optical communication links,” in Proceedings of IEEE CSICS, 2013 (2013), pp. 1–4.


Introduction
High spectral efficiency and high channel capacity wavelength division multiplexing (WDM) systems such as Tb/s super-channels [1][2][3][4] are needed to meet future demands for high data rate transmission.For these systems, simple hardware and low DC power consumption are both desirable.Moreover, WDM systems with elastic and flexible channel allocations have been proposed to aid in adapting to variations in network traffic and conditions [5,6].
A conventional coherent WDM receiver consists of a fixed-or flexible-grid optical demultiplexing filter and an array of coherent receivers, as is shown in Fig. 1(a) [1][2][3][4].The photonic IC (PIC) is complex, containing the optical filter and an array of coherent receivers, each coherent receiver containing a local oscillator (LO) laser, a 90 degree optical hybrid, and a pair of balanced photodiodes (PDs).Each pair of PICs and electronics requires its own highspeed electrical interface [1,7].The large number of components and interfaces can increase manufacturing costs and decrease manufacturing yield.The number of PIC components can be reduced by high-speed and high-resolution analog-digital-converters (ADCs) and digital- signal-processors (DSPs), but this imposes a large power penalty and comes at the cost of reduced optical reach [7].
In this work, we propose and demonstrate a new coherent WDM receiver architecture (Fig. 1(b)) which can scale toward Tb/s operation while using only a pair (I and Q phases) of optical detectors to recover multiple wavelength channels.The proposed receiver has a simple circuit configuration, can provide high spectral efficiency, and accommodates a flexible range of channel spacing and of data modulation formats.The complexity of the required PIC is greatly reduced, removing the optical filter and leaving only one set of balanced detectors and an LO laser.Most signal processing is instead performed in electrical integrated circuits (EICs).Sets of optical WDM channels are recovered in the EIC using single-sideband (SSB) mixers and their associated LOs as frequency down-converters.The EIC requires only a single broadband trans-impedance amplifier (TIA).
The channel capacity in the proposed receiver is ultimately limited by the bandwidth of the photodiodes (PDs) and of the de-multiplexing EIC.Very wide bandwidths are now feasible for these components.Uni-travelling carrier (UTC) PDs with 3-dB bandwidth >300GHz [8] and high-speed InP hetero-junction bipolar transistors (HBTs) having powergain cutoff frequencies f max >1THz [9] have both been reported.Even silicon-based transistors have attained 500 GHz f max [10,11].Amplifier EICs operating above 670GHz have been reported [12].Given such components, the proposed receiver architecture can scale beyond 1Tb/s capacity using >125GHz bandwidth PDs and EICs together with dual optical polarizations and 16-QAM modulation.Using 300 GHz photodiodes [8] and transistor amplifiers [12], a single EIC receiver could process 24 WDM channels at 25 GHz channel spacing.Further, in the proposed receiver, the optical channel wavelength allocation can be adjusted dynamically by tuning LO frequencies within the electrical frequency conversion circuits.
In this paper, an extension of [13], we first describe (section 2) the coherent multi-channel WDM receiver concept using cascaded optical and electrical down-conversions.We then describe (section 3) the component IC blocks of a two-channel ( ± 25GHz) implementation of the WDM receiver IC.Finally (section 4) we describe demonstrations of the two-channel receiver IC, including measurements of image rejection and of adjacent channel interference.

A single-chip multi-channel WDM receiver concept
Figure 2 shows a more detailed block diagram of the WDM receiver using, as an illustration, a six-channel configuration with 25GHz channel spacing.The receiver can de-multiplex these six channels simultaneously using a single PIC with only a pair (I and Q) of detection channels and a single EIC.The PIC is a standard coherent balanced detector.The EIC includes a broadband TIA, clock and RF signal distribution networks, and broadband analog SSB mixers.Use of single-sideband (SSB) mixers permits the receiver to recover, without crosstalk, WDM channels lying both above and below the frequency of the optical LO.This SSB mixing therefore doubles number of the optical WDM channels which can be recovered within a given EIC and PD analog bandwidth.De-multiplexing of the six WDM carriers proceeds as follows: 1) An optical hybrid combines the six modulated WDM channels with a relatively strong optical LO (f 0 ) mixing these together on balanced photodiodes.In this optical downconversion, the WDM channels become six electrical RF sub-carriers at 25 GHz spacing ( ± 12.5 GHz, ± 37.5GHz, and ± 62.5GHz).
2) Each RF sub-carrier is then down-converted to a baseband using a SSB mixer.This recovers both the I and Q components of the optical modulation.Independent SSB mixers independently recover the ( ± 12.5 GHz, ± 37.5GHz, and ± 62.5GHz) subcarriers.
3) Low-pass filters in the I and Q outputs suppress interference from adjacent channels.Data can then be recovered through standard ADC and DSP.Note that if the optical wavelength separations in the WDM transmitter are set by optical wavelength synthesis [14], then the WDM channel frequency separations are determined by the precision of the microwave synthesizers used to set the optical frequency offsets.In this case, the SSB mixers can use stable but asynchronous local oscillators with the resulting LO phase and frequency errors corrected by electrical differential phase-shift-keying demodulation [15].

Designs for two-channel ( ± 25GHz) receiver IC
To demonstrate the proposed WDM receiver concept, a two-channel receiver IC, a key block of the WDM receiver, was designed using Teledyne Science Company's 500nm HBT process, using transistors with 300GHz f τ and f max [16], and tested using two and three wavelength-modulated channels.Figure 3  The PIC I' and Q' output signals are amplified with DC-107GHz broadband amplifiers [17] at the EIC inputs.In the present demonstration, an electrical LO is generated off-chip; internal to the EIC, polyphase filters and limiting amplifiers generate the quadrature LO signals needed for the Weaver-configuration analog SSB mixers.RF signals within the EIC are routed using 50Ω transmission-lines and buffer amplifiers.The present ICs were designed without attention to DC power consumption; power consumption of future versions of the IC could be greatly decreased by minimizing the number of such internal 50Ω interconnects.The recovered I and Q components of each down-converted carrier are available at the EIC outputs; these I and Q signals are low pass filtered and amplified off-chip.Since the full amplitude and phase information of the input WDM carrier is preserved during downconversion, the receiver is in principle compatible with any higher-order modulation formats (e.g.QPSK or 16-QAM).Using this receiver EIC, the two modulated channels with 50GHz channel spacing can be de-modulated simultaneously on f 0 ± 25GHz optical channels.

System demonstrations and experimental results
To demonstrate the WDM receiver system, using the two channel receiver IC (Fig. 3) we have measured image rejection for the two modulated carriers at f 0 ± 25GHz, and thus ± 25GHz electrical sub-carriers, and have measured adjacent channel interference using three modulated carriers with channel spacing varying from 5GHz to 20GHz.

Image rejection experiment
To double the number of WDM channel processed, the SSB mixers were used in the receiver IC, independently recovering signals both below and above the optical LO frequency.Figure 4 shows a test configuration of the image rejection experiment.Three free-running distributed feedback (DFB) lasers, which have a narrow linewidth and low relative intensity noise (RIN), were used: L 1 as a transmitter carrier laser #1 at optical carrier frequency f 0 + 25GHz, L 2 as a transmitter carrier laser #2 at frequency f 0 -25GHz, and L 3 as the LO laser at frequency f 0 .The carrier lasers L 1 and L 2 were modulated using 2.5Gb/s binary-phase-shift-keying (BPSK) data with two pseudo-random-binary-sequence (PRBS) pattern generators and Mach-Zehnder modulators (MZMs).PRBS of lengths 2 31 -1 and 2 15 -1 were applied to lasers L 1 and L 2 in this test.The modulated channels are combined in a 50%/50% optical directional coupler and coupled to the optical signal port of the receiver, with the LO laser L 3 connected to the receiver LO port.
In this experiment, we used a free-space 90° optical hybrid and balanced PDs contained in an Agilent optical modulation analyzer (OMA) N4391A.The balanced PDs have >33GHz 3-dB-bandwidth.The relative delays of the I'-channel and Q'-channel cables between the OMA and the two-channel receiver IC were carefully matched within 50ps by adjusting RF cable lengths and using phase shifters (PSs).This delay mismatch limited the bit rate to no more than 2.5Gb/s, but this mismatch issue can be solved by the hybrid integration of PIC and EIC.The EIC was contacted using multi-finger GGB RF probes.The two-channel receiver IC has I and Q outputs for both the ± 25GHz channels.One pair of I ch+ and Q ch+ outputs was low-pass filtered, amplified, and stored in an Agilent real-time oscilloscope (DSA-X 92004A).Frequency and phase errors were corrected by DSP (in this work, we used a simple phase error estimation technique using a Matlab code), thereby recovering the I-Q transmitted data Fig. 4. Test setup for image rejection using two wavelength channels.streams, as shown in Figs.5(a)-5(d).The second pair of I ch-and Q ch-outputs was connected to an electrical spectrum analyzer (ESA) to monitor the suppression of adjacent-channel interference in the frequency domain.Figure 5(e) shows the spectra measured from the EIC output, comparing the cases when the lasers L 1 and L 2 are both active.
Figures 5(a) and 5(b) show the recovered data outputs on ( + ) and (-) channels using a single 2.5Gb/s BPSK modulated carrier (L 1 is on and L 2 is off) without the 50%/50% directional coupler.After the post signal processing, Fig. 5

Adjacent channel interference experiment
To measure receiver crosstalk from adjacent channels and to determine the maximum spectral efficiency given the minimum channel grid spacing, three-channel experiments were performed using the test configuration shown in Fig. 6.Three DFB lasers and a Koshin (LS-601A) tunable laser, which also have a narrow linewidth and low RIN, were used: L 1 as a transmit carrier laser #1 at an optical frequency variable from f 0 + 5GHz to f 0 + 20GHz, L 2 as a fixed transmit carrier laser #2 at an optical frequency f 0 + 25GHz, L 3 as a transmit carrier laser #3 at an optical frequency variable from f 0 + 30GHz to f 0 + 45GHz, and L 4 as a fixed LO laser at frequency f 0 .Again, three channels of 2.5Gb/s BPSK data were modulated on the carrier lasers of L 1 , L 2 and L 3 using differential outputs of a PRBS 2 31 -1 pattern generator and two MZMs as shown in Fig. 6.The two patterns were de-correlated using a path length difference of about one meter.The three modulated channels are combined using 50%/50% directional couplers and the power of each channel is equalized and monitored through an APEX high-resolution optical spectrum analyzer (OSA).Figure 7 shows the measured spectrum of the three optical modulated channels with channel grids of (a) 20GHz, (b) 10GHz and (c) 5GHz, the final case having no frequency guard band.
In this experiment, the qualities of the recovered data were measured and compared in Fig. 8 for the different channel spacing and differing combinations of input and output low-pass filter bandwidths.Here filter #1 is low pass filters (LPFs) located before the optical modulators (MZMs) to suppress spectral side lobes in the transmitted optical spectrum, while filter2 is LPFs located at the two-channel receiver IC outputs to suppress adjacent channel interference.With 2.2GHz LPFs in the transmitter and 3GHz LPFs in the receiver, even with a 5GHz channel spacing, corresponding to no frequency guard band, a signal-to-noise including interference ratio (Q-factor), extracted from eye diagram outputs, of approximately 10:1 is measured.Note that Q = 6 corresponds to 10 −9 bit error rate given Gaussian statistics.
As Fig. 8 demonstrates, the receiver IC operates with high signal/crosstalk ratios even when channels carrying 2.5Gsymbol/second modulation are spaced in frequency by only 5 GHz; the proposed WDM receiver system provides high spectral efficiency.

Conclusion
We have demonstrated WDM receiver using cascaded optical and electrical down-conversion to recover multiple optical wavelength channels.Given the demonstrated bandwidths of modern photodiodes and EICs, the receiver can readily scale to a large number of WDM channels using only a single (I and Q) pair of optical coherent detection channels.Initial demonstrations indicate high image rejection and low adjacent channel interference.

Fig. 1 .
Fig. 1.Two different WDM receiver concepts: (a) conventional WDM receiver using optical filters, and (b) a new proposed WDM receiver.

Fig. 2 .
Fig. 2. A concept schematic diagram for a coherent single-chip multi-channel WDM receiver and its de-multiplexing flows for six modulated channels.
(a)  shows the schematic of the 2-channel receiver EIC, while Fig.3(b)shows a die photograph.The six-channel receiver of Fig.2was also designed and fabricated; to date, six-channel optical system experiments have not yet been completed, and we describe only results with the 2-channel unit.

Fig. 3 .
Fig. 3. (a) An EIC schematic for a two-channel ( ± 25GHz) receiver IC, and (b) a photograph of the fabricated and mounted EIC on the test AlN board.

Fig. 5 .
Fig. 5. Experimental results for image rejection measurement: (a)-(b) the eye diagrams for the activated ( + ) channel and the suppressed (-) channel with a single modulated carrier, (c)-(d) the eye diagrams for the ( + ) and (-) channels with two modulated carriers, and (e) the measured output spectra when the signal and the adjacent (crosstalk) channels are active.Crosstalk suppression is ~25dB.

Figure 5 (
e) indicates that there is about 25dB (18:1 in voltage) image rejection ratio between the activated and suppressed channels.This is typical of that expected for welldesigned SSB mixers.Regarding two 2.5Gb/s BPSK modulated carriers (L 1 is on and L 2 is on), both ( + ) and (-) channels show open eye diagrams, as shown in Figs.5(c) and 5(d).The slightly degraded eye diagrams in this test are most likely because the input power to the twochannel receiver IC is 2:1 lower than that in the experiment involving only a single modulated carrier.

Fig. 8 .
Fig. 8. Measured eye diagram qualities for the different channel spacing and filter combinations (filter #1 -before the optical modulators, and filter #2 -after the EIC).