Forty Gb/s hybrid silicon Mach-Zehnder modulator with low chirp

: We demonstrate a hybrid silicon modulator operating up to 40 Gb/s with 11.4 dB extinction ratio. The modulator has voltage-length product of 2.4 V-mm and chirp of  0.75 over the entire bias range. As a switch, it has a switching time less than 20 ps.


Introduction
Recent efforts in silicon photonics have focused on developing a wide range of optical components that can be integrated on a single platform [1]. A lot of work has focused on modulators as they are crucial for the generation and transmission of high-speed signals such that increasing demands on data capacity can be satisfied. To be able to efficiently send information at high frequencies, modulators with large optical bandwidth, high-speed operation and good modulation efficiency are required. Modulators based on a Mach-Zehnder interferometer (MZI) architecture are of particular interest because they satisfy several of the aforementioned criteria. The optical bandwidth of a Mach-Zehnder modulator (MZM) can be close to a 100 nm [2][3][4] while that of a ring resonator structure is typically a few nm [5] and that of an electroabsorption modulator (EAM) is less than 30 nm [6,7]. Having a wide optical bandwidth is especially useful for tunable integrated transmitters. Pure silicon based modulators have had to trade modulation bandwidth for modulation efficiency due to the intrinsic properties of the material (Si). Modulators fabricated on a hybrid silicon platform do not suffer from these limitations and as such offer a way to realize compact, efficient and high bandwidth modulators. Previously, we demonstrated a MZM on the hybrid silicon platform with a bandwidth of 15 GHz, large signal modulation up to 25 Gb/s with 10 dB extinction ratio (ER) and voltage length products of 2.4 V-mm [8]. Here we report on an improved hybrid silicon MZM with a bandwidth of 27 GHz and large signal modulation at 40 Gb/s with 11 dB ER, which can be one of the solutions for increasing demands on data capacity. We also analyze and report on the negative chirp of this modulator, which can be useful for extending the reach of a transmitter. In addition, a 2x2 switch based on the MZI structure is reported here with 0.5 dB power penalty and 20 ps rise and fall time for future optical network application that is suitable for integration into larger switch arrays. The MZM is fabricated on the hybrid silicon platform [9]. In order to reduce electrical propagation loss and increase device impedance, a capacitively loaded (CL) traveling wave electrode (TWE) design was utilized as shown in Fig. 1(a) [8]. With such CL TWE design [10,11], the electrical fields propagate between the signal and ground pads of the transmission line rather than inside the III-V mesa, which significantly reduces the electrical propagation loss. Additionally, a slotline structure was employed for this hybrid MZM in order to fulfill two requirements. First, both arms of the MZI have to be reversed biased to introduce index change without speed limitation from the slow carrier injection effect. This can only be achieved with a slotline transmission line design because coplanar waveguide (CPW) design results in forward biasing one arm. Second, the slotline design can reduce the total device capacitance by half since two arms of the MZI are in series, and consequently this increases the modulation bandwidth while the fill factor is left unchanged. Figure 1(a) shows the fill factor (F), defined as L/L p , where L is the length of each loaded section and L p is the period length. The total modulation length (L a = L x N) is then the summation of each individual loaded section, where N is the number of loaded sections.

Device design and process improvements
By utilizing this push-pull slotline CL design, we successfully demonstrated large signal modulation for a hybrid silicon MZM at 25 Gb/s with over 10 dB ER [8]. To improve the bandwidth and operate at 40 Gbit/s, we needed to develop a new process that has improved isolation. During device fabrication, a proton implant, which was used to decrease the conductivity of both p-contact and p-cladding layers on the unloaded sections, was performed before the contacts were annealed. This high-temperature anneal after implant led to drift of ions, an increase of conductivity of implanted sections, and resulted in weak isolation [12]. Hence, to keep the isolation high after implant, the contact anneal has to be done before the implant to avoid any drifting of ions. In addition, the top p contact layer is removed in the unloaded sections for better isolation. The impedance of a 10 μm isolation region was 60 MΩ after the fabrication improvement.
Utilization of a polymer such as SU8 and BCB in TWE fabrication is a very common approach to eliminate parasitic capacitances and allow the freedom to design high performance transmission lines. However, polymer is well known as a material with limited lithographic resolution for small patterns. Via openings less than 5 μm are generally difficult to define and the minimum feature size increases with polymer thickness. In addition, this resolution is also highly dependent on topography and the material on the chip. For the hybrid silicon MZM, the mesa width is only 4 μm, which makes it challenging to have precise polymer via definition which is also aligned correctly. The via shape slightly changes during the polymer cure process such that the width might be larger than the mesa and additional parasitic capacitance is introduced. Therefore, it is important to have an established process that is easily repeated. Instead of lithographically defining the patterns, inductively coupled plasma (ICP) etch is utilized to avoid unpredictable width variation. The sample was first covered with SU8 and cured at 240 C followed by a deposition of a 300 nm PECVD silicon nitride hard mask. The pattern was then defined in Panasonic ICP by etching the hard mask. Next, a 5 μm deep via was created with a low-power O 2 /CF 4 ICP etch for 15 minutes. A nitride purge every five minutes during the SU8 etch is extremely important to remove extra charges on the surface and avoid grass formation at the bottom of the via. A device cross section shown in Fig. 1(b) shows the straight via opening on top of the mesa without any leakage path on the sidewall. Details about the complete process flow can be found in [8].

Device characteristics
The static characteristic of a 500 μm (L a ) MZM with F = 80% was first measured by changing the bias of one arm (V 1 ) and keeping the other arm at 0 V (V 2 ). A schematic circuit diagram is shown in Fig. 2(a) for better understanding of the bias condition. The normalized transmission of a 500 μm MZM is shown in Fig. 2(b), which indicates voltage-length product of 2.4 V-mm and 20 dB ER. The propagation loss is 3dB/mm with 1.5 dB coupling loss per IIIV/Si taper. To characterize the electrode, the device was measured using an Agilent 8164A network analyzer. Device impedance (Z d ), electrical propagation loss (α), phase velocity (β) and other parameters are extracted from Eq. (1) by converting measured S parameters to an ABCD matrix. (1) The comparison of propagation loss between the previous and current CL slotline design is shown in Fig. 3(a). As can be seen, the propagation loss decreases from 13 dB/mm to 9 dB/mm at 40 GHz due to the improvement of isolation between the modulation sections, which indicates 2 dB loss reduction for a 500 μm long MZM. Better isolation keeps the surface current from flowing on top of the III-V mesa and consequently results in loss reduction. With the improvement of isolation, both fringe capacitance and propagation loss can be decreased as well. Next, the modulation bandwidth of MZM was measured using an Agilent N4373C Lightwave Component Analyzer (LCA) at 3 V reversed bias. The experimental result with a 25 Ω termination in Fig. 3(b) shows a modulation bandwidth of 27 GHz, which suggests that this device has the potential for 40 Gb/s NRZ operation. A simulated EO response is also shown with the electrical parameters extracted from the ABCD matrix, together with a 6 Ω series resistance and a 0.62 pF device capacitance. As can be seen, the simulation agrees well with the experiment. With the push-pull configuration, the phase changes in the two arms have the same amplitude but are out of phase ( 2   = -1   ) such that chirp-free modulation can be achieved as shown in Eq. (2). In reality, however, the amplitudes of phase change in two arms are usually not identical because the electrorefraction effect is bias-dependent. Therefore, an ideal zero chirp condition can only be realized if the modulation effect is perfectly linear.
The small signal chirp parameter can be obtained by measuring the EO response by inserting a dispersive fiber between the modulator and the LCA [14]. The interaction between fiber dispersion and modulator chirp results in resonance dips in the spectrum as shown as an inset in Fig. 4(a). The relationship between the resonance points and the chirp can be written as [14]: where u f is the uth order of resonance, 0 c is the speed of light, D is the fiber dispersion,  is the wavelength, and  is the chirp. An experimental curve of Eq. (3) is illustrated in Fig. 4(a). By fitting the experimental resonance points, the chirp under different biases can be calculated and the result is shown in Fig. 4(b). It indicates that the chirp is around 0.75 over a 5 V range. This negative chirp can counteract dispersion and consequently reduce the power penalty for long-haul data transmission applications.  The large signal modulation was also characterized with a SHF 40G BERT system. A 2 31 -1 pseudorandom bit sequence (PRBS) at 25 Gb/s and 40 Gb/s as shown in Fig. 5 is used to drive the device while an optical signal at 1550 nm is coupled to the chip. In order to have better ER, port 2 to 4 is chosen rather than port 2 to 3 because it has an inherent 180 degree phase shift from the Mach-Zehnder interferometer structure. When the biases of two arms are identical, the output signal of port 2 to 3 is a "one" and it turns to "zero" while additional 180 degree phase shift difference is applied to the device. However, due to the power imbalance introduced by QCSE [3], the "zero" is limited and significantly degrades the ER. Therefore, a better ER can be obtained if "zero" condition occurs when the power of two arms are identical, which refers to port 2 to 4 with 180 degree inherent phase difference. Figure 5 shows the modulated signal from the hybrid silicon MZM biased at 4 V with 4 Vpp swing while the biases (V b and V s ) are slightly adjusted to achieve best signal quality. As can be seen, the eye is clearly open without much distortion from the drive signal. The ERs are 15.4 dB and 11.4 dB at 25 Gb/s and 40 Gb/s, respectively. The ERs, to the best of our knowledge, are the best ERs above 25 Gb/s for any silicon based modulator and makes long-haul optical communication feasible.
A 40 Gb/s bit-error-rate (BER) measurement was also performed to explore the signal integrity for switching applications. The power penalties for all ports, shown in Fig. 6, are below 0.5 dB at 10 10 BER for each port without noise floor. Furthermore, the rise time (20% to 80%) of the switch is less than 20 ps (4 V swing) and fall time is less than 17 ps for all ports configurations, which indicates that only 0.19% of the total time interval is necessary as a guard band for a standard cell of a 40 Gb/s asynchronous transfer mode (ATM) network. The utilization of the network can be made around 100 times more efficient by using this switch rather than one with a rise/fall time around several nanoseconds.

Conclusion
A hybrid silicon MZM utilizing CL push-pull slotline design is demonstrated with 27 GHz modulation bandwidth. Improvements in fabrication successfully decrease the propagation loss. Large signal modulation at 40 Gb/s with 11 dB ER and low chirp of 0.75 make this hybrid silicon MZM feasible to integrate with lasers using quantum well intermixing [15] to implement wide bandwidth silicon transmitters for optical communication. In addition, a switch based on the MZI structure was shown to have a fast switching capability less than 20 ps with 0.5 dB power for a 40 Gb/s data stream.