Tunable Balanced-to-Unbalanced In-Phase Power Divider: Theoretical Analysis and Design

. This paper presents a tunable power divider (PD) which is balanced at the input port and unbalanced at the output ports. This tunable balanced-to-unbalanced (TBU) PD divides the power either equally or in speciﬁc ratio by varying capacitance in the circuit. The complete theoretical study is presented for this type of PD. The analysis is based on the impedance matching of all the ports and isolation requirements of the two unbalanced output ports. By changing the capacitance, diﬀerent power dividing ratio (PDR) can be achieved. The theoretical results are obtained from the design equations of the proposed PD. The reﬂection coeﬃcient of the unbalanced ports are better than 10 dB with fractional bandwidth of 21.5%. The isolation between the two output unbalanced ports is achieved better than 15 dB with fractional bandwidth of 23.5%. The proposed PD shows the in-phase characteristic between the two output signals.


Introduction
The beamforming network is the backbone of RF fontend block for providing feeding network to the phased array antennas [1]. In such system, high antenna gain and narrow beam-width in particular direction is obtained by use of a beamforming network. The role of beamforming network is very critical in order to feed the large antenna array with proper magnitude and phase [2].
PD is one of the main component of beam-forming network which divides the power based on the PDR. There are two types of reported PDs based on the phase difference between the output ports. These are in-phase PDs and outof-phase PDs. PD can be formed using T or Y junction of the waveguide and transmission lines. These PDs show very poor isolation performance between the output ports and it cannot be matched to all the ports as well. E. J. Wilkinson proposed a PD which provides isolation (by connecting isolation resistor between the output ports) and matched to all the ports [3]. For high power applications, U. H. Gysel proposed a new kind of PD in which heat is transferred to the ground via isolation resistor [4]. Over the years, these two types of PD attracted major attention of research fraternity to enhance the performance in different applications such as multi-band, tunability, N-way power division. The focus of these researches was on the single-ended PDs [5][6][7][8].
Nowadays, fully balanced, BTU (balanced-tounbalanced) and UTB (unbalanced -to-balanced) PDs are much more investigated because of its applications in high speed RF front-end block. All these PDs are designed for a specific PDR [9][10][11][12][13][14][15]. Therefore, to achieve different PDR, multiple circuits are required. One can think of PD circuit which can provide the power division for any specific PDR. This type of PD can forgo the requirements of multiple circuits for different PDR. In [16], a fully balanced tunable PD is reported which can provide the tunability. The proposed circuit which provides the tunability function in BTU type PD is the extension of author's previous work [15].
This study presents a new tunable PD which is having a balanced input port and two unbalanced output ports. The proposed PD shows in-phase response between the two output signals. Sections 2 and 3, present the complete theoretical analysis and comparison of results which verifies the design process of the PD, respectively.

Theoretical Analysis
The block diagram of the proposed TBU PD is shown in Fig. 1. This is a TBU PD which is having balanced port A (combination of port 2 and 4) at the input and unbalanced ports (port 1 and 3) at the output. Therefore, this PD is a four port network. Transmission line of characteristic impedance 1 and electrical length is connected between the input balanced port. There are two transmission lines of characteristic impedance 2 and electrical length 1 . The balanced input port is matched to an impedance ( s ) and two output ports are matched with 0 (50 Ω). s is an arbitrary balanced port impedance which can be further matched to the 50 Ω. There are two tunable capacitors ( ) which makes the PD as tunable PD. By varying the capacitance, different PDR can be achieved. The isolation resistor (one end is connected to the ground) provides the isolation between the two output ports.

Formulation of Scattering Matrix
In this subsection, mixed-mode S-matrix S mm has been formulated based on the requirements of the proposed PD. Standard four port scattering matrix S std has been derived from mixed-mode S-matrix S mm .
The proposed PD is a reciprocal network. A standard scattering matrix of this PD is given as: Mixed-mode scattering matrix S mm is used to characterized the balanced circuits which in this case is given in (2).
where sd1A and sd3A represent balanced port (A) to unbalanced port (1 and 3) transmission coefficients. sc1A and sc3A denote common-mode suppression (CMS) to unbalanced ports 1 and 3. dcAA , ccAA and ddAA represent differential to common-mode conversion coefficient, commonmode reflection coefficient and differential-mode reflection coefficient, respectively. ss11 , ss33 and ss13 are the reflection coefficients of unbalanced ports (1 and 3) and isolation between the ports 1 and 3, respectively.
Based on the requirements of this type of PD given in [9], [12], mixed-mode scattering matrix is obtained and given in (3): where 1 , 2 and 3 are the phases of mixed-mode scattering parameters. 0 < < 1 is the transmission coefficient from port A to port 1.
The relationship between mixed-mode scattering matrix S mm and standard scattering matrix S std is given in [17]. Using this relationship, mixed-mode scattering matrix given in (3) is converted into standard scattering matrix S std of four port network.

Power Transmission from Balanced Ports
Based on the PDR, input power at the balanced port A is divided into port 1 and 3 and no power is absorbed in the isolation resistor. The equivalent circuit diagram for this analysis is shown in Fig. 2. in1 is obtained from Fig. 2 which is given as: in2 is obtained as: where in1 acts as a load: From (5)- (7), in2 is simplified and obtained as: in3 is parallel combination of 0 and transmission line of characteristic impedance 2 terminated with short circuit: in4 is the series combination of and in3 : Now, transmission matrix T 24 between port 2 and port 4 is obtained from Fig. 2.
The scattering parameters between port 2 and 4 are obtained by applying parameter conversion in (12). Now putting these scattering parameters into (13) leads to the following condition: Using (8), (10) and (14), the following equation is obtained.
After solving (16), close form of the design equation has been obtained: From (17), 2 is obtained and given in (18).

Isolation Between Output Ports
The two output ports of the PD must be isolated to each other so that signal does not interfere with each other. When port 1 is exited, no signal is obtained at port 3. Based on the analysis done in the previous Sec. 2.2, equivalent diagram of the proposed PD under this analysis is shown in Fig. 3. Figure 3 shows the impedances at different points of the circuit using properties of quarter and half wavelength transmission lines. From Fig. 3, in5 , in6 and in7 are obtained: The parallel combination of in6 and in7 is equal to the port impedance 0 .

Power Dividing Ratio
Let the PDR is 2 . Therefore, the power division from balanced port to unbalanced port is given as: sd1A sd3A = . (24) From (3) and (4), sd1A and sd3A are obtained and given below.
To obtain 21 , PD is converted into a two port network between port 2 and 1, all ports are terminated to their port impedances. The equivalent circuit is shown in Fig. 4. 21 is obtained by converting admittance matrix between port 2 and 1 into scattering matrix.
As shown in Fig. 4, Path I and Path II are connected in parallel combination, therefore, admittance matrix between port 2 and 1 is obtained.
Y Path I and Y Path II are obtained from their corresponding transmission matrices T Path I and T Path II , respectively.
T Path II is obtained from Fig. 4, and given in (31).
After converting T Path I and T Path II into their corresponding admittance matrices and substituting in (28), Y 21 is derived.
Two port network between port 2 and 3 is shown in Fig. 5, which is used to obtain 23 . All other ports are terminated to their port impedances, as shown in Fig. 5.
To obtain scattering matrix between port 2 and 3, first admittance matrix between port 2 and 3 is obtained and then converted into scattering matrix.
The admittance matrix between port 2 and 3 (Y 23 ), is the sum of admittance matrix of Path III (Y Path III ) and Path IV (Y Path IV ).
Transmission matrix of Path III, is obtained from Fig. 5.
Using (18), (36) is further simplified and transmission matrix between port 2 and 3 is obtained. Converting transmission matrix of Path III and IV into admittance matrices and using (35), admittance matrix Y 23 is obtained. Converting Y 23 into scattering matrix, scattering parameters between port 2 and 3 are derived.

Theoretical Results
The design equations derived in Sec. 2 are (17), (18), (23) and (44). The transmission line of characteristic impedance 1 is of length , therefore, it is an independent parameter. 1 can be chosen based on the microstrip design constrain. 0 is taken as 50 Ω. The design frequency is taken as 2 GHz.

PDR [ 2 ]
[Ω] 1 Table 1 shows the design parameters based on the design equations obtained in Sec. 2. As shown in Tab. 1, , 1 , 2 and s are same for different PDR ( 2 ). Capacitance ( ) is the only parameter which changes due to change in PDR. Therefore, by tuning the capacitance ( ) value, the proposed PD can divide the power equally or in any specific ratio.
Based on the design parameters listed in Tab. 1, theoretical results are obtained and are shown in Figs. 6 and 7. Figure 6 shows the phase difference between the two output signals (at port 1 and 3). At the center frequency, phase difference is zero and as the frequency increases, variation in the phase difference increases as well. Figure 7(a) shows the return losses of unbalanced ports and isolation between the two output ports. It shows that PD is perfectly matched at the output ports and these ports are isolated with each other. Figure 7(b) shows that balanced port A is matched and the common-mode reflection coefficient of port A is unity. There is no differential-mode to common-mode conversion and vice-versa. Figures 7(c)-(f) show the power division from port A to ports 1 and 3. Figure 7(c) shows that power is divided equally 2 = 1 ( sd1A = sd3A ) at the center frequency. Figures 7(d)-(f) show that power is divided according to PDR 2 = 2 ( sd1A − sd3A = 3 dB), 2 = 3 ( sd1A − sd3A = 4.77 dB) and 2 = 4 ( sd1A − sd3A = 6.02 dB), respectively at the center frequency. Figures 7(b)-(f) also show that common-mode signals are perfectly suppressed.

Simulation Results
Advanced design system (ADS) is used to design the layout of the proposed PD. FR-4 substrate having dielectric constant r = 4.4 and thickness ℎ = 1.6 mm is used for the micorstrip implementation of the transmission lines. As mentioned in Tab. 1, tunable capacitor is required to achieve proper PDR. A varactor diode (SMV1233-079 (LF)) is used for this purpose.
The complete layout design of the tunable PD is shown in Fig. 8. DC blocking capacitor of 100 pF and 50 pF is used in the circuit. For the biasing circuit RF choke is implemented using high impedance transmission line (100 Ω). In order to match the port impedance of balanced port A ( s = 100 Ω), a quarter-wave transformer of impedance 70.71 Ω ( √ 100 × 50) is used in the circuit. Microstrip design equations given is [18] are used to obtain the length and width of the transmission lines. All the dimensions of the microstrip lines which are shown in Fig. 8 (a) | ss11 |, | ss13 | and | ss33 | (b) | ddAA |, | ccAA | and | cdAA | (c) | sd1A |, | sd3A |, | sc1A | and | sc3A | for 2 = 1 (d) | sd1A |, | sd3A |, | sc1A | and | sc3A | for 2 = 2 (e) | sd1A |, | sd3A |, | sc1A | and | sc3A | for 2 = 3 (f) | sd1A |, | sd3A |, | sc1A | and | sc3A | for 2 = 4   The simulation results are shown in Figs. 9-10. The phase difference between the two output signals is shown in Fig. 9. At the center frequency, phase difference for 2 = 1, 2, 3 and 4 are 2 • , 2.69 • , 3.26 • and 3.70 • , respectively. The phase difference increases as frequency increases from 2.35 GHz onward. The variation in phase difference also increase as the change in PDR increases. As shown in Fig. 10(a), return losses of unbalanced ports and isolation between the output ports are better than 20 dB at the center frequency. Differential-mode return loss of port A and differential-mode to common-mode conversion is also better than 20 dB, as shown in Fig. 10

Results Comparison
The fabricated prototype of the proposed PD and measurement setup is shown in Fig. 11(a) and Fig. 11(b), respectively. The scattering parameters of the unbalanced port are measured using two port VNA E5071C from Agilent Technologies.
The comparison study between the results are shown in Fig. 12. Figure 12(a) shows that results of measured return losses of unbalanced ports and isolation between the output ports are in good match with the simulation results. Figure 12(b) shows that theoretical and simulated results of return loss of balanced port and mode-conversion coefficient are in good match as well. Figure 12 (c)-(f) shows that power division (theoretical and simulated results) from the input balanced port to unbalanced ports follows the similar pattern for PDR 2 = 1, 2, 3 and 4, respectively.

Conclusion
This paper presents a novel TBU PD which can divide the power from balanced input port to unbalanced output ports. This PD divide the power in a specific PDR by changing the biasing voltage. The complete theoretical analysis is presented in Sec. 2 for this type of PD. The standard scattering matrix is derived from the constrains of the proposed PD in-terms of mixed-mode scattering parameters. The theoretical analysis is based on the transmission line scattering parameters, transmission parameters and impedance matching of all ports. The analysis of the PD conclude that by changing the capacitance PDR can be changed. This tunable characteristic of the capacitance is achieved by the varactor diode. There is no need to change the transmission line impedance for the change in PDR. The theoretical results shown in Sec. 3 support the analysis of the PD. The circuit simulation is carried out in ADS. A prototype is fabricated and scattering parameters of unbalanced ports are measured using two port VNA. The Comparison of results verified the analysis presented for this PD.