Multi-Resonant Class-F Power Amplifier Design for 5G Cellular Networks

This work integrates a harmonic tuning mechanism in synergy with the GaN HEMT transistor for 5G mobile transceiver applications. Following a theoretical study on the operational behavior of the Class-F power amplifier (PA), a complete amplifier design procedure is described that includes the proposed Harmonic Control Circuits for the second and third harmonics and optimum loading conditions for phase shifting of the drain current and voltage waveforms. The performance improvement provided by the Class-F configuration is validated by comparing the experimental and simulated results. The designed 10W Class-F PA prototype provides a measured peak drain efficiency of 64.7% at 1dB compression point of the PA at 3.6 GHz frequency.


Introduction
The 5G mobile vision is expected to provide an enhanced broadband service, whilst addressing architectural changes to cater for massive scale connectivity (Internet of Things) that is driven by the vertical industries. A fully deployed 5G system will harness high-band small cell technology based on millimeter wave and advanced antenna technology, forming a tight synergy that will have a direct multiplier effect on the single link data rate performance, where design targets aim to achieve gigabit per second speeds. However, with the foreseen increase in mobile traffic, network operators also aim to reduce the cost of ownership of their networks, where operational expenses such as energy consumption represents a major cost. These requirements translate to energy efficient net-work designs that profit all the way to the RF hardware. In fact, PAs represent the largest consumer of energy in the transceiver chipset, hence positioning power efficient designs are of paramount importance.
It is well known that high efficiency can be achieved in PAs at the compressed gain levels in the presence of small conduction angles. However, very small conduction angle at higher frequencies requires greater input voltage swing for similar output current excursions, which reduces the power gain [1]. While the higher output power can be guaranteed by maximizing both the output current and voltage swing, the maximum efficiency can be attained by minimizing the dissipated power in device. The non-overlapping drain waveforms condition enables the PA to fulfil this requirement. Harmonic terminating techniques enable PAs to provide higher efficiency by selecting appropriate waveforms. The overdriven Class-F PA proposed by Snider in [2], relies on the load impedance at the fundamental and harmonic frequencies whilst, Class-E or D focus on the transistor switching mode operation [3], [4]. Harmonic engineered amplifiers, irrespective of the drain bias current and the pinching-off time of the transistor, enhance the fundamental voltage component for a sufficiently high input power level, while maintaining the DC power supplied to a similar level. In Class-F, F -1 [5], [6] and switched-mode approaches, the role of the generated harmonics is to ensure an appropriate wave-shaping. On the other hand, the restrictions imposed by the device output nonlinearities deteriorate the adverse effects of the phase imbalance on the fundamental output current and voltage waveforms.
To enhance the waveforms harmonic content, many contributions from experimental observation of the transistor operation to the introduction of innovative configurations have been proposed. In [7], the authors realized a GaAs MMIC Class-F PA at 14.3 GHz incorporated an active phase array for higher date rate transmission. In that work, a Class-F PA is design in power stage and a driver stage is added to improve the large-signal gain at the expense of fabrication complexity and cost. The proposed MMIC PA can provide a drain efficiency of 50.4% and 19.7 dB gain. In [8], an improvement in gain and efficiency are reported by the Class-F PA connected to the active antenna, where the impedance of the antenna is optimized to provide harmonic matching for the Class-F PA. Nevertheless, the internal parasitics of packaged transistors prevent the PA to deliver its optimum performance.
Concurrently, the continuous modes of operation have been proposed for providing high efficiency across a wide frequency range, where the short and open circuited load terminations are replaced by purely reactive harmonic termination. To expand the impedance design space, a concurrent continuous Class-F PA has been adapted in [9] that can provide 72.8% and 76.7% drain efficiency at 3.5 and 2.6 GHz, respectively. However, the continuous PA modes require to control the harmonic impedances precisely for high efficiency performance and should maintain high peak voltage waveforms over the frequency range, that can be supported only by high breakdown voltage technologies like GaN devices, otherwise, it results in low output power density.
In this work an optimized design procedure to enhance the efficiency and gain of a Class-F PA over the Class-B configuration, by adopting a proposed harmonic control technique for second and third harmonics tuning is described. This technique can effectively compensate the detrimental effects of the packaged GaN HEMT parasitic components. For this purpose, the Class-F PA' output power and efficiency expressions are discussed using device time-domain waveforms. Subsequently, the PA performance is validated through the layout design, test of the fabricated prototype as well as, analysis of the simulated and measurement results.
This work is organized as follows: a brief theory of Class-F PA is elaborated in Sec. 2; Section 3 is devoted to present the design procedure of PA; this section also includes the PA implementation and measurement results. The last section outlines the conclusion of this work.

Basic Operation of Class-F Power Amplifier
PA efficiency can be improved by driving the active device into the triode or cut-off or regions, when either the current or voltage waveforms are shaped as a square wave. The flat waveform contains only odd frequency components when the harmonics are terminated with an open circuit at the intrinsic drain of the device. In the Class-F mode, this flattening is executed on the voltage waveform. Consequently, the correlated half-sinusoidal current and square-wave voltage spectra at the fundamental frequency have no RF dissipated power theoretically.
Whilst the general concept of multi-harmonic manipulation strategy is elaborated in [10], [11], Raab [12] has studied the effects of tuning a finite order of harmonics on the Class-F PA and derived the harmonic magnitudes required for flattening the voltage waveform. Nevertheless, the high-efficiency harmonic tuning techniques require to analyze the PA linearity characteristics or even enforce an external linearization circuit in multicarrier systems. In many harmonic injection PA stages, proper subsystem linearization techniques have been adopted to combat spectral regrowth of incorporated signals. For linearity enhancement, the large-signal intermodulation distortion (IMD) sweet spot is introduced in [13], as a theoretical solution to achieve low IMD in the saturation region.
The analysis assumes that the transistor is controlled by the input gate-source voltage linearly and the intrinsic transistor output response is represented by the device trans-conductance. The half-sine wave drain current is expressed by (1) where the maximum drain current is shown by I DM . The drain current is equal to zero for -π < ω 0 t < -π/2 and π/2 < ω 0 t < π. Considering the third harmonic components, the representation of the drain voltage waveform can be obtained by (2) where V dc is the DC supply voltage. The peak-to-peak swing of the ac component of drain to source voltage waveform will be decreased because of adding the out-ofphase third harmonic component to the fundamental voltage, and the maximum ac component's value of voltage waveform becomes lower than the amplitude of the fundamental component V 1 . Besides, it is possible to raise the ratio V 1 /V dc by increasing the amplitude of the third harmonic component. When V 1 rises and the input power keeps constant, the output RF power and the drain efficiency will enhance by the same factor. This will be shown in the following analysis.
The Fourier coefficients for the maximum drain to source voltage can be obtained by setting the derivatives equal to zero. The first-order derivative is zero at the minimum value of ω 0 t = 0 and the maximum value of ω 0 t = π. From the second-order derivative at ω 0 t = 0, equation (3) can be expressed by Therefore, a maximum drain voltage waveform occurs when V 3 /V 1 = 1/9, and the minimum drain-source voltage is obtained as (4) That produces the maximum amplitude of the output voltage V 1 = 9/8 V ds , and by substituting V 1 in (4), the required amplitude of the third harmonic voltage component can be attained as V 3 = V ds /8.
The fundamental drain current amplitude can be expressed by The DC input current and supply power are given respectively, by (6) and (7): The drain-source voltage consists of the dc, fundamental and third harmonic components, and the drain current contains a dc, fundamental and second harmonic component [14], [15], therefore, the RF output power includes the fundamental component, It should be noted that the amplitude of the fundamental component V 1 has been increased with the third harmonic contribution to V 1 = 9V ds /8 = 1.125 V ds [16], thereby, the drain efficiency is increased by the same factor of 1.125.

Circuit Design of the Class-F PA
This section presents the design approach of 10W Class-F PA based on GaN HEMT technology. The design technology is hybrid-MIC microstrip on a Rogers4350 substrate ( r = 3.66 and h = 0.762).

Transistor Technology and Bias Selection
From the nonlinear HEMT model, it is known that the maximum efficiency is restricted by the output resistance of the transistor and the drain-source capacitance. The inherent high bandgap of Gallium Nitride (GaN) transistor offers the possibility of operating at high voltages, minimizes the mismatch losses, and improves the thermal conductivity. Since, the high breakdown voltage provides more robust devices, GaN HEMTs on Silicon (Si) can maximize the power density and supply up to 180 W output RF power at the base stations [17].
By moving further towards a fully digital radio in 5G and beyond, GaN HEMT MMIC PAs at X-band can provide up to 55% PAE and 40 W output power [18], [19]. In this paper, the unmatched 10 W GaN HEMT device provided by Cree-Wolfspeed is employed.
The packaged GaN HEMT equivalent circuit, and specifically, the CGH40010F model, includes both intrinsic and package parasitics. The presence of parasitic wiring and nonlinear variation of V gs with respect to the input voltage, pose severe implications for harmonic terminations. Figure 1 shows the I dS -V GS transfer characteristic for a fixed V ds of 28 V supply voltage. Note that selecting an appropriate PA conduction angle is important since, a bias point close to the threshold gate voltage increases the harmonic component. The selected bias point must ensure the third harmonic current is null. Here a bias point slightly lower than Class-B conduction angle at V G = -3.1 V is selected, while the lower bias points impose higher nonlinear operation regimes and provide in-phase third harmonic component.

The Rollet Stability Factor of the PA
The PA must be stable at all frequencies to prevent unwanted oscillations, in or out of the operating frequency band. The transistor nonlinear input capacitance exhibits negative resistance under a strong input power drive that results in a parametric generation of harmonic components [20]. The small-signal stability analysis of a PA mostly relies on the stability circles and Rollet Stability factor (K-factor), hence spurious power dependent intrinsic oscillation phenomena cannot be predicted by small-signal stability analysis. The geometric-derived stability factor from the s-parameters can assure the stability that is expressed by: 2 11 * 22 11 12 21 The determinant of the scattering matrix is expressed by . Observation of start-up analysis of either K > 1 and |∆| < 1, plotted in Fig. 2(a), will not guarantee unconditional stability, when the PA is terminated with an impedance having positive or zero resistances. Besides, the single geometric-derived parameter, μ > 1 shown in Fig. 2(b) guarantees the stability auxiliary condition. The work [22] provides the complementary large-signal stability-analysis techniques assisted to ensure the stability. By increasing the real part of impedance, the stability will be improved with the penalty of gain reduction at the operating frequency. In this study, a series resistor at the input path of the transistor improves the output Return Loss.

Bias Network Consideration
Design of the gate/drain bias network includes some trade-offs among linearity, stability, and complexity. A proper gate bias line provides positive input resistance for achieving low-frequency stability [23], [24]. Here, the desired bias-tees are synthesized first by decoupling capacitors to null the RF signal at the operating frequency. Then, a proper thickness of the (λ/4) line provides a high impedance at the fundamental frequency. The minimum λ/4 line's width of 0.5 mm with characteristic impedance of 80 Ω can handle the maximum 0.6 A drain current for the selected substrate.

Design of Harmonic Tuning Networks
To minimize the parasitic effects of device, the impedance terminations of fundamental and harmonics are required to provide a perfect match. In this respect, the load-pull simulations are conducted through the varying load impedance values defined by a certain VSWR and variable phase. Here, the load-pull simulations of stabilized FET transistor are run for selecting the optimal output impedance that compromise between the maximum efficiency and maximum output RF power.
The optimum I-gen impedances at the drain of transistor for the third harmonic order are shown in Fig. 3. The third harmonic is terminated close to the open circuit condition. The harmonic control of the Class-F PA is carried out by a short circuited second harmonic load, while the third harmonic is selected to maximize the output power. To present appropriate fundamental and harmonic terminations, the output matching network (OMN) is designed and optimized that includes a third-harmonic peaking circuit using a resonant tank in series with the output.  The third harmonic voltage has a ratio of 1⁄9 to the fundamental voltage, as mentioned in Sec. 2, thus, the finite slope of a GaN device's knee boundary allows the third harmonic component to square-up the fundamental voltage waveform. Therefore, the voltage waveform contains a large amount of third harmonic component that pushes the fundamental voltage over the value dictated by the device physical limitations. Since, the third harmonic flattening does not affect the dissipated power, higher output power can be achieved. Figure 4 To further improve the PAE and gain, the load-pull simulations are also conducted for second and third harmonics. The harmonic impedances are listed in Tab. 1. At the third harmonic frequency, the load impedance is a large value of purely imaginary while the real part of harmonic impedance is too small to be ignored. The resonant circuit includes two open stub lines and two transmission lines connected by a junction. The electrical lengths of lines are tuned to control the harmonic terminations. To generate a proper drain current waveform, the λ⁄4 line (TL8) in bias network provides a very low impedance at the second harmonic that can eliminate the distortion in the input voltage.
The input matching network (IMN) is designed to maximize the gain level at the operating frequency. The purpose of harmonic tuning at the IMN shown in Fig. 4(b), is to prevent the delivery of harmonic power to the load. Moreover, the input second harmonic impedance should be controlled as it affects the input nonlinearity. To deliver the maximum power transfer from the input source to the FET, the transistor's input is conjugate matched at the fundamental frequency. Input impedance (Z in ) of transistor at 3.6 GHz is 4.2 -j20 and the IMN transfers the 50 Ω to the conjugate match of Z in . Note that the HCCs are placed in front of the fundamental matching networks to prevent harmonic impedance variation. Figure 5. indicates the drain waveforms of the designed Class-F PA. Moreover, the nonlinear characteristics of PA without predistortion linearization are plotted in Fig. 6, where a slight compression at high power levels can be observed.
As a final remark, electromagnetic simulations should be performed for estimating actual measurement results, by considering the sensitivity of the transmission lines tolerances and layout disposition. The schematic circuits of the 10 W Class-F, including HCCs at input/output, and a single-    ended Class-B PA using the same transistor and bias condition have been designed at 3.6 GHz. The layout of the designed Class-F PA is depicted in Fig. 7 where the Class-B PA is extended with harmonic resonators to shape the output voltage waveform.
To show the effect of the harmonic voltage, the layout results of transducer power gain, drain efficiency and PAE of the Class-F PA are compared with those of the Class-B PA in Fig. 8. Dashed lines are allocated to the performance of Class-B PA. The results reveal that while both classes provide approximately the same saturated output power, Class-F PA delivers about 13% higher PAE where the dissipation in transistor is minimized. Therefore, the harmonic tuning contributes in higher efficiency. The Class-B PA provides linear amplification by setting a perfect shortcircuit at all relevant harmonics, hence the instantaneous efficiency varies linearly with the output voltage. Besides, the Class-F PA has superior drain efficiency performance of 66% and gain flatness of 13.7 dB over the Class-B PA, with 56% drain efficiency and transducer gain of 11.3 dB.

PA Prototype Implementation and Experimental Results
We fabricated the corresponding Class-F PA prototype for 3.6 GHz operating frequency, to evaluate the inherent operation of the wave-form engineering. Figure 9(a) depicts the photo of the assembly mounted on an aluminum plate and the PCB dimensions. The blocking capacitors models of the ATC 800-A series are used. These capacitors provide heat transfer for high RF power levels.  Circuit ZVE-8G+) to generate the input signal, and the Spectrum Analyser (SMW200A) to measure the output RF signal. A calibrated 30dB fixed attenuator (BW-30N100W+) is used as a protective element to prevent the VSA to be overloaded at high power levels. The PA was tested with power-swept continuous wave (CW) excitations from a vector signal generator (R&SFSW8) to study the PA behavior under different excitation levels. The funda-mental voltage has been increased with the input power drive; hence the current is saturated.
The large-signal performance of the PA with 28 V V ds and quiescent drain current of 15 mA is shown in Fig. 10. The measured results (dashed lines) are compared to the simulated ones (solid lines).
As depicted in Fig. 10(a), (b) the PA provides a measured peak drain efficiency of 64.7% at 40 dBm output power, while it operates at its 1 dB compression point. Figure 10(c) plots the small-signal gain variation through a frequency sweep from 3.4 to 3.7 GHz. The transducer power gain at 3.56 GHz is approximately close to the simulation result, even though at 3.6 GHz is lower than the simulation predicts. A maximum measured transducer power gain of 11 dB is achieved showing a 2 dB difference with respect to the simulation results. For higher power levels, this difference decreases. Measurement results depict the effectiveness of employed HCC when the peak PAE of 59.6% has been achieved at maximum RF output power whilst, the IMN improves the input reflection coefficient and the gain response versus frequency. The obtained results are compared favorably with recently published papers on state-of-the-art Class-F PAs, listed in Tab. 2. The results confirmed that the design methodology proposed in this paper can deliver high efficiency and high linear performance without using predistortion technique. The harmonic distortion of -52.51 dBc for the second harmonic and -37.41 dBc for the third harmonic, in the measured output power spectrum, validated the results. In summary, wave-shaping matching design methodologies improve the power amplifier large-signal performance in conjunction with advanced device technologies, providing solutions suitable for 5G transmitters.

Conclusion
This work contributes to experimentally validate the harmonic tuning influence on the efficiency improvement of a Class-F PA, based on GaN HEMT technology for 5G