Miniaturization and Harmonic Suppression of Power Divider using Coupled Line Section for High Power Applications

This paper presents a compact transmission line based on the coupled line section to reduce the circuit size of Gysel power divider (GPD). The line is composed of one direct line and one coupled line section. The coupled line section consists of two series lines and one coupled line. The proposed line is symmetrical and analyzed with evenodd mode analysis to derive design equations. The line not only reduces circuit size but also improves the out-off band performance. To validate the properties of the line, a GPD is designed at 1 GHz. The physical size of this GPD occupies only 38% (0.32λg × 0.16λg, λg is the guided wavelength) circuit area compared to reference GPD. Furthermore, the proposed design includes 2 order harmonic suppression with attenuation level better than –20 dB. The proposed GPD is designed and fabricated on an Arlon substrate of relative dielectric constant of 2.2, thickness of 0.787 mm, and loss tangent 0.0009.


Introduction
Power dividers (PDs) are essential components in the fields of RF/microwave communication systems. PDs are most widely used in antenna array systems, balanced mixers, power amplifiers, etc. Out of the various PDs, Wilkinson power divider (WPD) is one of the most commonly used PD due to simple structure, good impedance matching at the input and output ports, and isolation properties. WPD suffers from large circuit size, narrowband width, spurious response, and power handling capability [1], [2]. Various researchers proposed several techniques to solve the issues (circuit size, bandwidth, and harmonic suppression) related to WPDs [3][4][5][6][7]. However, the WPDs are not capable of handling high microwave power due to a single isolation resistor connected between output ports. The single isolation resistor is not capable of providing a proper heat sink. Therefore, its application is limited to low power applications. This drawback of WPD is overcome by Gysel power divider GPD [4], which consists of four quarters and one-half wavelength transmission line sections and two resistors. The resistors of the GPD are connected to the ground, which provides the good heat-sink capability. Therefore, the GPD is a suitable candidate for high power microwave applications over WPD. The overall size of the GPD is large specifically at lower frequencies due to several transmission line sections. Therefore, it is necessary to design a low cost GPD for high power applications. Several methods have been proposed by the researchers to reduce the size as well as to improve the performance of GPDs [9][10][11][12][13][14][15]. In [9], the composite right/left hand (CRLH) transmission line (TL) is utilized to reduce the size of GPD, but it is not able to suppress the harmonics. In [10], the transmission line section of GPD is replaced by a filter (low pass filter, LPF) circuit in order to reduce circuit size and suppress the spurious response. Although, the size is reduced significantly, these techniques required fine optimization which increases simulation time. In [11], the conventional line is replaced by stub loaded lines, and in [12], a single isolation resistor is used to improve the performance of GPD. In [13], a combination of WPD and GPD is also used to improve the performance of GPD. The wideband GPD is reported using phase shifter in [14]. Recently, lumped elements (inductor and capacitor) are used to significantly reduce the circuit size of GPD [15]. Although, size is significantly reduced it offers extra parasitic effects at higher frequencies due to the use of lumped elements. Artificial transmission line (ATL) technique and multiple transmission line techniques are used to reduce the size as well as suppress the harmonics of GPD in [16] and [17], respectively.
In this paper, a compact GPD with harmonic suppression is demonstrated based on the coupled line section. The proposed structure occupies 38% circuit area compared to reference GPD. Moreover, 2 nd order harmonic is well suppressed with an attenuation level -20 dB.

Proposed Line
The transmission line (TL) model of a traditional line and its equivalent proposed line is shown in Fig. 1(a) and (b), respectively. The proposed line consists of two transmission lines; one is a direct line from port 1 to port 2 having a characteristic impedance Z a and electrical length 2θ a . The second line is composed of two identical lines having characteristic impedance Z b and electrical length θ b connected by a coupled line section. The coupled line section has the even mode and the odd mode characteristic impedances Z 0e and Z 0o , respectively. The coupled line section has electrical length θ c . The proposed topology is equivalent to the traditional quarter-wavelength line (θ T = 90°) of characteristic impedance, Z T . In Fig. 1(a,b), P-P' indicates a symmetric plane with respect to two ports (port 1 and port 2) for the analysis. These structures are analyzed by even mode and odd mode excitation analysis. The TL model of even-and odd modes is shown in Fig. 1(c,d). The even-mode input admittance (Y even ) seen from port 1 is obtained by (3) using (1), (2) for the proposed line and for the traditional line by (4).
Here, K = tan θ a , L = tan θ b , M = tan θ c . Equations (5) and (10) are used to calculate the even-and odd-mode admittances of the coupled line, where Z a , Z b , θ a , θ b , and θ c are free variables. To reduce the design variables, Z a and Z b are chosen to be the same. The solutions of (5) and (10) are not unique because the number of variables is four and only two equations are available. One can solve these equations by using graphical techniques, which provide flexibility to choose design parameters in order to achieve a substantial amount of miniaturization. For example: For Z T = 70.7 Ω, Z a = Z b = 115 Ω, and θ a = θ b , the variation of even-and oddmode impedances of coupled line with θ a for different values of θ c is shown in Fig. 2. From this figure, it is observed that at a higher value of θ a the odd mode impedance is greater than even mode impedance which is impractical to realize. Figure 3 shows the variation of even-odd mode impedances with θ a for different values of θ b and fixed value of Z T = 70.7 Ω, Z a = Z b = 115 Ω, θ c = 30°. From the figure, it is observed that variation in odd mode impedance is more than even mode impedance variation of the coupled line with θ a .     and θ c , respectively. From the figures, it is found that even mode impedance is varying less compared to odd mode impedance. From Figs. 2-5, it is clear that multiple solutions exist for Z 0e and Z 0o . Therefore, the smallest possi-ble θ a , θ b , and θ c can be chosen for size miniaturization as well as for physically realizable Z 0e and Z 0o .
The design parameters of the proposed line are chosen from the design graphs plotted in Figs. 2-5. To validate the design equations of the line, values of Z 0e and Z 0o are 60.3 Ω and 47.8 Ω, respectively by selecting Z a = Z b = 140 Ω, θ a = 13°, θ b = 12°, θ c = 25°, and Z T = 70.7 Ω. Based on these parameters, the proposed line is designed and simulated using an HFSS full-wave simulator. Figure 6(a) shows the frequency response of the conventional quarter wavelength line and the proposed line. From the figure, it is clearly seen that two transmission zeros (TZs) are produced above the desired frequency of 1 GHz due to the coupled line section. One can tune these TZs by proper selection of the even-and odd-mode impedances of the coupled line. To validate this, the transmission characteristics of the proposed line have been studied with different combination of even-and odd-mode impedances and are given in Fig. 6(b). From the plot, it is observed that when the value of Z 0e is comparable with Z 0o , only one TZ is produced, i.e., there is negligible effect of the coupled line. However, if the difference between Z 0e and Z 0o is considerable, the single TZ is split into two TZs on either side of that single TZ. In addition to this, the separation between the TZs increases by increasing the difference between the evenand odd-mode impedances. Thus, the design parameters are chosen in such a way that one can get realizable value of characteristic impedances which helps to suppress the undesired harmonics and at the same time substantial amount of circuit miniaturization is achieved.

Miniaturized GPD and Experimental Results
A compact GPD is designed at 1 GHz based on the proposed line to show its size reduction capability. Firstly, a conventional GPD which consists of six transmission lines and two resistors (R) is shown in Fig. 7. The characteristic impedances and electrical lengths of the transmission line (TL) sections are Z 1 , Z 2 , Z 3 , and θ 1 = θ 2 = θ 3 = 90° respectively, for the design frequency. One can design the GPD with all the TL sections having the same characteristic impedance (Z 1 = Z 2 = Z 3 = 70.7 Ω) by selecting R = 100 Ω according to [10]. For comparison purposes, a reference GPD is designed and shown in Fig. 8(a). In order to reduce the circuit area of this GPD, all the quarter wavelength lines of impedance of 70.7 Ω are replaced by the proposed equivalent TL. Design parameters of the proposed line are tuned to provide a passband characteristic at the design frequency. To achieve significant miniaturization, the design parameters are chosen to be Z 0e = 60.3 Ω, Z 0o = 47.8 Ω, Z a = Z b = 140 Ω, θ a = θ b = 12°, and θ c = 25° for Z T = 70.7 Ω. The overall physical area of the design is 71 × 35.5 mm 2 , which is 38% circuit area of the reference GPD. The dimensions of the proposed and reference GPDs are mentioned in Fig. 8. The simulated frequency responses of the proposed design are compared with the reference design in Fig. 9. From Fig. 9(a), it is found that S 11 = -23.8 dB, S 21 = -3.4 dB, and S 31 = -3.4 dB for the proposed design at 1 GHz, whereas these are -29.8 dB, -3.11 dB, and -3.15 dB, respectively for the reference design. In addition to this, the 2 nd order harmonic is suppressed below 20 dB. From Fig. 9(b), S 22 = -20.9 dB, S 23 = -29 dB, and S 33 = -20 dB for the proposed GPD, whereas these are -28 dB, -30 dB, and -28 dB, respectively for the reference design.
The proposed GPD has been fabricated and is shown in Fig. 10(a). The measured results are compared with the simulated results in Fig. 10(b-d) to validate the proposed technique. From the figures, the measured S 11 , S 21 , S 31 , S 22 and S 23 are -20 dB, -4.01 dB, -3.75 dB, -18 dB and -25 dB, respectively at 1.1 GHz. The fractional bandwidth is found to be 20% with return loss and isolation performance better than 15 dB. Phase difference ( S 21 -S 31 ) between output ports within the operating band is found to be ±3° as shown in Fig. 10(d). From Fig. 10(b-d), slight discrepancy in measured results is observed, which may be due to non-ideal operation of connectors at high frequencies, tolerance of chip resistors and their parasitic effects. The proposed GPD is compared with some of the existing works in Tab. 1, in terms of circuit size, harmonic suppression (HS), fractional bandwidth (FBW) (in terms of return loss (RL) and isolation (I)), and state of miniaturization techniques. From the table, it is observed that power divider presented in [9], [15] provides slightly more size reduction as compared to the proposed power divider, but power dividers in [9], [15] are not capable to suppress unwanted harmonics and also they may offer parasitic effect at higher frequency due to the use of lumped elements. Although, in [10] miniaturization and harmonics suppression are achieved, but the bandwidth is lesser compared to the proposed design. The GPD reported in [11][12][13][14] offers wideband characteristic as compared to the proposed GPD, but the circuit area of those power dividers is significantly large. Although, in [16], [17] harmonics are suppressed but the designs required more optimization time to get desired response. Therefore, the proposed design provides a good trade-off compared to existing GPDs presented in Tab

Conclusion
A compact power divider is designed based on coupled line sections for high power applications. The proposed topology not only provides size reduction capability but also helps to improve the out-off band performance. Further, the proposed topology is used to design a compact GPD at 1 GHz. The physical size of the proposed GPD occupies only 38% circuit area of the reference GPD. The proposed solution gives a great trade-off between size reduction and performance. Santanu DAS was born in 1968. He received the B.E. degree in Electronic and Telecom. Engineering from the Bengal Engineering College in 1989, and the M.E degree in Microwave Engineering from the Jadavpur University, Calcutta in 1992. He obtained the Ph.D. (Engineering) degree in the year 1998 from the Jadavpur University. As a Lecturer in Electronics and Telecommunication Engineering, he joined the department of the Bengal Engineering and Science University in 1998 and presently holds the post of a Professor at the same department. His current research interests include the microstrip circuits, antenna elements and arrays, FSS and defected ground structures.